2
0

cpu-qom.h 2.4 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091
  1. /*
  2. * QEMU LatticeMico32 CPU
  3. *
  4. * Copyright (c) 2012 SUSE LINUX Products GmbH
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2.1 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see
  18. * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19. */
  20. #ifndef QEMU_LM32_CPU_QOM_H
  21. #define QEMU_LM32_CPU_QOM_H
  22. #include "qom/cpu.h"
  23. #include "cpu.h"
  24. #define TYPE_LM32_CPU "lm32-cpu"
  25. #define LM32_CPU_CLASS(klass) \
  26. OBJECT_CLASS_CHECK(LM32CPUClass, (klass), TYPE_LM32_CPU)
  27. #define LM32_CPU(obj) \
  28. OBJECT_CHECK(LM32CPU, (obj), TYPE_LM32_CPU)
  29. #define LM32_CPU_GET_CLASS(obj) \
  30. OBJECT_GET_CLASS(LM32CPUClass, (obj), TYPE_LM32_CPU)
  31. /**
  32. * LM32CPUClass:
  33. * @parent_realize: The parent class' realize handler.
  34. * @parent_reset: The parent class' reset handler.
  35. *
  36. * A LatticeMico32 CPU model.
  37. */
  38. typedef struct LM32CPUClass {
  39. /*< private >*/
  40. CPUClass parent_class;
  41. /*< public >*/
  42. DeviceRealize parent_realize;
  43. void (*parent_reset)(CPUState *cpu);
  44. } LM32CPUClass;
  45. /**
  46. * LM32CPU:
  47. * @env: #CPULM32State
  48. *
  49. * A LatticeMico32 CPU.
  50. */
  51. typedef struct LM32CPU {
  52. /*< private >*/
  53. CPUState parent_obj;
  54. /*< public >*/
  55. CPULM32State env;
  56. uint32_t revision;
  57. uint8_t num_interrupts;
  58. uint8_t num_breakpoints;
  59. uint8_t num_watchpoints;
  60. uint32_t features;
  61. } LM32CPU;
  62. static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
  63. {
  64. return container_of(env, LM32CPU, env);
  65. }
  66. #define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
  67. #define ENV_OFFSET offsetof(LM32CPU, env)
  68. #ifndef CONFIG_USER_ONLY
  69. extern const struct VMStateDescription vmstate_lm32_cpu;
  70. #endif
  71. void lm32_cpu_do_interrupt(CPUState *cpu);
  72. void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
  73. int flags);
  74. hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  75. int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
  76. int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
  77. #endif