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rtc-test.c 20 KB

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  1. /*
  2. * QTest testcase for the MC146818 real-time clock
  3. *
  4. * Copyright IBM, Corp. 2012
  5. *
  6. * Authors:
  7. * Anthony Liguori <aliguori@us.ibm.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10. * See the COPYING file in the top-level directory.
  11. *
  12. */
  13. #include "qemu/osdep.h"
  14. #include "libqtest-single.h"
  15. #include "qemu/timer.h"
  16. #include "hw/rtc/mc146818rtc.h"
  17. #include "hw/rtc/mc146818rtc_regs.h"
  18. #define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768)
  19. static uint8_t base = 0x70;
  20. static int bcd2dec(int value)
  21. {
  22. return (((value >> 4) & 0x0F) * 10) + (value & 0x0F);
  23. }
  24. static uint8_t cmos_read(uint8_t reg)
  25. {
  26. outb(base + 0, reg);
  27. return inb(base + 1);
  28. }
  29. static void cmos_write(uint8_t reg, uint8_t val)
  30. {
  31. outb(base + 0, reg);
  32. outb(base + 1, val);
  33. }
  34. static int tm_cmp(struct tm *lhs, struct tm *rhs)
  35. {
  36. time_t a, b;
  37. struct tm d1, d2;
  38. memcpy(&d1, lhs, sizeof(d1));
  39. memcpy(&d2, rhs, sizeof(d2));
  40. a = mktime(&d1);
  41. b = mktime(&d2);
  42. if (a < b) {
  43. return -1;
  44. } else if (a > b) {
  45. return 1;
  46. }
  47. return 0;
  48. }
  49. #if 0
  50. static void print_tm(struct tm *tm)
  51. {
  52. printf("%04d-%02d-%02d %02d:%02d:%02d\n",
  53. tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday,
  54. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_gmtoff);
  55. }
  56. #endif
  57. static void cmos_get_date_time(struct tm *date)
  58. {
  59. int base_year = 2000, hour_offset;
  60. int sec, min, hour, mday, mon, year;
  61. time_t ts;
  62. struct tm dummy;
  63. sec = cmos_read(RTC_SECONDS);
  64. min = cmos_read(RTC_MINUTES);
  65. hour = cmos_read(RTC_HOURS);
  66. mday = cmos_read(RTC_DAY_OF_MONTH);
  67. mon = cmos_read(RTC_MONTH);
  68. year = cmos_read(RTC_YEAR);
  69. if ((cmos_read(RTC_REG_B) & REG_B_DM) == 0) {
  70. sec = bcd2dec(sec);
  71. min = bcd2dec(min);
  72. hour = bcd2dec(hour);
  73. mday = bcd2dec(mday);
  74. mon = bcd2dec(mon);
  75. year = bcd2dec(year);
  76. hour_offset = 80;
  77. } else {
  78. hour_offset = 0x80;
  79. }
  80. if ((cmos_read(0x0B) & REG_B_24H) == 0) {
  81. if (hour >= hour_offset) {
  82. hour -= hour_offset;
  83. hour += 12;
  84. }
  85. }
  86. ts = time(NULL);
  87. localtime_r(&ts, &dummy);
  88. date->tm_isdst = dummy.tm_isdst;
  89. date->tm_sec = sec;
  90. date->tm_min = min;
  91. date->tm_hour = hour;
  92. date->tm_mday = mday;
  93. date->tm_mon = mon - 1;
  94. date->tm_year = base_year + year - 1900;
  95. #ifndef __sun__
  96. date->tm_gmtoff = 0;
  97. #endif
  98. ts = mktime(date);
  99. }
  100. static void check_time(int wiggle)
  101. {
  102. struct tm start, date[4], end;
  103. struct tm *datep;
  104. time_t ts;
  105. /*
  106. * This check assumes a few things. First, we cannot guarantee that we get
  107. * a consistent reading from the wall clock because we may hit an edge of
  108. * the clock while reading. To work around this, we read four clock readings
  109. * such that at least two of them should match. We need to assume that one
  110. * reading is corrupt so we need four readings to ensure that we have at
  111. * least two consecutive identical readings
  112. *
  113. * It's also possible that we'll cross an edge reading the host clock so
  114. * simply check to make sure that the clock reading is within the period of
  115. * when we expect it to be.
  116. */
  117. ts = time(NULL);
  118. gmtime_r(&ts, &start);
  119. cmos_get_date_time(&date[0]);
  120. cmos_get_date_time(&date[1]);
  121. cmos_get_date_time(&date[2]);
  122. cmos_get_date_time(&date[3]);
  123. ts = time(NULL);
  124. gmtime_r(&ts, &end);
  125. if (tm_cmp(&date[0], &date[1]) == 0) {
  126. datep = &date[0];
  127. } else if (tm_cmp(&date[1], &date[2]) == 0) {
  128. datep = &date[1];
  129. } else if (tm_cmp(&date[2], &date[3]) == 0) {
  130. datep = &date[2];
  131. } else {
  132. g_assert_not_reached();
  133. }
  134. if (!(tm_cmp(&start, datep) <= 0 && tm_cmp(datep, &end) <= 0)) {
  135. long t, s;
  136. start.tm_isdst = datep->tm_isdst;
  137. t = (long)mktime(datep);
  138. s = (long)mktime(&start);
  139. if (t < s) {
  140. g_test_message("RTC is %ld second(s) behind wall-clock", (s - t));
  141. } else {
  142. g_test_message("RTC is %ld second(s) ahead of wall-clock", (t - s));
  143. }
  144. g_assert_cmpint(ABS(t - s), <=, wiggle);
  145. }
  146. }
  147. static int wiggle = 2;
  148. static void set_year_20xx(void)
  149. {
  150. /* Set BCD mode */
  151. cmos_write(RTC_REG_B, REG_B_24H);
  152. cmos_write(RTC_REG_A, 0x76);
  153. cmos_write(RTC_YEAR, 0x11);
  154. cmos_write(RTC_CENTURY, 0x20);
  155. cmos_write(RTC_MONTH, 0x02);
  156. cmos_write(RTC_DAY_OF_MONTH, 0x02);
  157. cmos_write(RTC_HOURS, 0x02);
  158. cmos_write(RTC_MINUTES, 0x04);
  159. cmos_write(RTC_SECONDS, 0x58);
  160. cmos_write(RTC_REG_A, 0x26);
  161. g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
  162. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
  163. g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
  164. g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
  165. g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
  166. g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
  167. g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x20);
  168. if (sizeof(time_t) == 4) {
  169. return;
  170. }
  171. /* Set a date in 2080 to ensure there is no year-2038 overflow. */
  172. cmos_write(RTC_REG_A, 0x76);
  173. cmos_write(RTC_YEAR, 0x80);
  174. cmos_write(RTC_REG_A, 0x26);
  175. g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
  176. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
  177. g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
  178. g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
  179. g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
  180. g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x80);
  181. g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x20);
  182. cmos_write(RTC_REG_A, 0x76);
  183. cmos_write(RTC_YEAR, 0x11);
  184. cmos_write(RTC_REG_A, 0x26);
  185. g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
  186. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
  187. g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
  188. g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
  189. g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
  190. g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x11);
  191. g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x20);
  192. }
  193. static void set_year_1980(void)
  194. {
  195. /* Set BCD mode */
  196. cmos_write(RTC_REG_B, REG_B_24H);
  197. cmos_write(RTC_REG_A, 0x76);
  198. cmos_write(RTC_YEAR, 0x80);
  199. cmos_write(RTC_CENTURY, 0x19);
  200. cmos_write(RTC_MONTH, 0x02);
  201. cmos_write(RTC_DAY_OF_MONTH, 0x02);
  202. cmos_write(RTC_HOURS, 0x02);
  203. cmos_write(RTC_MINUTES, 0x04);
  204. cmos_write(RTC_SECONDS, 0x58);
  205. cmos_write(RTC_REG_A, 0x26);
  206. g_assert_cmpint(cmos_read(RTC_HOURS), ==, 0x02);
  207. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, 0x04);
  208. g_assert_cmpint(cmos_read(RTC_SECONDS), >=, 0x58);
  209. g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, 0x02);
  210. g_assert_cmpint(cmos_read(RTC_MONTH), ==, 0x02);
  211. g_assert_cmpint(cmos_read(RTC_YEAR), ==, 0x80);
  212. g_assert_cmpint(cmos_read(RTC_CENTURY), ==, 0x19);
  213. }
  214. static void bcd_check_time(void)
  215. {
  216. /* Set BCD mode */
  217. cmos_write(RTC_REG_B, REG_B_24H);
  218. check_time(wiggle);
  219. }
  220. static void dec_check_time(void)
  221. {
  222. /* Set DEC mode */
  223. cmos_write(RTC_REG_B, REG_B_24H | REG_B_DM);
  224. check_time(wiggle);
  225. }
  226. static void alarm_time(void)
  227. {
  228. struct tm now;
  229. time_t ts;
  230. int i;
  231. ts = time(NULL);
  232. gmtime_r(&ts, &now);
  233. /* set DEC mode */
  234. cmos_write(RTC_REG_B, REG_B_24H | REG_B_DM);
  235. g_assert(!get_irq(RTC_ISA_IRQ));
  236. cmos_read(RTC_REG_C);
  237. now.tm_sec = (now.tm_sec + 2) % 60;
  238. cmos_write(RTC_SECONDS_ALARM, now.tm_sec);
  239. cmos_write(RTC_MINUTES_ALARM, RTC_ALARM_DONT_CARE);
  240. cmos_write(RTC_HOURS_ALARM, RTC_ALARM_DONT_CARE);
  241. cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) | REG_B_AIE);
  242. for (i = 0; i < 2 + wiggle; i++) {
  243. if (get_irq(RTC_ISA_IRQ)) {
  244. break;
  245. }
  246. clock_step(1000000000);
  247. }
  248. g_assert(get_irq(RTC_ISA_IRQ));
  249. g_assert((cmos_read(RTC_REG_C) & REG_C_AF) != 0);
  250. g_assert(cmos_read(RTC_REG_C) == 0);
  251. }
  252. static void set_time_regs(int h, int m, int s)
  253. {
  254. cmos_write(RTC_HOURS, h);
  255. cmos_write(RTC_MINUTES, m);
  256. cmos_write(RTC_SECONDS, s);
  257. }
  258. static void set_time(int mode, int h, int m, int s)
  259. {
  260. cmos_write(RTC_REG_B, mode);
  261. cmos_write(RTC_REG_A, 0x76);
  262. set_time_regs(h, m, s);
  263. cmos_write(RTC_REG_A, 0x26);
  264. }
  265. static void set_datetime_bcd(int h, int min, int s, int d, int m, int y)
  266. {
  267. cmos_write(RTC_HOURS, h);
  268. cmos_write(RTC_MINUTES, min);
  269. cmos_write(RTC_SECONDS, s);
  270. cmos_write(RTC_YEAR, y & 0xFF);
  271. cmos_write(RTC_CENTURY, y >> 8);
  272. cmos_write(RTC_MONTH, m);
  273. cmos_write(RTC_DAY_OF_MONTH, d);
  274. }
  275. static void set_datetime_dec(int h, int min, int s, int d, int m, int y)
  276. {
  277. cmos_write(RTC_HOURS, h);
  278. cmos_write(RTC_MINUTES, min);
  279. cmos_write(RTC_SECONDS, s);
  280. cmos_write(RTC_YEAR, y % 100);
  281. cmos_write(RTC_CENTURY, y / 100);
  282. cmos_write(RTC_MONTH, m);
  283. cmos_write(RTC_DAY_OF_MONTH, d);
  284. }
  285. static void set_datetime(int mode, int h, int min, int s, int d, int m, int y)
  286. {
  287. cmos_write(RTC_REG_B, mode);
  288. cmos_write(RTC_REG_A, 0x76);
  289. if (mode & REG_B_DM) {
  290. set_datetime_dec(h, min, s, d, m, y);
  291. } else {
  292. set_datetime_bcd(h, min, s, d, m, y);
  293. }
  294. cmos_write(RTC_REG_A, 0x26);
  295. }
  296. #define assert_time(h, m, s) \
  297. do { \
  298. g_assert_cmpint(cmos_read(RTC_HOURS), ==, h); \
  299. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, m); \
  300. g_assert_cmpint(cmos_read(RTC_SECONDS), ==, s); \
  301. } while(0)
  302. #define assert_datetime_bcd(h, min, s, d, m, y) \
  303. do { \
  304. g_assert_cmpint(cmos_read(RTC_HOURS), ==, h); \
  305. g_assert_cmpint(cmos_read(RTC_MINUTES), ==, min); \
  306. g_assert_cmpint(cmos_read(RTC_SECONDS), ==, s); \
  307. g_assert_cmpint(cmos_read(RTC_DAY_OF_MONTH), ==, d); \
  308. g_assert_cmpint(cmos_read(RTC_MONTH), ==, m); \
  309. g_assert_cmpint(cmos_read(RTC_YEAR), ==, (y & 0xFF)); \
  310. g_assert_cmpint(cmos_read(RTC_CENTURY), ==, (y >> 8)); \
  311. } while(0)
  312. static void basic_12h_bcd(void)
  313. {
  314. /* set BCD 12 hour mode */
  315. set_time(0, 0x81, 0x59, 0x00);
  316. clock_step(1000000000LL);
  317. assert_time(0x81, 0x59, 0x01);
  318. clock_step(59000000000LL);
  319. assert_time(0x82, 0x00, 0x00);
  320. /* test BCD wraparound */
  321. set_time(0, 0x09, 0x59, 0x59);
  322. clock_step(60000000000LL);
  323. assert_time(0x10, 0x00, 0x59);
  324. /* 12 AM -> 1 AM */
  325. set_time(0, 0x12, 0x59, 0x59);
  326. clock_step(1000000000LL);
  327. assert_time(0x01, 0x00, 0x00);
  328. /* 12 PM -> 1 PM */
  329. set_time(0, 0x92, 0x59, 0x59);
  330. clock_step(1000000000LL);
  331. assert_time(0x81, 0x00, 0x00);
  332. /* 11 AM -> 12 PM */
  333. set_time(0, 0x11, 0x59, 0x59);
  334. clock_step(1000000000LL);
  335. assert_time(0x92, 0x00, 0x00);
  336. /* TODO: test day wraparound */
  337. /* 11 PM -> 12 AM */
  338. set_time(0, 0x91, 0x59, 0x59);
  339. clock_step(1000000000LL);
  340. assert_time(0x12, 0x00, 0x00);
  341. /* TODO: test day wraparound */
  342. }
  343. static void basic_12h_dec(void)
  344. {
  345. /* set decimal 12 hour mode */
  346. set_time(REG_B_DM, 0x81, 59, 0);
  347. clock_step(1000000000LL);
  348. assert_time(0x81, 59, 1);
  349. clock_step(59000000000LL);
  350. assert_time(0x82, 0, 0);
  351. /* 12 PM -> 1 PM */
  352. set_time(REG_B_DM, 0x8c, 59, 59);
  353. clock_step(1000000000LL);
  354. assert_time(0x81, 0, 0);
  355. /* 12 AM -> 1 AM */
  356. set_time(REG_B_DM, 0x0c, 59, 59);
  357. clock_step(1000000000LL);
  358. assert_time(0x01, 0, 0);
  359. /* 11 AM -> 12 PM */
  360. set_time(REG_B_DM, 0x0b, 59, 59);
  361. clock_step(1000000000LL);
  362. assert_time(0x8c, 0, 0);
  363. /* 11 PM -> 12 AM */
  364. set_time(REG_B_DM, 0x8b, 59, 59);
  365. clock_step(1000000000LL);
  366. assert_time(0x0c, 0, 0);
  367. /* TODO: test day wraparound */
  368. }
  369. static void basic_24h_bcd(void)
  370. {
  371. /* set BCD 24 hour mode */
  372. set_time(REG_B_24H, 0x09, 0x59, 0x00);
  373. clock_step(1000000000LL);
  374. assert_time(0x09, 0x59, 0x01);
  375. clock_step(59000000000LL);
  376. assert_time(0x10, 0x00, 0x00);
  377. /* test BCD wraparound */
  378. set_time(REG_B_24H, 0x09, 0x59, 0x00);
  379. clock_step(60000000000LL);
  380. assert_time(0x10, 0x00, 0x00);
  381. /* TODO: test day wraparound */
  382. set_time(REG_B_24H, 0x23, 0x59, 0x00);
  383. clock_step(60000000000LL);
  384. assert_time(0x00, 0x00, 0x00);
  385. }
  386. static void basic_24h_dec(void)
  387. {
  388. /* set decimal 24 hour mode */
  389. set_time(REG_B_24H | REG_B_DM, 9, 59, 0);
  390. clock_step(1000000000LL);
  391. assert_time(9, 59, 1);
  392. clock_step(59000000000LL);
  393. assert_time(10, 0, 0);
  394. /* test BCD wraparound */
  395. set_time(REG_B_24H | REG_B_DM, 9, 59, 0);
  396. clock_step(60000000000LL);
  397. assert_time(10, 0, 0);
  398. /* TODO: test day wraparound */
  399. set_time(REG_B_24H | REG_B_DM, 23, 59, 0);
  400. clock_step(60000000000LL);
  401. assert_time(0, 0, 0);
  402. }
  403. static void am_pm_alarm(void)
  404. {
  405. cmos_write(RTC_MINUTES_ALARM, 0xC0);
  406. cmos_write(RTC_SECONDS_ALARM, 0xC0);
  407. /* set BCD 12 hour mode */
  408. cmos_write(RTC_REG_B, 0);
  409. /* Set time and alarm hour. */
  410. cmos_write(RTC_REG_A, 0x76);
  411. cmos_write(RTC_HOURS_ALARM, 0x82);
  412. cmos_write(RTC_HOURS, 0x81);
  413. cmos_write(RTC_MINUTES, 0x59);
  414. cmos_write(RTC_SECONDS, 0x00);
  415. cmos_read(RTC_REG_C);
  416. cmos_write(RTC_REG_A, 0x26);
  417. /* Check that alarm triggers when AM/PM is set. */
  418. clock_step(60000000000LL);
  419. g_assert(cmos_read(RTC_HOURS) == 0x82);
  420. g_assert((cmos_read(RTC_REG_C) & REG_C_AF) != 0);
  421. /*
  422. * Each of the following two tests takes over 60 seconds due to the time
  423. * needed to report the PIT interrupts. Unfortunately, our PIT device
  424. * model keeps counting even when GATE=0, so we cannot simply disable
  425. * it in main().
  426. */
  427. if (g_test_quick()) {
  428. return;
  429. }
  430. /* set DEC 12 hour mode */
  431. cmos_write(RTC_REG_B, REG_B_DM);
  432. /* Set time and alarm hour. */
  433. cmos_write(RTC_REG_A, 0x76);
  434. cmos_write(RTC_HOURS_ALARM, 0x82);
  435. cmos_write(RTC_HOURS, 3);
  436. cmos_write(RTC_MINUTES, 0);
  437. cmos_write(RTC_SECONDS, 0);
  438. cmos_read(RTC_REG_C);
  439. cmos_write(RTC_REG_A, 0x26);
  440. /* Check that alarm triggers. */
  441. clock_step(3600 * 11 * 1000000000LL);
  442. g_assert(cmos_read(RTC_HOURS) == 0x82);
  443. g_assert((cmos_read(RTC_REG_C) & REG_C_AF) != 0);
  444. /* Same as above, with inverted HOURS and HOURS_ALARM. */
  445. cmos_write(RTC_REG_A, 0x76);
  446. cmos_write(RTC_HOURS_ALARM, 2);
  447. cmos_write(RTC_HOURS, 3);
  448. cmos_write(RTC_MINUTES, 0);
  449. cmos_write(RTC_SECONDS, 0);
  450. cmos_read(RTC_REG_C);
  451. cmos_write(RTC_REG_A, 0x26);
  452. /* Check that alarm does not trigger if hours differ only by AM/PM. */
  453. clock_step(3600 * 11 * 1000000000LL);
  454. g_assert(cmos_read(RTC_HOURS) == 0x82);
  455. g_assert((cmos_read(RTC_REG_C) & REG_C_AF) == 0);
  456. }
  457. /* success if no crash or abort */
  458. static void fuzz_registers(void)
  459. {
  460. unsigned int i;
  461. for (i = 0; i < 1000; i++) {
  462. uint8_t reg, val;
  463. reg = (uint8_t)g_test_rand_int_range(0, 16);
  464. val = (uint8_t)g_test_rand_int_range(0, 256);
  465. cmos_write(reg, val);
  466. cmos_read(reg);
  467. }
  468. }
  469. static void register_b_set_flag(void)
  470. {
  471. if (cmos_read(RTC_REG_A) & REG_A_UIP) {
  472. clock_step(UIP_HOLD_LENGTH + NANOSECONDS_PER_SECOND / 5);
  473. }
  474. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
  475. /* Enable binary-coded decimal (BCD) mode and SET flag in Register B*/
  476. cmos_write(RTC_REG_B, REG_B_24H | REG_B_SET);
  477. set_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  478. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  479. /* Since SET flag is still enabled, time does not advance. */
  480. clock_step(1000000000LL);
  481. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  482. /* Disable SET flag in Register B */
  483. cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) & ~REG_B_SET);
  484. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  485. /* Since SET flag is disabled, the clock now advances. */
  486. clock_step(1000000000LL);
  487. assert_datetime_bcd(0x02, 0x04, 0x59, 0x02, 0x02, 0x2011);
  488. }
  489. static void divider_reset(void)
  490. {
  491. /* Enable binary-coded decimal (BCD) mode in Register B*/
  492. cmos_write(RTC_REG_B, REG_B_24H);
  493. /* Enter divider reset */
  494. cmos_write(RTC_REG_A, 0x76);
  495. set_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  496. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  497. /* Since divider reset flag is still enabled, these are equality checks. */
  498. clock_step(1000000000LL);
  499. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  500. /* The first update ends 500 ms after divider reset */
  501. cmos_write(RTC_REG_A, 0x26);
  502. clock_step(500000000LL - UIP_HOLD_LENGTH - 1);
  503. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
  504. assert_datetime_bcd(0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  505. clock_step(1);
  506. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, !=, 0);
  507. clock_step(UIP_HOLD_LENGTH);
  508. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
  509. assert_datetime_bcd(0x02, 0x04, 0x59, 0x02, 0x02, 0x2011);
  510. }
  511. static void uip_stuck(void)
  512. {
  513. set_datetime(REG_B_24H, 0x02, 0x04, 0x58, 0x02, 0x02, 0x2011);
  514. /* The first update ends 500 ms after divider reset */
  515. (void)cmos_read(RTC_REG_C);
  516. clock_step(500000000LL);
  517. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
  518. assert_datetime_bcd(0x02, 0x04, 0x59, 0x02, 0x02, 0x2011);
  519. /* UF is now set. */
  520. cmos_write(RTC_HOURS_ALARM, 0x02);
  521. cmos_write(RTC_MINUTES_ALARM, 0xC0);
  522. cmos_write(RTC_SECONDS_ALARM, 0xC0);
  523. /* Because the alarm will fire soon, reading register A will latch UIP. */
  524. clock_step(1000000000LL - UIP_HOLD_LENGTH / 2);
  525. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, !=, 0);
  526. /* Move the alarm far away. This must not cause UIP to remain stuck! */
  527. cmos_write(RTC_HOURS_ALARM, 0x03);
  528. clock_step(UIP_HOLD_LENGTH);
  529. g_assert_cmpint(cmos_read(RTC_REG_A) & REG_A_UIP, ==, 0);
  530. }
  531. #define RTC_PERIOD_CODE1 13 /* 8 Hz */
  532. #define RTC_PERIOD_CODE2 15 /* 2 Hz */
  533. #define RTC_PERIOD_TEST_NR 50
  534. static uint64_t wait_periodic_interrupt(uint64_t real_time)
  535. {
  536. while (!get_irq(RTC_ISA_IRQ)) {
  537. real_time = clock_step_next();
  538. }
  539. g_assert((cmos_read(RTC_REG_C) & REG_C_PF) != 0);
  540. return real_time;
  541. }
  542. static void periodic_timer(void)
  543. {
  544. int i;
  545. uint64_t period_clocks, period_time, start_time, real_time;
  546. /* disable all interrupts. */
  547. cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) &
  548. ~(REG_B_PIE | REG_B_AIE | REG_B_UIE));
  549. cmos_write(RTC_REG_A, RTC_PERIOD_CODE1);
  550. /* enable periodic interrupt after properly configure the period. */
  551. cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) | REG_B_PIE);
  552. start_time = real_time = clock_step_next();
  553. for (i = 0; i < RTC_PERIOD_TEST_NR; i++) {
  554. cmos_write(RTC_REG_A, RTC_PERIOD_CODE1);
  555. real_time = wait_periodic_interrupt(real_time);
  556. cmos_write(RTC_REG_A, RTC_PERIOD_CODE2);
  557. real_time = wait_periodic_interrupt(real_time);
  558. }
  559. period_clocks = periodic_period_to_clock(RTC_PERIOD_CODE1) +
  560. periodic_period_to_clock(RTC_PERIOD_CODE2);
  561. period_clocks *= RTC_PERIOD_TEST_NR;
  562. period_time = periodic_clock_to_ns(period_clocks);
  563. real_time -= start_time;
  564. g_assert_cmpint(ABS((int64_t)(real_time - period_time)), <=,
  565. NANOSECONDS_PER_SECOND * 0.5);
  566. }
  567. int main(int argc, char **argv)
  568. {
  569. QTestState *s = NULL;
  570. int ret;
  571. g_test_init(&argc, &argv, NULL);
  572. s = qtest_start("-rtc clock=vm");
  573. qtest_irq_intercept_in(s, "ioapic");
  574. qtest_add_func("/rtc/check-time/bcd", bcd_check_time);
  575. qtest_add_func("/rtc/check-time/dec", dec_check_time);
  576. qtest_add_func("/rtc/alarm/interrupt", alarm_time);
  577. qtest_add_func("/rtc/alarm/am-pm", am_pm_alarm);
  578. qtest_add_func("/rtc/basic/dec-24h", basic_24h_dec);
  579. qtest_add_func("/rtc/basic/bcd-24h", basic_24h_bcd);
  580. qtest_add_func("/rtc/basic/dec-12h", basic_12h_dec);
  581. qtest_add_func("/rtc/basic/bcd-12h", basic_12h_bcd);
  582. qtest_add_func("/rtc/set-year/20xx", set_year_20xx);
  583. qtest_add_func("/rtc/set-year/1980", set_year_1980);
  584. qtest_add_func("/rtc/update/register_b_set_flag", register_b_set_flag);
  585. qtest_add_func("/rtc/update/divider-reset", divider_reset);
  586. qtest_add_func("/rtc/update/uip-stuck", uip_stuck);
  587. qtest_add_func("/rtc/misc/fuzz-registers", fuzz_registers);
  588. qtest_add_func("/rtc/periodic/interrupt", periodic_timer);
  589. ret = g_test_run();
  590. if (s) {
  591. qtest_quit(s);
  592. }
  593. return ret;
  594. }