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@@ -339,6 +339,80 @@ enum
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#endif
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+#ifdef TARGET_UNICORE32
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+
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+#define ELF_START_MMAP 0x80000000
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+
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+#define elf_check_arch(x) ((x) == EM_UNICORE32)
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+
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+#define ELF_CLASS ELFCLASS32
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+#define ELF_DATA ELFDATA2LSB
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+#define ELF_ARCH EM_UNICORE32
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+
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+static inline void init_thread(struct target_pt_regs *regs,
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+ struct image_info *infop)
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+{
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+ abi_long stack = infop->start_stack;
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+ memset(regs, 0, sizeof(*regs));
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+ regs->UC32_REG_asr = 0x10;
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+ regs->UC32_REG_pc = infop->entry & 0xfffffffe;
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+ regs->UC32_REG_sp = infop->start_stack;
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+ /* FIXME - what to for failure of get_user()? */
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+ get_user_ual(regs->UC32_REG_02, stack + 8); /* envp */
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+ get_user_ual(regs->UC32_REG_01, stack + 4); /* envp */
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+ /* XXX: it seems that r0 is zeroed after ! */
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+ regs->UC32_REG_00 = 0;
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+}
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+
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+#define ELF_NREG 34
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+typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
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+
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+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
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+{
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+ (*regs)[0] = env->regs[0];
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+ (*regs)[1] = env->regs[1];
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+ (*regs)[2] = env->regs[2];
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+ (*regs)[3] = env->regs[3];
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+ (*regs)[4] = env->regs[4];
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+ (*regs)[5] = env->regs[5];
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+ (*regs)[6] = env->regs[6];
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+ (*regs)[7] = env->regs[7];
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+ (*regs)[8] = env->regs[8];
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+ (*regs)[9] = env->regs[9];
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+ (*regs)[10] = env->regs[10];
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+ (*regs)[11] = env->regs[11];
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+ (*regs)[12] = env->regs[12];
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+ (*regs)[13] = env->regs[13];
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+ (*regs)[14] = env->regs[14];
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+ (*regs)[15] = env->regs[15];
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+ (*regs)[16] = env->regs[16];
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+ (*regs)[17] = env->regs[17];
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+ (*regs)[18] = env->regs[18];
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+ (*regs)[19] = env->regs[19];
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+ (*regs)[20] = env->regs[20];
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+ (*regs)[21] = env->regs[21];
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+ (*regs)[22] = env->regs[22];
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+ (*regs)[23] = env->regs[23];
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+ (*regs)[24] = env->regs[24];
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+ (*regs)[25] = env->regs[25];
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+ (*regs)[26] = env->regs[26];
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+ (*regs)[27] = env->regs[27];
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+ (*regs)[28] = env->regs[28];
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+ (*regs)[29] = env->regs[29];
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+ (*regs)[30] = env->regs[30];
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+ (*regs)[31] = env->regs[31];
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+
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+ (*regs)[32] = cpu_asr_read((CPUState *)env);
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+ (*regs)[33] = env->regs[0]; /* XXX */
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+}
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+
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+#define USE_ELF_CORE_DUMP
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+#define ELF_EXEC_PAGESIZE 4096
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+
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+#define ELF_HWCAP (UC32_HWCAP_CMOV | UC32_HWCAP_UCF64)
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+
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+#endif
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+
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#ifdef TARGET_SPARC
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#ifdef TARGET_SPARC64
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