|
@@ -816,6 +816,83 @@ void cpu_loop(CPUARMState *env)
|
|
|
|
|
|
#endif
|
|
#endif
|
|
|
|
|
|
|
|
+#ifdef TARGET_UNICORE32
|
|
|
|
+
|
|
|
|
+void cpu_loop(CPUState *env)
|
|
|
|
+{
|
|
|
|
+ int trapnr;
|
|
|
|
+ unsigned int n, insn;
|
|
|
|
+ target_siginfo_t info;
|
|
|
|
+
|
|
|
|
+ for (;;) {
|
|
|
|
+ cpu_exec_start(env);
|
|
|
|
+ trapnr = uc32_cpu_exec(env);
|
|
|
|
+ cpu_exec_end(env);
|
|
|
|
+ switch (trapnr) {
|
|
|
|
+ case UC32_EXCP_PRIV:
|
|
|
|
+ {
|
|
|
|
+ /* system call */
|
|
|
|
+ get_user_u32(insn, env->regs[31] - 4);
|
|
|
|
+ n = insn & 0xffffff;
|
|
|
|
+
|
|
|
|
+ if (n >= UC32_SYSCALL_BASE) {
|
|
|
|
+ /* linux syscall */
|
|
|
|
+ n -= UC32_SYSCALL_BASE;
|
|
|
|
+ if (n == UC32_SYSCALL_NR_set_tls) {
|
|
|
|
+ cpu_set_tls(env, env->regs[0]);
|
|
|
|
+ env->regs[0] = 0;
|
|
|
|
+ } else {
|
|
|
|
+ env->regs[0] = do_syscall(env,
|
|
|
|
+ n,
|
|
|
|
+ env->regs[0],
|
|
|
|
+ env->regs[1],
|
|
|
|
+ env->regs[2],
|
|
|
|
+ env->regs[3],
|
|
|
|
+ env->regs[4],
|
|
|
|
+ env->regs[5]);
|
|
|
|
+ }
|
|
|
|
+ } else {
|
|
|
|
+ goto error;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+ break;
|
|
|
|
+ case UC32_EXCP_TRAP:
|
|
|
|
+ info.si_signo = SIGSEGV;
|
|
|
|
+ info.si_errno = 0;
|
|
|
|
+ /* XXX: check env->error_code */
|
|
|
|
+ info.si_code = TARGET_SEGV_MAPERR;
|
|
|
|
+ info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
|
|
|
|
+ queue_signal(env, info.si_signo, &info);
|
|
|
|
+ break;
|
|
|
|
+ case EXCP_INTERRUPT:
|
|
|
|
+ /* just indicate that signals should be handled asap */
|
|
|
|
+ break;
|
|
|
|
+ case EXCP_DEBUG:
|
|
|
|
+ {
|
|
|
|
+ int sig;
|
|
|
|
+
|
|
|
|
+ sig = gdb_handlesig(env, TARGET_SIGTRAP);
|
|
|
|
+ if (sig) {
|
|
|
|
+ info.si_signo = sig;
|
|
|
|
+ info.si_errno = 0;
|
|
|
|
+ info.si_code = TARGET_TRAP_BRKPT;
|
|
|
|
+ queue_signal(env, info.si_signo, &info);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+ break;
|
|
|
|
+ default:
|
|
|
|
+ goto error;
|
|
|
|
+ }
|
|
|
|
+ process_pending_signals(env);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+error:
|
|
|
|
+ fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
|
|
|
|
+ cpu_dump_state(env, stderr, fprintf, 0);
|
|
|
|
+ abort();
|
|
|
|
+}
|
|
|
|
+#endif
|
|
|
|
+
|
|
#ifdef TARGET_SPARC
|
|
#ifdef TARGET_SPARC
|
|
#define SPARC64_STACK_BIAS 2047
|
|
#define SPARC64_STACK_BIAS 2047
|
|
|
|
|
|
@@ -2925,6 +3002,8 @@ int main(int argc, char **argv, char **envp)
|
|
#endif
|
|
#endif
|
|
#elif defined(TARGET_ARM)
|
|
#elif defined(TARGET_ARM)
|
|
cpu_model = "any";
|
|
cpu_model = "any";
|
|
|
|
+#elif defined(TARGET_UNICORE32)
|
|
|
|
+ cpu_model = "any";
|
|
#elif defined(TARGET_M68K)
|
|
#elif defined(TARGET_M68K)
|
|
cpu_model = "any";
|
|
cpu_model = "any";
|
|
#elif defined(TARGET_SPARC)
|
|
#elif defined(TARGET_SPARC)
|
|
@@ -3227,6 +3306,14 @@ int main(int argc, char **argv, char **envp)
|
|
env->regs[i] = regs->uregs[i];
|
|
env->regs[i] = regs->uregs[i];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
+#elif defined(TARGET_UNICORE32)
|
|
|
|
+ {
|
|
|
|
+ int i;
|
|
|
|
+ cpu_asr_write(env, regs->uregs[32], 0xffffffff);
|
|
|
|
+ for (i = 0; i < 32; i++) {
|
|
|
|
+ env->regs[i] = regs->uregs[i];
|
|
|
|
+ }
|
|
|
|
+ }
|
|
#elif defined(TARGET_SPARC)
|
|
#elif defined(TARGET_SPARC)
|
|
{
|
|
{
|
|
int i;
|
|
int i;
|
|
@@ -3367,7 +3454,7 @@ int main(int argc, char **argv, char **envp)
|
|
#error unsupported target CPU
|
|
#error unsupported target CPU
|
|
#endif
|
|
#endif
|
|
|
|
|
|
-#if defined(TARGET_ARM) || defined(TARGET_M68K)
|
|
|
|
|
|
+#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
|
|
ts->stack_base = info->start_stack;
|
|
ts->stack_base = info->start_stack;
|
|
ts->heap_base = info->brk;
|
|
ts->heap_base = info->brk;
|
|
/* This will be filled in on the first SYS_HEAPINFO call. */
|
|
/* This will be filled in on the first SYS_HEAPINFO call. */
|