sd.c 64 KB

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  1. /*
  2. * SD Memory Card emulation as defined in the "SD Memory Card Physical
  3. * layer specification, Version 2.00."
  4. *
  5. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  6. * Copyright (c) 2007 CodeSourcery
  7. * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
  8. *
  9. * Redistribution and use in source and binary forms, with or without
  10. * modification, are permitted provided that the following conditions
  11. * are met:
  12. *
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in
  17. * the documentation and/or other materials provided with the
  18. * distribution.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  22. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  23. * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR
  24. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  25. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  26. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  28. * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. #include "qemu/osdep.h"
  33. #include "qemu/units.h"
  34. #include "qemu/cutils.h"
  35. #include "hw/irq.h"
  36. #include "hw/registerfields.h"
  37. #include "sysemu/block-backend.h"
  38. #include "hw/sd/sd.h"
  39. #include "hw/sd/sdcard_legacy.h"
  40. #include "migration/vmstate.h"
  41. #include "qapi/error.h"
  42. #include "qemu/bitmap.h"
  43. #include "hw/qdev-properties.h"
  44. #include "hw/qdev-properties-system.h"
  45. #include "qemu/error-report.h"
  46. #include "qemu/timer.h"
  47. #include "qemu/log.h"
  48. #include "qemu/module.h"
  49. #include "sdmmc-internal.h"
  50. #include "trace.h"
  51. //#define DEBUG_SD 1
  52. #define SDSC_MAX_CAPACITY (2 * GiB)
  53. #define INVALID_ADDRESS UINT32_MAX
  54. typedef enum {
  55. sd_r0 = 0, /* no response */
  56. sd_r1, /* normal response command */
  57. sd_r2_i, /* CID register */
  58. sd_r2_s, /* CSD register */
  59. sd_r3, /* OCR register */
  60. sd_r6 = 6, /* Published RCA response */
  61. sd_r7, /* Operating voltage */
  62. sd_r1b = -1,
  63. sd_illegal = -2,
  64. } sd_rsp_type_t;
  65. enum SDCardModes {
  66. sd_inactive,
  67. sd_card_identification_mode,
  68. sd_data_transfer_mode,
  69. };
  70. enum SDCardStates {
  71. sd_inactive_state = -1,
  72. sd_idle_state = 0,
  73. sd_ready_state,
  74. sd_identification_state,
  75. sd_standby_state,
  76. sd_transfer_state,
  77. sd_sendingdata_state,
  78. sd_receivingdata_state,
  79. sd_programming_state,
  80. sd_disconnect_state,
  81. };
  82. struct SDState {
  83. DeviceState parent_obj;
  84. /* If true, created by sd_init() for a non-qdevified caller */
  85. /* TODO purge them with fire */
  86. bool me_no_qdev_me_kill_mammoth_with_rocks;
  87. /* SD Memory Card Registers */
  88. uint32_t ocr;
  89. uint8_t scr[8];
  90. uint8_t cid[16];
  91. uint8_t csd[16];
  92. uint16_t rca;
  93. uint32_t card_status;
  94. uint8_t sd_status[64];
  95. /* Static properties */
  96. uint8_t spec_version;
  97. BlockBackend *blk;
  98. bool spi;
  99. /* Runtime changeables */
  100. uint32_t mode; /* current card mode, one of SDCardModes */
  101. int32_t state; /* current card state, one of SDCardStates */
  102. uint32_t vhs;
  103. bool wp_switch;
  104. unsigned long *wp_group_bmap;
  105. int32_t wp_group_bits;
  106. uint64_t size;
  107. uint32_t blk_len;
  108. uint32_t multi_blk_cnt;
  109. uint32_t erase_start;
  110. uint32_t erase_end;
  111. uint8_t pwd[16];
  112. uint32_t pwd_len;
  113. uint8_t function_group[6];
  114. uint8_t current_cmd;
  115. /* True if we will handle the next command as an ACMD. Note that this does
  116. * *not* track the APP_CMD status bit!
  117. */
  118. bool expecting_acmd;
  119. uint32_t blk_written;
  120. uint64_t data_start;
  121. uint32_t data_offset;
  122. uint8_t data[512];
  123. qemu_irq readonly_cb;
  124. qemu_irq inserted_cb;
  125. QEMUTimer *ocr_power_timer;
  126. const char *proto_name;
  127. bool enable;
  128. uint8_t dat_lines;
  129. bool cmd_line;
  130. };
  131. static void sd_realize(DeviceState *dev, Error **errp);
  132. static const char *sd_state_name(enum SDCardStates state)
  133. {
  134. static const char *state_name[] = {
  135. [sd_idle_state] = "idle",
  136. [sd_ready_state] = "ready",
  137. [sd_identification_state] = "identification",
  138. [sd_standby_state] = "standby",
  139. [sd_transfer_state] = "transfer",
  140. [sd_sendingdata_state] = "sendingdata",
  141. [sd_receivingdata_state] = "receivingdata",
  142. [sd_programming_state] = "programming",
  143. [sd_disconnect_state] = "disconnect",
  144. };
  145. if (state == sd_inactive_state) {
  146. return "inactive";
  147. }
  148. assert(state < ARRAY_SIZE(state_name));
  149. return state_name[state];
  150. }
  151. static const char *sd_response_name(sd_rsp_type_t rsp)
  152. {
  153. static const char *response_name[] = {
  154. [sd_r0] = "RESP#0 (no response)",
  155. [sd_r1] = "RESP#1 (normal cmd)",
  156. [sd_r2_i] = "RESP#2 (CID reg)",
  157. [sd_r2_s] = "RESP#2 (CSD reg)",
  158. [sd_r3] = "RESP#3 (OCR reg)",
  159. [sd_r6] = "RESP#6 (RCA)",
  160. [sd_r7] = "RESP#7 (operating voltage)",
  161. };
  162. if (rsp == sd_illegal) {
  163. return "ILLEGAL RESP";
  164. }
  165. if (rsp == sd_r1b) {
  166. rsp = sd_r1;
  167. }
  168. assert(rsp < ARRAY_SIZE(response_name));
  169. return response_name[rsp];
  170. }
  171. static uint8_t sd_get_dat_lines(SDState *sd)
  172. {
  173. return sd->enable ? sd->dat_lines : 0;
  174. }
  175. static bool sd_get_cmd_line(SDState *sd)
  176. {
  177. return sd->enable ? sd->cmd_line : false;
  178. }
  179. static void sd_set_voltage(SDState *sd, uint16_t millivolts)
  180. {
  181. trace_sdcard_set_voltage(millivolts);
  182. switch (millivolts) {
  183. case 3001 ... 3600: /* SD_VOLTAGE_3_3V */
  184. case 2001 ... 3000: /* SD_VOLTAGE_3_0V */
  185. break;
  186. default:
  187. qemu_log_mask(LOG_GUEST_ERROR, "SD card voltage not supported: %.3fV",
  188. millivolts / 1000.f);
  189. }
  190. }
  191. static void sd_set_mode(SDState *sd)
  192. {
  193. switch (sd->state) {
  194. case sd_inactive_state:
  195. sd->mode = sd_inactive;
  196. break;
  197. case sd_idle_state:
  198. case sd_ready_state:
  199. case sd_identification_state:
  200. sd->mode = sd_card_identification_mode;
  201. break;
  202. case sd_standby_state:
  203. case sd_transfer_state:
  204. case sd_sendingdata_state:
  205. case sd_receivingdata_state:
  206. case sd_programming_state:
  207. case sd_disconnect_state:
  208. sd->mode = sd_data_transfer_mode;
  209. break;
  210. }
  211. }
  212. static const sd_cmd_type_t sd_cmd_type[SDMMC_CMD_MAX] = {
  213. sd_bc, sd_none, sd_bcr, sd_bcr, sd_none, sd_none, sd_none, sd_ac,
  214. sd_bcr, sd_ac, sd_ac, sd_adtc, sd_ac, sd_ac, sd_none, sd_ac,
  215. /* 16 */
  216. sd_ac, sd_adtc, sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none,
  217. sd_adtc, sd_adtc, sd_adtc, sd_adtc, sd_ac, sd_ac, sd_adtc, sd_none,
  218. /* 32 */
  219. sd_ac, sd_ac, sd_none, sd_none, sd_none, sd_none, sd_ac, sd_none,
  220. sd_none, sd_none, sd_bc, sd_none, sd_none, sd_none, sd_none, sd_none,
  221. /* 48 */
  222. sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_ac,
  223. sd_adtc, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none, sd_none,
  224. };
  225. static const int sd_cmd_class[SDMMC_CMD_MAX] = {
  226. 0, 0, 0, 0, 0, 9, 10, 0, 0, 0, 0, 1, 0, 0, 0, 0,
  227. 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 6, 6, 6, 6,
  228. 5, 5, 10, 10, 10, 10, 5, 9, 9, 9, 7, 7, 7, 7, 7, 7,
  229. 7, 7, 10, 7, 9, 9, 9, 8, 8, 10, 8, 8, 8, 8, 8, 8,
  230. };
  231. static uint8_t sd_crc7(const void *message, size_t width)
  232. {
  233. int i, bit;
  234. uint8_t shift_reg = 0x00;
  235. const uint8_t *msg = (const uint8_t *)message;
  236. for (i = 0; i < width; i ++, msg ++)
  237. for (bit = 7; bit >= 0; bit --) {
  238. shift_reg <<= 1;
  239. if ((shift_reg >> 7) ^ ((*msg >> bit) & 1))
  240. shift_reg ^= 0x89;
  241. }
  242. return shift_reg;
  243. }
  244. #define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
  245. FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
  246. FIELD(OCR, VDD_VOLTAGE_WIN_LO, 0, 8)
  247. FIELD(OCR, DUAL_VOLTAGE_CARD, 7, 1)
  248. FIELD(OCR, VDD_VOLTAGE_WIN_HI, 8, 16)
  249. FIELD(OCR, ACCEPT_SWITCH_1V8, 24, 1) /* Only UHS-I */
  250. FIELD(OCR, UHS_II_CARD, 29, 1) /* Only UHS-II */
  251. FIELD(OCR, CARD_CAPACITY, 30, 1) /* 0:SDSC, 1:SDHC/SDXC */
  252. FIELD(OCR, CARD_POWER_UP, 31, 1)
  253. #define ACMD41_ENQUIRY_MASK 0x00ffffff
  254. #define ACMD41_R3_MASK (R_OCR_VDD_VOLTAGE_WIN_HI_MASK \
  255. | R_OCR_ACCEPT_SWITCH_1V8_MASK \
  256. | R_OCR_UHS_II_CARD_MASK \
  257. | R_OCR_CARD_CAPACITY_MASK \
  258. | R_OCR_CARD_POWER_UP_MASK)
  259. static void sd_ocr_powerup(void *opaque)
  260. {
  261. SDState *sd = opaque;
  262. trace_sdcard_powerup();
  263. assert(!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP));
  264. /* card power-up OK */
  265. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
  266. if (sd->size > SDSC_MAX_CAPACITY) {
  267. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
  268. }
  269. }
  270. static void sd_set_ocr(SDState *sd)
  271. {
  272. /* All voltages OK */
  273. sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
  274. if (sd->spi) {
  275. /*
  276. * We don't need to emulate power up sequence in SPI-mode.
  277. * Thus, the card's power up status bit should be set to 1 when reset.
  278. * The card's capacity status bit should also be set if SD card size
  279. * is larger than 2GB for SDHC support.
  280. */
  281. sd_ocr_powerup(sd);
  282. }
  283. }
  284. static void sd_set_scr(SDState *sd)
  285. {
  286. sd->scr[0] = 0 << 4; /* SCR structure version 1.0 */
  287. if (sd->spec_version == SD_PHY_SPECv1_10_VERS) {
  288. sd->scr[0] |= 1; /* Spec Version 1.10 */
  289. } else {
  290. sd->scr[0] |= 2; /* Spec Version 2.00 or Version 3.0X */
  291. }
  292. sd->scr[1] = (2 << 4) /* SDSC Card (Security Version 1.01) */
  293. | 0b0101; /* 1-bit or 4-bit width bus modes */
  294. sd->scr[2] = 0x00; /* Extended Security is not supported. */
  295. if (sd->spec_version >= SD_PHY_SPECv3_01_VERS) {
  296. sd->scr[2] |= 1 << 7; /* Spec Version 3.0X */
  297. }
  298. sd->scr[3] = 0x00;
  299. /* reserved for manufacturer usage */
  300. sd->scr[4] = 0x00;
  301. sd->scr[5] = 0x00;
  302. sd->scr[6] = 0x00;
  303. sd->scr[7] = 0x00;
  304. }
  305. #define MID 0xaa
  306. #define OID "XY"
  307. #define PNM "QEMU!"
  308. #define PRV 0x01
  309. #define MDT_YR 2006
  310. #define MDT_MON 2
  311. static void sd_set_cid(SDState *sd)
  312. {
  313. sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
  314. sd->cid[1] = OID[0]; /* OEM/Application ID (OID) */
  315. sd->cid[2] = OID[1];
  316. sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
  317. sd->cid[4] = PNM[1];
  318. sd->cid[5] = PNM[2];
  319. sd->cid[6] = PNM[3];
  320. sd->cid[7] = PNM[4];
  321. sd->cid[8] = PRV; /* Fake product revision (PRV) */
  322. sd->cid[9] = 0xde; /* Fake serial number (PSN) */
  323. sd->cid[10] = 0xad;
  324. sd->cid[11] = 0xbe;
  325. sd->cid[12] = 0xef;
  326. sd->cid[13] = 0x00 | /* Manufacture date (MDT) */
  327. ((MDT_YR - 2000) / 10);
  328. sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
  329. sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
  330. }
  331. #define HWBLOCK_SHIFT 9 /* 512 bytes */
  332. #define SECTOR_SHIFT 5 /* 16 kilobytes */
  333. #define WPGROUP_SHIFT 7 /* 2 megs */
  334. #define CMULT_SHIFT 9 /* 512 times HWBLOCK_SIZE */
  335. #define WPGROUP_SIZE (1 << (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT))
  336. static const uint8_t sd_csd_rw_mask[16] = {
  337. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  338. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
  339. };
  340. static void sd_set_csd(SDState *sd, uint64_t size)
  341. {
  342. int hwblock_shift = HWBLOCK_SHIFT;
  343. uint32_t csize;
  344. uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
  345. uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
  346. /* To indicate 2 GiB card, BLOCK_LEN shall be 1024 bytes */
  347. if (size == SDSC_MAX_CAPACITY) {
  348. hwblock_shift += 1;
  349. }
  350. csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1;
  351. if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
  352. sd->csd[0] = 0x00; /* CSD structure */
  353. sd->csd[1] = 0x26; /* Data read access-time-1 */
  354. sd->csd[2] = 0x00; /* Data read access-time-2 */
  355. sd->csd[3] = 0x32; /* Max. data transfer rate: 25 MHz */
  356. sd->csd[4] = 0x5f; /* Card Command Classes */
  357. sd->csd[5] = 0x50 | /* Max. read data block length */
  358. hwblock_shift;
  359. sd->csd[6] = 0xe0 | /* Partial block for read allowed */
  360. ((csize >> 10) & 0x03);
  361. sd->csd[7] = 0x00 | /* Device size */
  362. ((csize >> 2) & 0xff);
  363. sd->csd[8] = 0x3f | /* Max. read current */
  364. ((csize << 6) & 0xc0);
  365. sd->csd[9] = 0xfc | /* Max. write current */
  366. ((CMULT_SHIFT - 2) >> 1);
  367. sd->csd[10] = 0x40 | /* Erase sector size */
  368. (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
  369. sd->csd[11] = 0x00 | /* Write protect group size */
  370. ((sectsize << 7) & 0x80) | wpsize;
  371. sd->csd[12] = 0x90 | /* Write speed factor */
  372. (hwblock_shift >> 2);
  373. sd->csd[13] = 0x20 | /* Max. write data block length */
  374. ((hwblock_shift << 6) & 0xc0);
  375. sd->csd[14] = 0x00; /* File format group */
  376. } else { /* SDHC */
  377. size /= 512 * KiB;
  378. size -= 1;
  379. sd->csd[0] = 0x40;
  380. sd->csd[1] = 0x0e;
  381. sd->csd[2] = 0x00;
  382. sd->csd[3] = 0x32;
  383. sd->csd[4] = 0x5b;
  384. sd->csd[5] = 0x59;
  385. sd->csd[6] = 0x00;
  386. sd->csd[7] = (size >> 16) & 0xff;
  387. sd->csd[8] = (size >> 8) & 0xff;
  388. sd->csd[9] = (size & 0xff);
  389. sd->csd[10] = 0x7f;
  390. sd->csd[11] = 0x80;
  391. sd->csd[12] = 0x0a;
  392. sd->csd[13] = 0x40;
  393. sd->csd[14] = 0x00;
  394. }
  395. sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
  396. }
  397. static void sd_set_rca(SDState *sd)
  398. {
  399. sd->rca += 0x4567;
  400. }
  401. FIELD(CSR, AKE_SEQ_ERROR, 3, 1)
  402. FIELD(CSR, APP_CMD, 5, 1)
  403. FIELD(CSR, FX_EVENT, 6, 1)
  404. FIELD(CSR, READY_FOR_DATA, 8, 1)
  405. FIELD(CSR, CURRENT_STATE, 9, 4)
  406. FIELD(CSR, ERASE_RESET, 13, 1)
  407. FIELD(CSR, CARD_ECC_DISABLED, 14, 1)
  408. FIELD(CSR, WP_ERASE_SKIP, 15, 1)
  409. FIELD(CSR, CSD_OVERWRITE, 16, 1)
  410. FIELD(CSR, DEFERRED_RESPONSE, 17, 1)
  411. FIELD(CSR, ERROR, 19, 1)
  412. FIELD(CSR, CC_ERROR, 20, 1)
  413. FIELD(CSR, CARD_ECC_FAILED, 21, 1)
  414. FIELD(CSR, ILLEGAL_COMMAND, 22, 1)
  415. FIELD(CSR, COM_CRC_ERROR, 23, 1)
  416. FIELD(CSR, LOCK_UNLOCK_FAILED, 24, 1)
  417. FIELD(CSR, CARD_IS_LOCKED, 25, 1)
  418. FIELD(CSR, WP_VIOLATION, 26, 1)
  419. FIELD(CSR, ERASE_PARAM, 27, 1)
  420. FIELD(CSR, ERASE_SEQ_ERROR, 28, 1)
  421. FIELD(CSR, BLOCK_LEN_ERROR, 29, 1)
  422. FIELD(CSR, ADDRESS_ERROR, 30, 1)
  423. FIELD(CSR, OUT_OF_RANGE, 31, 1)
  424. /* Card status bits, split by clear condition:
  425. * A : According to the card current state
  426. * B : Always related to the previous command
  427. * C : Cleared by read
  428. */
  429. #define CARD_STATUS_A (R_CSR_READY_FOR_DATA_MASK \
  430. | R_CSR_CARD_ECC_DISABLED_MASK \
  431. | R_CSR_CARD_IS_LOCKED_MASK)
  432. #define CARD_STATUS_B (R_CSR_CURRENT_STATE_MASK \
  433. | R_CSR_ILLEGAL_COMMAND_MASK \
  434. | R_CSR_COM_CRC_ERROR_MASK)
  435. #define CARD_STATUS_C (R_CSR_AKE_SEQ_ERROR_MASK \
  436. | R_CSR_APP_CMD_MASK \
  437. | R_CSR_ERASE_RESET_MASK \
  438. | R_CSR_WP_ERASE_SKIP_MASK \
  439. | R_CSR_CSD_OVERWRITE_MASK \
  440. | R_CSR_ERROR_MASK \
  441. | R_CSR_CC_ERROR_MASK \
  442. | R_CSR_CARD_ECC_FAILED_MASK \
  443. | R_CSR_LOCK_UNLOCK_FAILED_MASK \
  444. | R_CSR_WP_VIOLATION_MASK \
  445. | R_CSR_ERASE_PARAM_MASK \
  446. | R_CSR_ERASE_SEQ_ERROR_MASK \
  447. | R_CSR_BLOCK_LEN_ERROR_MASK \
  448. | R_CSR_ADDRESS_ERROR_MASK \
  449. | R_CSR_OUT_OF_RANGE_MASK)
  450. static void sd_set_cardstatus(SDState *sd)
  451. {
  452. sd->card_status = 0x00000100;
  453. }
  454. static void sd_set_sdstatus(SDState *sd)
  455. {
  456. memset(sd->sd_status, 0, 64);
  457. }
  458. static int sd_req_crc_validate(SDRequest *req)
  459. {
  460. uint8_t buffer[5];
  461. buffer[0] = 0x40 | req->cmd;
  462. stl_be_p(&buffer[1], req->arg);
  463. return 0;
  464. return sd_crc7(buffer, 5) != req->crc; /* TODO */
  465. }
  466. static void sd_response_r1_make(SDState *sd, uint8_t *response)
  467. {
  468. stl_be_p(response, sd->card_status);
  469. /* Clear the "clear on read" status bits */
  470. sd->card_status &= ~CARD_STATUS_C;
  471. }
  472. static void sd_response_r3_make(SDState *sd, uint8_t *response)
  473. {
  474. stl_be_p(response, sd->ocr & ACMD41_R3_MASK);
  475. }
  476. static void sd_response_r6_make(SDState *sd, uint8_t *response)
  477. {
  478. uint16_t status;
  479. status = ((sd->card_status >> 8) & 0xc000) |
  480. ((sd->card_status >> 6) & 0x2000) |
  481. (sd->card_status & 0x1fff);
  482. sd->card_status &= ~(CARD_STATUS_C & 0xc81fff);
  483. stw_be_p(response + 0, sd->rca);
  484. stw_be_p(response + 2, status);
  485. }
  486. static void sd_response_r7_make(SDState *sd, uint8_t *response)
  487. {
  488. stl_be_p(response, sd->vhs);
  489. }
  490. static inline uint64_t sd_addr_to_wpnum(uint64_t addr)
  491. {
  492. return addr >> (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT);
  493. }
  494. static void sd_reset(DeviceState *dev)
  495. {
  496. SDState *sd = SD_CARD(dev);
  497. uint64_t size;
  498. uint64_t sect;
  499. trace_sdcard_reset();
  500. if (sd->blk) {
  501. blk_get_geometry(sd->blk, &sect);
  502. } else {
  503. sect = 0;
  504. }
  505. size = sect << 9;
  506. sect = sd_addr_to_wpnum(size) + 1;
  507. sd->state = sd_idle_state;
  508. sd->rca = 0x0000;
  509. sd->size = size;
  510. sd_set_ocr(sd);
  511. sd_set_scr(sd);
  512. sd_set_cid(sd);
  513. sd_set_csd(sd, size);
  514. sd_set_cardstatus(sd);
  515. sd_set_sdstatus(sd);
  516. g_free(sd->wp_group_bmap);
  517. sd->wp_switch = sd->blk ? !blk_is_writable(sd->blk) : false;
  518. sd->wp_group_bits = sect;
  519. sd->wp_group_bmap = bitmap_new(sd->wp_group_bits);
  520. memset(sd->function_group, 0, sizeof(sd->function_group));
  521. sd->erase_start = INVALID_ADDRESS;
  522. sd->erase_end = INVALID_ADDRESS;
  523. sd->blk_len = 0x200;
  524. sd->pwd_len = 0;
  525. sd->expecting_acmd = false;
  526. sd->dat_lines = 0xf;
  527. sd->cmd_line = true;
  528. sd->multi_blk_cnt = 0;
  529. }
  530. static bool sd_get_inserted(SDState *sd)
  531. {
  532. return sd->blk && blk_is_inserted(sd->blk);
  533. }
  534. static bool sd_get_readonly(SDState *sd)
  535. {
  536. return sd->wp_switch;
  537. }
  538. static void sd_cardchange(void *opaque, bool load, Error **errp)
  539. {
  540. SDState *sd = opaque;
  541. DeviceState *dev = DEVICE(sd);
  542. SDBus *sdbus;
  543. bool inserted = sd_get_inserted(sd);
  544. bool readonly = sd_get_readonly(sd);
  545. if (inserted) {
  546. trace_sdcard_inserted(readonly);
  547. sd_reset(dev);
  548. } else {
  549. trace_sdcard_ejected();
  550. }
  551. if (sd->me_no_qdev_me_kill_mammoth_with_rocks) {
  552. qemu_set_irq(sd->inserted_cb, inserted);
  553. if (inserted) {
  554. qemu_set_irq(sd->readonly_cb, readonly);
  555. }
  556. } else {
  557. sdbus = SD_BUS(qdev_get_parent_bus(dev));
  558. sdbus_set_inserted(sdbus, inserted);
  559. if (inserted) {
  560. sdbus_set_readonly(sdbus, readonly);
  561. }
  562. }
  563. }
  564. static const BlockDevOps sd_block_ops = {
  565. .change_media_cb = sd_cardchange,
  566. };
  567. static bool sd_ocr_vmstate_needed(void *opaque)
  568. {
  569. SDState *sd = opaque;
  570. /* Include the OCR state (and timer) if it is not yet powered up */
  571. return !FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP);
  572. }
  573. static const VMStateDescription sd_ocr_vmstate = {
  574. .name = "sd-card/ocr-state",
  575. .version_id = 1,
  576. .minimum_version_id = 1,
  577. .needed = sd_ocr_vmstate_needed,
  578. .fields = (VMStateField[]) {
  579. VMSTATE_UINT32(ocr, SDState),
  580. VMSTATE_TIMER_PTR(ocr_power_timer, SDState),
  581. VMSTATE_END_OF_LIST()
  582. },
  583. };
  584. static int sd_vmstate_pre_load(void *opaque)
  585. {
  586. SDState *sd = opaque;
  587. /* If the OCR state is not included (prior versions, or not
  588. * needed), then the OCR must be set as powered up. If the OCR state
  589. * is included, this will be replaced by the state restore.
  590. */
  591. sd_ocr_powerup(sd);
  592. return 0;
  593. }
  594. static const VMStateDescription sd_vmstate = {
  595. .name = "sd-card",
  596. .version_id = 2,
  597. .minimum_version_id = 2,
  598. .pre_load = sd_vmstate_pre_load,
  599. .fields = (VMStateField[]) {
  600. VMSTATE_UINT32(mode, SDState),
  601. VMSTATE_INT32(state, SDState),
  602. VMSTATE_UINT8_ARRAY(cid, SDState, 16),
  603. VMSTATE_UINT8_ARRAY(csd, SDState, 16),
  604. VMSTATE_UINT16(rca, SDState),
  605. VMSTATE_UINT32(card_status, SDState),
  606. VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
  607. VMSTATE_UINT32(vhs, SDState),
  608. VMSTATE_BITMAP(wp_group_bmap, SDState, 0, wp_group_bits),
  609. VMSTATE_UINT32(blk_len, SDState),
  610. VMSTATE_UINT32(multi_blk_cnt, SDState),
  611. VMSTATE_UINT32(erase_start, SDState),
  612. VMSTATE_UINT32(erase_end, SDState),
  613. VMSTATE_UINT8_ARRAY(pwd, SDState, 16),
  614. VMSTATE_UINT32(pwd_len, SDState),
  615. VMSTATE_UINT8_ARRAY(function_group, SDState, 6),
  616. VMSTATE_UINT8(current_cmd, SDState),
  617. VMSTATE_BOOL(expecting_acmd, SDState),
  618. VMSTATE_UINT32(blk_written, SDState),
  619. VMSTATE_UINT64(data_start, SDState),
  620. VMSTATE_UINT32(data_offset, SDState),
  621. VMSTATE_UINT8_ARRAY(data, SDState, 512),
  622. VMSTATE_UNUSED_V(1, 512),
  623. VMSTATE_BOOL(enable, SDState),
  624. VMSTATE_END_OF_LIST()
  625. },
  626. .subsections = (const VMStateDescription*[]) {
  627. &sd_ocr_vmstate,
  628. NULL
  629. },
  630. };
  631. /* Legacy initialization function for use by non-qdevified callers */
  632. SDState *sd_init(BlockBackend *blk, bool is_spi)
  633. {
  634. Object *obj;
  635. DeviceState *dev;
  636. SDState *sd;
  637. Error *err = NULL;
  638. obj = object_new(TYPE_SD_CARD);
  639. dev = DEVICE(obj);
  640. if (!qdev_prop_set_drive_err(dev, "drive", blk, &err)) {
  641. error_reportf_err(err, "sd_init failed: ");
  642. return NULL;
  643. }
  644. qdev_prop_set_bit(dev, "spi", is_spi);
  645. /*
  646. * Realizing the device properly would put it into the QOM
  647. * composition tree even though it is not plugged into an
  648. * appropriate bus. That's a no-no. Hide the device from
  649. * QOM/qdev, and call its qdev realize callback directly.
  650. */
  651. object_ref(obj);
  652. object_unparent(obj);
  653. sd_realize(dev, &err);
  654. if (err) {
  655. error_reportf_err(err, "sd_init failed: ");
  656. return NULL;
  657. }
  658. sd = SD_CARD(dev);
  659. sd->me_no_qdev_me_kill_mammoth_with_rocks = true;
  660. return sd;
  661. }
  662. void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert)
  663. {
  664. sd->readonly_cb = readonly;
  665. sd->inserted_cb = insert;
  666. qemu_set_irq(readonly, sd->blk ? !blk_is_writable(sd->blk) : 0);
  667. qemu_set_irq(insert, sd->blk ? blk_is_inserted(sd->blk) : 0);
  668. }
  669. static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
  670. {
  671. trace_sdcard_read_block(addr, len);
  672. if (!sd->blk || blk_pread(sd->blk, addr, len, sd->data, 0) < 0) {
  673. fprintf(stderr, "sd_blk_read: read error on host side\n");
  674. }
  675. }
  676. static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
  677. {
  678. trace_sdcard_write_block(addr, len);
  679. if (!sd->blk || blk_pwrite(sd->blk, addr, len, sd->data, 0) < 0) {
  680. fprintf(stderr, "sd_blk_write: write error on host side\n");
  681. }
  682. }
  683. #define BLK_READ_BLOCK(a, len) sd_blk_read(sd, a, len)
  684. #define BLK_WRITE_BLOCK(a, len) sd_blk_write(sd, a, len)
  685. #define APP_READ_BLOCK(a, len) memset(sd->data, 0xec, len)
  686. #define APP_WRITE_BLOCK(a, len)
  687. static void sd_erase(SDState *sd)
  688. {
  689. uint64_t erase_start = sd->erase_start;
  690. uint64_t erase_end = sd->erase_end;
  691. bool sdsc = true;
  692. uint64_t wpnum;
  693. uint64_t erase_addr;
  694. int erase_len = 1 << HWBLOCK_SHIFT;
  695. trace_sdcard_erase(sd->erase_start, sd->erase_end);
  696. if (sd->erase_start == INVALID_ADDRESS
  697. || sd->erase_end == INVALID_ADDRESS) {
  698. sd->card_status |= ERASE_SEQ_ERROR;
  699. sd->erase_start = INVALID_ADDRESS;
  700. sd->erase_end = INVALID_ADDRESS;
  701. return;
  702. }
  703. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  704. /* High capacity memory card: erase units are 512 byte blocks */
  705. erase_start *= 512;
  706. erase_end *= 512;
  707. sdsc = false;
  708. }
  709. if (erase_start > sd->size || erase_end > sd->size) {
  710. sd->card_status |= OUT_OF_RANGE;
  711. sd->erase_start = INVALID_ADDRESS;
  712. sd->erase_end = INVALID_ADDRESS;
  713. return;
  714. }
  715. sd->erase_start = INVALID_ADDRESS;
  716. sd->erase_end = INVALID_ADDRESS;
  717. sd->csd[14] |= 0x40;
  718. memset(sd->data, 0xff, erase_len);
  719. for (erase_addr = erase_start; erase_addr <= erase_end;
  720. erase_addr += erase_len) {
  721. if (sdsc) {
  722. /* Only SDSC cards support write protect groups */
  723. wpnum = sd_addr_to_wpnum(erase_addr);
  724. assert(wpnum < sd->wp_group_bits);
  725. if (test_bit(wpnum, sd->wp_group_bmap)) {
  726. sd->card_status |= WP_ERASE_SKIP;
  727. continue;
  728. }
  729. }
  730. BLK_WRITE_BLOCK(erase_addr, erase_len);
  731. }
  732. }
  733. static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
  734. {
  735. uint32_t i, wpnum;
  736. uint32_t ret = 0;
  737. wpnum = sd_addr_to_wpnum(addr);
  738. for (i = 0; i < 32; i++, wpnum++, addr += WPGROUP_SIZE) {
  739. if (addr >= sd->size) {
  740. /*
  741. * If the addresses of the last groups are outside the valid range,
  742. * then the corresponding write protection bits shall be set to 0.
  743. */
  744. continue;
  745. }
  746. assert(wpnum < sd->wp_group_bits);
  747. if (test_bit(wpnum, sd->wp_group_bmap)) {
  748. ret |= (1 << i);
  749. }
  750. }
  751. return ret;
  752. }
  753. static void sd_function_switch(SDState *sd, uint32_t arg)
  754. {
  755. int i, mode, new_func;
  756. mode = !!(arg & 0x80000000);
  757. sd->data[0] = 0x00; /* Maximum current consumption */
  758. sd->data[1] = 0x01;
  759. sd->data[2] = 0x80; /* Supported group 6 functions */
  760. sd->data[3] = 0x01;
  761. sd->data[4] = 0x80; /* Supported group 5 functions */
  762. sd->data[5] = 0x01;
  763. sd->data[6] = 0x80; /* Supported group 4 functions */
  764. sd->data[7] = 0x01;
  765. sd->data[8] = 0x80; /* Supported group 3 functions */
  766. sd->data[9] = 0x01;
  767. sd->data[10] = 0x80; /* Supported group 2 functions */
  768. sd->data[11] = 0x43;
  769. sd->data[12] = 0x80; /* Supported group 1 functions */
  770. sd->data[13] = 0x03;
  771. memset(&sd->data[14], 0, 3);
  772. for (i = 0; i < 6; i ++) {
  773. new_func = (arg >> (i * 4)) & 0x0f;
  774. if (mode && new_func != 0x0f)
  775. sd->function_group[i] = new_func;
  776. sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
  777. }
  778. memset(&sd->data[17], 0, 47);
  779. }
  780. static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
  781. {
  782. return test_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  783. }
  784. static void sd_lock_command(SDState *sd)
  785. {
  786. int erase, lock, clr_pwd, set_pwd, pwd_len;
  787. erase = !!(sd->data[0] & 0x08);
  788. lock = sd->data[0] & 0x04;
  789. clr_pwd = sd->data[0] & 0x02;
  790. set_pwd = sd->data[0] & 0x01;
  791. if (sd->blk_len > 1)
  792. pwd_len = sd->data[1];
  793. else
  794. pwd_len = 0;
  795. if (lock) {
  796. trace_sdcard_lock();
  797. } else {
  798. trace_sdcard_unlock();
  799. }
  800. if (erase) {
  801. if (!(sd->card_status & CARD_IS_LOCKED) || sd->blk_len > 1 ||
  802. set_pwd || clr_pwd || lock || sd->wp_switch ||
  803. (sd->csd[14] & 0x20)) {
  804. sd->card_status |= LOCK_UNLOCK_FAILED;
  805. return;
  806. }
  807. bitmap_zero(sd->wp_group_bmap, sd->wp_group_bits);
  808. sd->csd[14] &= ~0x10;
  809. sd->card_status &= ~CARD_IS_LOCKED;
  810. sd->pwd_len = 0;
  811. /* Erasing the entire card here! */
  812. fprintf(stderr, "SD: Card force-erased by CMD42\n");
  813. return;
  814. }
  815. if (sd->blk_len < 2 + pwd_len ||
  816. pwd_len <= sd->pwd_len ||
  817. pwd_len > sd->pwd_len + 16) {
  818. sd->card_status |= LOCK_UNLOCK_FAILED;
  819. return;
  820. }
  821. if (sd->pwd_len && memcmp(sd->pwd, sd->data + 2, sd->pwd_len)) {
  822. sd->card_status |= LOCK_UNLOCK_FAILED;
  823. return;
  824. }
  825. pwd_len -= sd->pwd_len;
  826. if ((pwd_len && !set_pwd) ||
  827. (clr_pwd && (set_pwd || lock)) ||
  828. (lock && !sd->pwd_len && !set_pwd) ||
  829. (!set_pwd && !clr_pwd &&
  830. (((sd->card_status & CARD_IS_LOCKED) && lock) ||
  831. (!(sd->card_status & CARD_IS_LOCKED) && !lock)))) {
  832. sd->card_status |= LOCK_UNLOCK_FAILED;
  833. return;
  834. }
  835. if (set_pwd) {
  836. memcpy(sd->pwd, sd->data + 2 + sd->pwd_len, pwd_len);
  837. sd->pwd_len = pwd_len;
  838. }
  839. if (clr_pwd) {
  840. sd->pwd_len = 0;
  841. }
  842. if (lock)
  843. sd->card_status |= CARD_IS_LOCKED;
  844. else
  845. sd->card_status &= ~CARD_IS_LOCKED;
  846. }
  847. static bool address_in_range(SDState *sd, const char *desc,
  848. uint64_t addr, uint32_t length)
  849. {
  850. if (addr + length > sd->size) {
  851. qemu_log_mask(LOG_GUEST_ERROR,
  852. "%s offset %"PRIu64" > card %"PRIu64" [%%%u]\n",
  853. desc, addr, sd->size, length);
  854. sd->card_status |= ADDRESS_ERROR;
  855. return false;
  856. }
  857. return true;
  858. }
  859. static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
  860. {
  861. uint32_t rca = 0x0000;
  862. uint64_t addr = (sd->ocr & (1 << 30)) ? (uint64_t) req.arg << 9 : req.arg;
  863. /* CMD55 precedes an ACMD, so we are not interested in tracing it.
  864. * However there is no ACMD55, so we want to trace this particular case.
  865. */
  866. if (req.cmd != 55 || sd->expecting_acmd) {
  867. trace_sdcard_normal_command(sd->proto_name,
  868. sd_cmd_name(req.cmd), req.cmd,
  869. req.arg, sd_state_name(sd->state));
  870. }
  871. /* Not interpreting this as an app command */
  872. sd->card_status &= ~APP_CMD;
  873. if (sd_cmd_type[req.cmd] == sd_ac
  874. || sd_cmd_type[req.cmd] == sd_adtc) {
  875. rca = req.arg >> 16;
  876. }
  877. /* CMD23 (set block count) must be immediately followed by CMD18 or CMD25
  878. * if not, its effects are cancelled */
  879. if (sd->multi_blk_cnt != 0 && !(req.cmd == 18 || req.cmd == 25)) {
  880. sd->multi_blk_cnt = 0;
  881. }
  882. if (sd_cmd_class[req.cmd] == 6 && FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  883. /* Only Standard Capacity cards support class 6 commands */
  884. return sd_illegal;
  885. }
  886. switch (req.cmd) {
  887. /* Basic commands (Class 0 and Class 1) */
  888. case 0: /* CMD0: GO_IDLE_STATE */
  889. switch (sd->state) {
  890. case sd_inactive_state:
  891. return sd->spi ? sd_r1 : sd_r0;
  892. default:
  893. sd->state = sd_idle_state;
  894. sd_reset(DEVICE(sd));
  895. return sd->spi ? sd_r1 : sd_r0;
  896. }
  897. break;
  898. case 1: /* CMD1: SEND_OP_CMD */
  899. if (!sd->spi)
  900. goto bad_cmd;
  901. sd->state = sd_transfer_state;
  902. return sd_r1;
  903. case 2: /* CMD2: ALL_SEND_CID */
  904. if (sd->spi)
  905. goto bad_cmd;
  906. switch (sd->state) {
  907. case sd_ready_state:
  908. sd->state = sd_identification_state;
  909. return sd_r2_i;
  910. default:
  911. break;
  912. }
  913. break;
  914. case 3: /* CMD3: SEND_RELATIVE_ADDR */
  915. if (sd->spi)
  916. goto bad_cmd;
  917. switch (sd->state) {
  918. case sd_identification_state:
  919. case sd_standby_state:
  920. sd->state = sd_standby_state;
  921. sd_set_rca(sd);
  922. return sd_r6;
  923. default:
  924. break;
  925. }
  926. break;
  927. case 4: /* CMD4: SEND_DSR */
  928. if (sd->spi)
  929. goto bad_cmd;
  930. switch (sd->state) {
  931. case sd_standby_state:
  932. break;
  933. default:
  934. break;
  935. }
  936. break;
  937. case 5: /* CMD5: reserved for SDIO cards */
  938. return sd_illegal;
  939. case 6: /* CMD6: SWITCH_FUNCTION */
  940. switch (sd->mode) {
  941. case sd_data_transfer_mode:
  942. sd_function_switch(sd, req.arg);
  943. sd->state = sd_sendingdata_state;
  944. sd->data_start = 0;
  945. sd->data_offset = 0;
  946. return sd_r1;
  947. default:
  948. break;
  949. }
  950. break;
  951. case 7: /* CMD7: SELECT/DESELECT_CARD */
  952. if (sd->spi)
  953. goto bad_cmd;
  954. switch (sd->state) {
  955. case sd_standby_state:
  956. if (sd->rca != rca)
  957. return sd_r0;
  958. sd->state = sd_transfer_state;
  959. return sd_r1b;
  960. case sd_transfer_state:
  961. case sd_sendingdata_state:
  962. if (sd->rca == rca)
  963. break;
  964. sd->state = sd_standby_state;
  965. return sd_r1b;
  966. case sd_disconnect_state:
  967. if (sd->rca != rca)
  968. return sd_r0;
  969. sd->state = sd_programming_state;
  970. return sd_r1b;
  971. case sd_programming_state:
  972. if (sd->rca == rca)
  973. break;
  974. sd->state = sd_disconnect_state;
  975. return sd_r1b;
  976. default:
  977. break;
  978. }
  979. break;
  980. case 8: /* CMD8: SEND_IF_COND */
  981. if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
  982. break;
  983. }
  984. if (sd->state != sd_idle_state) {
  985. break;
  986. }
  987. sd->vhs = 0;
  988. /* No response if not exactly one VHS bit is set. */
  989. if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
  990. return sd->spi ? sd_r7 : sd_r0;
  991. }
  992. /* Accept. */
  993. sd->vhs = req.arg;
  994. return sd_r7;
  995. case 9: /* CMD9: SEND_CSD */
  996. switch (sd->state) {
  997. case sd_standby_state:
  998. if (sd->rca != rca)
  999. return sd_r0;
  1000. return sd_r2_s;
  1001. case sd_transfer_state:
  1002. if (!sd->spi)
  1003. break;
  1004. sd->state = sd_sendingdata_state;
  1005. memcpy(sd->data, sd->csd, 16);
  1006. sd->data_start = addr;
  1007. sd->data_offset = 0;
  1008. return sd_r1;
  1009. default:
  1010. break;
  1011. }
  1012. break;
  1013. case 10: /* CMD10: SEND_CID */
  1014. switch (sd->state) {
  1015. case sd_standby_state:
  1016. if (sd->rca != rca)
  1017. return sd_r0;
  1018. return sd_r2_i;
  1019. case sd_transfer_state:
  1020. if (!sd->spi)
  1021. break;
  1022. sd->state = sd_sendingdata_state;
  1023. memcpy(sd->data, sd->cid, 16);
  1024. sd->data_start = addr;
  1025. sd->data_offset = 0;
  1026. return sd_r1;
  1027. default:
  1028. break;
  1029. }
  1030. break;
  1031. case 12: /* CMD12: STOP_TRANSMISSION */
  1032. switch (sd->state) {
  1033. case sd_sendingdata_state:
  1034. sd->state = sd_transfer_state;
  1035. return sd_r1b;
  1036. case sd_receivingdata_state:
  1037. sd->state = sd_programming_state;
  1038. /* Bzzzzzzztt .... Operation complete. */
  1039. sd->state = sd_transfer_state;
  1040. return sd_r1b;
  1041. default:
  1042. break;
  1043. }
  1044. break;
  1045. case 13: /* CMD13: SEND_STATUS */
  1046. switch (sd->mode) {
  1047. case sd_data_transfer_mode:
  1048. if (!sd->spi && sd->rca != rca) {
  1049. return sd_r0;
  1050. }
  1051. return sd_r1;
  1052. default:
  1053. break;
  1054. }
  1055. break;
  1056. case 15: /* CMD15: GO_INACTIVE_STATE */
  1057. if (sd->spi)
  1058. goto bad_cmd;
  1059. switch (sd->mode) {
  1060. case sd_data_transfer_mode:
  1061. if (sd->rca != rca)
  1062. return sd_r0;
  1063. sd->state = sd_inactive_state;
  1064. return sd_r0;
  1065. default:
  1066. break;
  1067. }
  1068. break;
  1069. /* Block read commands (Classs 2) */
  1070. case 16: /* CMD16: SET_BLOCKLEN */
  1071. switch (sd->state) {
  1072. case sd_transfer_state:
  1073. if (req.arg > (1 << HWBLOCK_SHIFT)) {
  1074. sd->card_status |= BLOCK_LEN_ERROR;
  1075. } else {
  1076. trace_sdcard_set_blocklen(req.arg);
  1077. sd->blk_len = req.arg;
  1078. }
  1079. return sd_r1;
  1080. default:
  1081. break;
  1082. }
  1083. break;
  1084. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1085. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1086. switch (sd->state) {
  1087. case sd_transfer_state:
  1088. if (!address_in_range(sd, "READ_BLOCK", addr, sd->blk_len)) {
  1089. return sd_r1;
  1090. }
  1091. sd->state = sd_sendingdata_state;
  1092. sd->data_start = addr;
  1093. sd->data_offset = 0;
  1094. return sd_r1;
  1095. default:
  1096. break;
  1097. }
  1098. break;
  1099. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1100. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1101. break;
  1102. }
  1103. if (sd->state == sd_transfer_state) {
  1104. sd->state = sd_sendingdata_state;
  1105. sd->data_offset = 0;
  1106. return sd_r1;
  1107. }
  1108. break;
  1109. case 23: /* CMD23: SET_BLOCK_COUNT */
  1110. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1111. break;
  1112. }
  1113. switch (sd->state) {
  1114. case sd_transfer_state:
  1115. sd->multi_blk_cnt = req.arg;
  1116. return sd_r1;
  1117. default:
  1118. break;
  1119. }
  1120. break;
  1121. /* Block write commands (Class 4) */
  1122. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1123. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1124. switch (sd->state) {
  1125. case sd_transfer_state:
  1126. if (!address_in_range(sd, "WRITE_BLOCK", addr, sd->blk_len)) {
  1127. return sd_r1;
  1128. }
  1129. sd->state = sd_receivingdata_state;
  1130. sd->data_start = addr;
  1131. sd->data_offset = 0;
  1132. sd->blk_written = 0;
  1133. if (sd->size <= SDSC_MAX_CAPACITY) {
  1134. if (sd_wp_addr(sd, sd->data_start)) {
  1135. sd->card_status |= WP_VIOLATION;
  1136. }
  1137. }
  1138. if (sd->csd[14] & 0x30) {
  1139. sd->card_status |= WP_VIOLATION;
  1140. }
  1141. return sd_r1;
  1142. default:
  1143. break;
  1144. }
  1145. break;
  1146. case 26: /* CMD26: PROGRAM_CID */
  1147. if (sd->spi)
  1148. goto bad_cmd;
  1149. switch (sd->state) {
  1150. case sd_transfer_state:
  1151. sd->state = sd_receivingdata_state;
  1152. sd->data_start = 0;
  1153. sd->data_offset = 0;
  1154. return sd_r1;
  1155. default:
  1156. break;
  1157. }
  1158. break;
  1159. case 27: /* CMD27: PROGRAM_CSD */
  1160. switch (sd->state) {
  1161. case sd_transfer_state:
  1162. sd->state = sd_receivingdata_state;
  1163. sd->data_start = 0;
  1164. sd->data_offset = 0;
  1165. return sd_r1;
  1166. default:
  1167. break;
  1168. }
  1169. break;
  1170. /* Write protection (Class 6) */
  1171. case 28: /* CMD28: SET_WRITE_PROT */
  1172. if (sd->size > SDSC_MAX_CAPACITY) {
  1173. return sd_illegal;
  1174. }
  1175. switch (sd->state) {
  1176. case sd_transfer_state:
  1177. if (!address_in_range(sd, "SET_WRITE_PROT", addr, 1)) {
  1178. return sd_r1b;
  1179. }
  1180. sd->state = sd_programming_state;
  1181. set_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  1182. /* Bzzzzzzztt .... Operation complete. */
  1183. sd->state = sd_transfer_state;
  1184. return sd_r1b;
  1185. default:
  1186. break;
  1187. }
  1188. break;
  1189. case 29: /* CMD29: CLR_WRITE_PROT */
  1190. if (sd->size > SDSC_MAX_CAPACITY) {
  1191. return sd_illegal;
  1192. }
  1193. switch (sd->state) {
  1194. case sd_transfer_state:
  1195. if (!address_in_range(sd, "CLR_WRITE_PROT", addr, 1)) {
  1196. return sd_r1b;
  1197. }
  1198. sd->state = sd_programming_state;
  1199. clear_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  1200. /* Bzzzzzzztt .... Operation complete. */
  1201. sd->state = sd_transfer_state;
  1202. return sd_r1b;
  1203. default:
  1204. break;
  1205. }
  1206. break;
  1207. case 30: /* CMD30: SEND_WRITE_PROT */
  1208. if (sd->size > SDSC_MAX_CAPACITY) {
  1209. return sd_illegal;
  1210. }
  1211. switch (sd->state) {
  1212. case sd_transfer_state:
  1213. if (!address_in_range(sd, "SEND_WRITE_PROT",
  1214. req.arg, sd->blk_len)) {
  1215. return sd_r1;
  1216. }
  1217. sd->state = sd_sendingdata_state;
  1218. *(uint32_t *) sd->data = sd_wpbits(sd, req.arg);
  1219. sd->data_start = addr;
  1220. sd->data_offset = 0;
  1221. return sd_r1;
  1222. default:
  1223. break;
  1224. }
  1225. break;
  1226. /* Erase commands (Class 5) */
  1227. case 32: /* CMD32: ERASE_WR_BLK_START */
  1228. switch (sd->state) {
  1229. case sd_transfer_state:
  1230. sd->erase_start = req.arg;
  1231. return sd_r1;
  1232. default:
  1233. break;
  1234. }
  1235. break;
  1236. case 33: /* CMD33: ERASE_WR_BLK_END */
  1237. switch (sd->state) {
  1238. case sd_transfer_state:
  1239. sd->erase_end = req.arg;
  1240. return sd_r1;
  1241. default:
  1242. break;
  1243. }
  1244. break;
  1245. case 38: /* CMD38: ERASE */
  1246. switch (sd->state) {
  1247. case sd_transfer_state:
  1248. if (sd->csd[14] & 0x30) {
  1249. sd->card_status |= WP_VIOLATION;
  1250. return sd_r1b;
  1251. }
  1252. sd->state = sd_programming_state;
  1253. sd_erase(sd);
  1254. /* Bzzzzzzztt .... Operation complete. */
  1255. sd->state = sd_transfer_state;
  1256. return sd_r1b;
  1257. default:
  1258. break;
  1259. }
  1260. break;
  1261. /* Lock card commands (Class 7) */
  1262. case 42: /* CMD42: LOCK_UNLOCK */
  1263. switch (sd->state) {
  1264. case sd_transfer_state:
  1265. sd->state = sd_receivingdata_state;
  1266. sd->data_start = 0;
  1267. sd->data_offset = 0;
  1268. return sd_r1;
  1269. default:
  1270. break;
  1271. }
  1272. break;
  1273. case 52 ... 54:
  1274. /* CMD52, CMD53, CMD54: reserved for SDIO cards
  1275. * (see the SDIO Simplified Specification V2.0)
  1276. * Handle as illegal command but do not complain
  1277. * on stderr, as some OSes may use these in their
  1278. * probing for presence of an SDIO card.
  1279. */
  1280. return sd_illegal;
  1281. /* Application specific commands (Class 8) */
  1282. case 55: /* CMD55: APP_CMD */
  1283. switch (sd->state) {
  1284. case sd_ready_state:
  1285. case sd_identification_state:
  1286. case sd_inactive_state:
  1287. return sd_illegal;
  1288. case sd_idle_state:
  1289. if (rca) {
  1290. qemu_log_mask(LOG_GUEST_ERROR,
  1291. "SD: illegal RCA 0x%04x for APP_CMD\n", req.cmd);
  1292. }
  1293. default:
  1294. break;
  1295. }
  1296. if (!sd->spi) {
  1297. if (sd->rca != rca) {
  1298. return sd_r0;
  1299. }
  1300. }
  1301. sd->expecting_acmd = true;
  1302. sd->card_status |= APP_CMD;
  1303. return sd_r1;
  1304. case 56: /* CMD56: GEN_CMD */
  1305. switch (sd->state) {
  1306. case sd_transfer_state:
  1307. sd->data_offset = 0;
  1308. if (req.arg & 1)
  1309. sd->state = sd_sendingdata_state;
  1310. else
  1311. sd->state = sd_receivingdata_state;
  1312. return sd_r1;
  1313. default:
  1314. break;
  1315. }
  1316. break;
  1317. case 58: /* CMD58: READ_OCR (SPI) */
  1318. if (!sd->spi) {
  1319. goto bad_cmd;
  1320. }
  1321. return sd_r3;
  1322. case 59: /* CMD59: CRC_ON_OFF (SPI) */
  1323. if (!sd->spi) {
  1324. goto bad_cmd;
  1325. }
  1326. return sd_r1;
  1327. default:
  1328. bad_cmd:
  1329. qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
  1330. return sd_illegal;
  1331. }
  1332. qemu_log_mask(LOG_GUEST_ERROR, "SD: CMD%i in a wrong state: %s\n",
  1333. req.cmd, sd_state_name(sd->state));
  1334. return sd_illegal;
  1335. }
  1336. static sd_rsp_type_t sd_app_command(SDState *sd,
  1337. SDRequest req)
  1338. {
  1339. trace_sdcard_app_command(sd->proto_name, sd_acmd_name(req.cmd),
  1340. req.cmd, req.arg, sd_state_name(sd->state));
  1341. sd->card_status |= APP_CMD;
  1342. switch (req.cmd) {
  1343. case 6: /* ACMD6: SET_BUS_WIDTH */
  1344. if (sd->spi) {
  1345. goto unimplemented_spi_cmd;
  1346. }
  1347. switch (sd->state) {
  1348. case sd_transfer_state:
  1349. sd->sd_status[0] &= 0x3f;
  1350. sd->sd_status[0] |= (req.arg & 0x03) << 6;
  1351. return sd_r1;
  1352. default:
  1353. break;
  1354. }
  1355. break;
  1356. case 13: /* ACMD13: SD_STATUS */
  1357. switch (sd->state) {
  1358. case sd_transfer_state:
  1359. sd->state = sd_sendingdata_state;
  1360. sd->data_start = 0;
  1361. sd->data_offset = 0;
  1362. return sd_r1;
  1363. default:
  1364. break;
  1365. }
  1366. break;
  1367. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1368. switch (sd->state) {
  1369. case sd_transfer_state:
  1370. *(uint32_t *) sd->data = sd->blk_written;
  1371. sd->state = sd_sendingdata_state;
  1372. sd->data_start = 0;
  1373. sd->data_offset = 0;
  1374. return sd_r1;
  1375. default:
  1376. break;
  1377. }
  1378. break;
  1379. case 23: /* ACMD23: SET_WR_BLK_ERASE_COUNT */
  1380. switch (sd->state) {
  1381. case sd_transfer_state:
  1382. return sd_r1;
  1383. default:
  1384. break;
  1385. }
  1386. break;
  1387. case 41: /* ACMD41: SD_APP_OP_COND */
  1388. if (sd->spi) {
  1389. /* SEND_OP_CMD */
  1390. sd->state = sd_transfer_state;
  1391. return sd_r1;
  1392. }
  1393. if (sd->state != sd_idle_state) {
  1394. break;
  1395. }
  1396. /* If it's the first ACMD41 since reset, we need to decide
  1397. * whether to power up. If this is not an enquiry ACMD41,
  1398. * we immediately report power on and proceed below to the
  1399. * ready state, but if it is, we set a timer to model a
  1400. * delay for power up. This works around a bug in EDK2
  1401. * UEFI, which sends an initial enquiry ACMD41, but
  1402. * assumes that the card is in ready state as soon as it
  1403. * sees the power up bit set. */
  1404. if (!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP)) {
  1405. if ((req.arg & ACMD41_ENQUIRY_MASK) != 0) {
  1406. timer_del(sd->ocr_power_timer);
  1407. sd_ocr_powerup(sd);
  1408. } else {
  1409. trace_sdcard_inquiry_cmd41();
  1410. if (!timer_pending(sd->ocr_power_timer)) {
  1411. timer_mod_ns(sd->ocr_power_timer,
  1412. (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  1413. + OCR_POWER_DELAY_NS));
  1414. }
  1415. }
  1416. }
  1417. if (FIELD_EX32(sd->ocr & req.arg, OCR, VDD_VOLTAGE_WINDOW)) {
  1418. /* We accept any voltage. 10000 V is nothing.
  1419. *
  1420. * Once we're powered up, we advance straight to ready state
  1421. * unless it's an enquiry ACMD41 (bits 23:0 == 0).
  1422. */
  1423. sd->state = sd_ready_state;
  1424. }
  1425. return sd_r3;
  1426. case 42: /* ACMD42: SET_CLR_CARD_DETECT */
  1427. switch (sd->state) {
  1428. case sd_transfer_state:
  1429. /* Bringing in the 50KOhm pull-up resistor... Done. */
  1430. return sd_r1;
  1431. default:
  1432. break;
  1433. }
  1434. break;
  1435. case 51: /* ACMD51: SEND_SCR */
  1436. switch (sd->state) {
  1437. case sd_transfer_state:
  1438. sd->state = sd_sendingdata_state;
  1439. sd->data_start = 0;
  1440. sd->data_offset = 0;
  1441. return sd_r1;
  1442. default:
  1443. break;
  1444. }
  1445. break;
  1446. case 18: /* Reserved for SD security applications */
  1447. case 25:
  1448. case 26:
  1449. case 38:
  1450. case 43 ... 49:
  1451. /* Refer to the "SD Specifications Part3 Security Specification" for
  1452. * information about the SD Security Features.
  1453. */
  1454. qemu_log_mask(LOG_UNIMP, "SD: CMD%i Security not implemented\n",
  1455. req.cmd);
  1456. return sd_illegal;
  1457. default:
  1458. /* Fall back to standard commands. */
  1459. return sd_normal_command(sd, req);
  1460. unimplemented_spi_cmd:
  1461. /* Commands that are recognised but not yet implemented in SPI mode. */
  1462. qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
  1463. req.cmd);
  1464. return sd_illegal;
  1465. }
  1466. qemu_log_mask(LOG_GUEST_ERROR, "SD: ACMD%i in a wrong state\n", req.cmd);
  1467. return sd_illegal;
  1468. }
  1469. static int cmd_valid_while_locked(SDState *sd, const uint8_t cmd)
  1470. {
  1471. /* Valid commands in locked state:
  1472. * basic class (0)
  1473. * lock card class (7)
  1474. * CMD16
  1475. * implicitly, the ACMD prefix CMD55
  1476. * ACMD41 and ACMD42
  1477. * Anything else provokes an "illegal command" response.
  1478. */
  1479. if (sd->expecting_acmd) {
  1480. return cmd == 41 || cmd == 42;
  1481. }
  1482. if (cmd == 16 || cmd == 55) {
  1483. return 1;
  1484. }
  1485. return sd_cmd_class[cmd] == 0 || sd_cmd_class[cmd] == 7;
  1486. }
  1487. int sd_do_command(SDState *sd, SDRequest *req,
  1488. uint8_t *response) {
  1489. int last_state;
  1490. sd_rsp_type_t rtype;
  1491. int rsplen;
  1492. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) {
  1493. return 0;
  1494. }
  1495. if (sd_req_crc_validate(req)) {
  1496. sd->card_status |= COM_CRC_ERROR;
  1497. rtype = sd_illegal;
  1498. goto send_response;
  1499. }
  1500. if (req->cmd >= SDMMC_CMD_MAX) {
  1501. qemu_log_mask(LOG_GUEST_ERROR, "SD: incorrect command 0x%02x\n",
  1502. req->cmd);
  1503. req->cmd &= 0x3f;
  1504. }
  1505. if (sd->card_status & CARD_IS_LOCKED) {
  1506. if (!cmd_valid_while_locked(sd, req->cmd)) {
  1507. sd->card_status |= ILLEGAL_COMMAND;
  1508. sd->expecting_acmd = false;
  1509. qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is locked\n");
  1510. rtype = sd_illegal;
  1511. goto send_response;
  1512. }
  1513. }
  1514. last_state = sd->state;
  1515. sd_set_mode(sd);
  1516. if (sd->expecting_acmd) {
  1517. sd->expecting_acmd = false;
  1518. rtype = sd_app_command(sd, *req);
  1519. } else {
  1520. rtype = sd_normal_command(sd, *req);
  1521. }
  1522. if (rtype == sd_illegal) {
  1523. sd->card_status |= ILLEGAL_COMMAND;
  1524. } else {
  1525. /* Valid command, we can update the 'state before command' bits.
  1526. * (Do this now so they appear in r1 responses.)
  1527. */
  1528. sd->current_cmd = req->cmd;
  1529. sd->card_status &= ~CURRENT_STATE;
  1530. sd->card_status |= (last_state << 9);
  1531. }
  1532. send_response:
  1533. switch (rtype) {
  1534. case sd_r1:
  1535. case sd_r1b:
  1536. sd_response_r1_make(sd, response);
  1537. rsplen = 4;
  1538. break;
  1539. case sd_r2_i:
  1540. memcpy(response, sd->cid, sizeof(sd->cid));
  1541. rsplen = 16;
  1542. break;
  1543. case sd_r2_s:
  1544. memcpy(response, sd->csd, sizeof(sd->csd));
  1545. rsplen = 16;
  1546. break;
  1547. case sd_r3:
  1548. sd_response_r3_make(sd, response);
  1549. rsplen = 4;
  1550. break;
  1551. case sd_r6:
  1552. sd_response_r6_make(sd, response);
  1553. rsplen = 4;
  1554. break;
  1555. case sd_r7:
  1556. sd_response_r7_make(sd, response);
  1557. rsplen = 4;
  1558. break;
  1559. case sd_r0:
  1560. case sd_illegal:
  1561. rsplen = 0;
  1562. break;
  1563. default:
  1564. g_assert_not_reached();
  1565. }
  1566. trace_sdcard_response(sd_response_name(rtype), rsplen);
  1567. if (rtype != sd_illegal) {
  1568. /* Clear the "clear on valid command" status bits now we've
  1569. * sent any response
  1570. */
  1571. sd->card_status &= ~CARD_STATUS_B;
  1572. }
  1573. #ifdef DEBUG_SD
  1574. qemu_hexdump(stderr, "Response", response, rsplen);
  1575. #endif
  1576. return rsplen;
  1577. }
  1578. void sd_write_byte(SDState *sd, uint8_t value)
  1579. {
  1580. int i;
  1581. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1582. return;
  1583. if (sd->state != sd_receivingdata_state) {
  1584. qemu_log_mask(LOG_GUEST_ERROR,
  1585. "%s: not in Receiving-Data state\n", __func__);
  1586. return;
  1587. }
  1588. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1589. return;
  1590. trace_sdcard_write_data(sd->proto_name,
  1591. sd_acmd_name(sd->current_cmd),
  1592. sd->current_cmd, value);
  1593. switch (sd->current_cmd) {
  1594. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  1595. sd->data[sd->data_offset ++] = value;
  1596. if (sd->data_offset >= sd->blk_len) {
  1597. /* TODO: Check CRC before committing */
  1598. sd->state = sd_programming_state;
  1599. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1600. sd->blk_written ++;
  1601. sd->csd[14] |= 0x40;
  1602. /* Bzzzzzzztt .... Operation complete. */
  1603. sd->state = sd_transfer_state;
  1604. }
  1605. break;
  1606. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1607. if (sd->data_offset == 0) {
  1608. /* Start of the block - let's check the address is valid */
  1609. if (!address_in_range(sd, "WRITE_MULTIPLE_BLOCK",
  1610. sd->data_start, sd->blk_len)) {
  1611. break;
  1612. }
  1613. if (sd->size <= SDSC_MAX_CAPACITY) {
  1614. if (sd_wp_addr(sd, sd->data_start)) {
  1615. sd->card_status |= WP_VIOLATION;
  1616. break;
  1617. }
  1618. }
  1619. }
  1620. sd->data[sd->data_offset++] = value;
  1621. if (sd->data_offset >= sd->blk_len) {
  1622. /* TODO: Check CRC before committing */
  1623. sd->state = sd_programming_state;
  1624. BLK_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1625. sd->blk_written++;
  1626. sd->data_start += sd->blk_len;
  1627. sd->data_offset = 0;
  1628. sd->csd[14] |= 0x40;
  1629. /* Bzzzzzzztt .... Operation complete. */
  1630. if (sd->multi_blk_cnt != 0) {
  1631. if (--sd->multi_blk_cnt == 0) {
  1632. /* Stop! */
  1633. sd->state = sd_transfer_state;
  1634. break;
  1635. }
  1636. }
  1637. sd->state = sd_receivingdata_state;
  1638. }
  1639. break;
  1640. case 26: /* CMD26: PROGRAM_CID */
  1641. sd->data[sd->data_offset ++] = value;
  1642. if (sd->data_offset >= sizeof(sd->cid)) {
  1643. /* TODO: Check CRC before committing */
  1644. sd->state = sd_programming_state;
  1645. for (i = 0; i < sizeof(sd->cid); i ++)
  1646. if ((sd->cid[i] | 0x00) != sd->data[i])
  1647. sd->card_status |= CID_CSD_OVERWRITE;
  1648. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1649. for (i = 0; i < sizeof(sd->cid); i ++) {
  1650. sd->cid[i] |= 0x00;
  1651. sd->cid[i] &= sd->data[i];
  1652. }
  1653. /* Bzzzzzzztt .... Operation complete. */
  1654. sd->state = sd_transfer_state;
  1655. }
  1656. break;
  1657. case 27: /* CMD27: PROGRAM_CSD */
  1658. sd->data[sd->data_offset ++] = value;
  1659. if (sd->data_offset >= sizeof(sd->csd)) {
  1660. /* TODO: Check CRC before committing */
  1661. sd->state = sd_programming_state;
  1662. for (i = 0; i < sizeof(sd->csd); i ++)
  1663. if ((sd->csd[i] | sd_csd_rw_mask[i]) !=
  1664. (sd->data[i] | sd_csd_rw_mask[i]))
  1665. sd->card_status |= CID_CSD_OVERWRITE;
  1666. /* Copy flag (OTP) & Permanent write protect */
  1667. if (sd->csd[14] & ~sd->data[14] & 0x60)
  1668. sd->card_status |= CID_CSD_OVERWRITE;
  1669. if (!(sd->card_status & CID_CSD_OVERWRITE))
  1670. for (i = 0; i < sizeof(sd->csd); i ++) {
  1671. sd->csd[i] |= sd_csd_rw_mask[i];
  1672. sd->csd[i] &= sd->data[i];
  1673. }
  1674. /* Bzzzzzzztt .... Operation complete. */
  1675. sd->state = sd_transfer_state;
  1676. }
  1677. break;
  1678. case 42: /* CMD42: LOCK_UNLOCK */
  1679. sd->data[sd->data_offset ++] = value;
  1680. if (sd->data_offset >= sd->blk_len) {
  1681. /* TODO: Check CRC before committing */
  1682. sd->state = sd_programming_state;
  1683. sd_lock_command(sd);
  1684. /* Bzzzzzzztt .... Operation complete. */
  1685. sd->state = sd_transfer_state;
  1686. }
  1687. break;
  1688. case 56: /* CMD56: GEN_CMD */
  1689. sd->data[sd->data_offset ++] = value;
  1690. if (sd->data_offset >= sd->blk_len) {
  1691. APP_WRITE_BLOCK(sd->data_start, sd->data_offset);
  1692. sd->state = sd_transfer_state;
  1693. }
  1694. break;
  1695. default:
  1696. qemu_log_mask(LOG_GUEST_ERROR, "%s: unknown command\n", __func__);
  1697. break;
  1698. }
  1699. }
  1700. #define SD_TUNING_BLOCK_SIZE 64
  1701. static const uint8_t sd_tuning_block_pattern[SD_TUNING_BLOCK_SIZE] = {
  1702. /* See: Physical Layer Simplified Specification Version 3.01, Table 4-2 */
  1703. 0xff, 0x0f, 0xff, 0x00, 0x0f, 0xfc, 0xc3, 0xcc,
  1704. 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
  1705. 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
  1706. 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
  1707. 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
  1708. 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
  1709. 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
  1710. 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
  1711. };
  1712. uint8_t sd_read_byte(SDState *sd)
  1713. {
  1714. /* TODO: Append CRCs */
  1715. uint8_t ret;
  1716. uint32_t io_len;
  1717. if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable)
  1718. return 0x00;
  1719. if (sd->state != sd_sendingdata_state) {
  1720. qemu_log_mask(LOG_GUEST_ERROR,
  1721. "%s: not in Sending-Data state\n", __func__);
  1722. return 0x00;
  1723. }
  1724. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1725. return 0x00;
  1726. io_len = (sd->ocr & (1 << 30)) ? 512 : sd->blk_len;
  1727. trace_sdcard_read_data(sd->proto_name,
  1728. sd_acmd_name(sd->current_cmd),
  1729. sd->current_cmd, io_len);
  1730. switch (sd->current_cmd) {
  1731. case 6: /* CMD6: SWITCH_FUNCTION */
  1732. ret = sd->data[sd->data_offset ++];
  1733. if (sd->data_offset >= 64)
  1734. sd->state = sd_transfer_state;
  1735. break;
  1736. case 9: /* CMD9: SEND_CSD */
  1737. case 10: /* CMD10: SEND_CID */
  1738. ret = sd->data[sd->data_offset ++];
  1739. if (sd->data_offset >= 16)
  1740. sd->state = sd_transfer_state;
  1741. break;
  1742. case 13: /* ACMD13: SD_STATUS */
  1743. ret = sd->sd_status[sd->data_offset ++];
  1744. if (sd->data_offset >= sizeof(sd->sd_status))
  1745. sd->state = sd_transfer_state;
  1746. break;
  1747. case 17: /* CMD17: READ_SINGLE_BLOCK */
  1748. if (sd->data_offset == 0)
  1749. BLK_READ_BLOCK(sd->data_start, io_len);
  1750. ret = sd->data[sd->data_offset ++];
  1751. if (sd->data_offset >= io_len)
  1752. sd->state = sd_transfer_state;
  1753. break;
  1754. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1755. if (sd->data_offset == 0) {
  1756. if (!address_in_range(sd, "READ_MULTIPLE_BLOCK",
  1757. sd->data_start, io_len)) {
  1758. return 0x00;
  1759. }
  1760. BLK_READ_BLOCK(sd->data_start, io_len);
  1761. }
  1762. ret = sd->data[sd->data_offset ++];
  1763. if (sd->data_offset >= io_len) {
  1764. sd->data_start += io_len;
  1765. sd->data_offset = 0;
  1766. if (sd->multi_blk_cnt != 0) {
  1767. if (--sd->multi_blk_cnt == 0) {
  1768. /* Stop! */
  1769. sd->state = sd_transfer_state;
  1770. break;
  1771. }
  1772. }
  1773. }
  1774. break;
  1775. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  1776. if (sd->data_offset >= SD_TUNING_BLOCK_SIZE - 1) {
  1777. sd->state = sd_transfer_state;
  1778. }
  1779. ret = sd_tuning_block_pattern[sd->data_offset++];
  1780. break;
  1781. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  1782. ret = sd->data[sd->data_offset ++];
  1783. if (sd->data_offset >= 4)
  1784. sd->state = sd_transfer_state;
  1785. break;
  1786. case 30: /* CMD30: SEND_WRITE_PROT */
  1787. ret = sd->data[sd->data_offset ++];
  1788. if (sd->data_offset >= 4)
  1789. sd->state = sd_transfer_state;
  1790. break;
  1791. case 51: /* ACMD51: SEND_SCR */
  1792. ret = sd->scr[sd->data_offset ++];
  1793. if (sd->data_offset >= sizeof(sd->scr))
  1794. sd->state = sd_transfer_state;
  1795. break;
  1796. case 56: /* CMD56: GEN_CMD */
  1797. if (sd->data_offset == 0)
  1798. APP_READ_BLOCK(sd->data_start, sd->blk_len);
  1799. ret = sd->data[sd->data_offset ++];
  1800. if (sd->data_offset >= sd->blk_len)
  1801. sd->state = sd_transfer_state;
  1802. break;
  1803. default:
  1804. qemu_log_mask(LOG_GUEST_ERROR, "%s: unknown command\n", __func__);
  1805. return 0x00;
  1806. }
  1807. return ret;
  1808. }
  1809. static bool sd_receive_ready(SDState *sd)
  1810. {
  1811. return sd->state == sd_receivingdata_state;
  1812. }
  1813. static bool sd_data_ready(SDState *sd)
  1814. {
  1815. return sd->state == sd_sendingdata_state;
  1816. }
  1817. void sd_enable(SDState *sd, bool enable)
  1818. {
  1819. sd->enable = enable;
  1820. }
  1821. static void sd_instance_init(Object *obj)
  1822. {
  1823. SDState *sd = SD_CARD(obj);
  1824. sd->enable = true;
  1825. sd->ocr_power_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sd_ocr_powerup, sd);
  1826. }
  1827. static void sd_instance_finalize(Object *obj)
  1828. {
  1829. SDState *sd = SD_CARD(obj);
  1830. timer_free(sd->ocr_power_timer);
  1831. }
  1832. static void sd_realize(DeviceState *dev, Error **errp)
  1833. {
  1834. SDState *sd = SD_CARD(dev);
  1835. int ret;
  1836. sd->proto_name = sd->spi ? "SPI" : "SD";
  1837. switch (sd->spec_version) {
  1838. case SD_PHY_SPECv1_10_VERS
  1839. ... SD_PHY_SPECv3_01_VERS:
  1840. break;
  1841. default:
  1842. error_setg(errp, "Invalid SD card Spec version: %u", sd->spec_version);
  1843. return;
  1844. }
  1845. if (sd->blk) {
  1846. int64_t blk_size;
  1847. if (!blk_supports_write_perm(sd->blk)) {
  1848. error_setg(errp, "Cannot use read-only drive as SD card");
  1849. return;
  1850. }
  1851. blk_size = blk_getlength(sd->blk);
  1852. if (blk_size > 0 && !is_power_of_2(blk_size)) {
  1853. int64_t blk_size_aligned = pow2ceil(blk_size);
  1854. char *blk_size_str;
  1855. blk_size_str = size_to_str(blk_size);
  1856. error_setg(errp, "Invalid SD card size: %s", blk_size_str);
  1857. g_free(blk_size_str);
  1858. blk_size_str = size_to_str(blk_size_aligned);
  1859. error_append_hint(errp,
  1860. "SD card size has to be a power of 2, e.g. %s.\n"
  1861. "You can resize disk images with"
  1862. " 'qemu-img resize <imagefile> <new-size>'\n"
  1863. "(note that this will lose data if you make the"
  1864. " image smaller than it currently is).\n",
  1865. blk_size_str);
  1866. g_free(blk_size_str);
  1867. return;
  1868. }
  1869. ret = blk_set_perm(sd->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
  1870. BLK_PERM_ALL, errp);
  1871. if (ret < 0) {
  1872. return;
  1873. }
  1874. blk_set_dev_ops(sd->blk, &sd_block_ops, sd);
  1875. }
  1876. }
  1877. static Property sd_properties[] = {
  1878. DEFINE_PROP_UINT8("spec_version", SDState,
  1879. spec_version, SD_PHY_SPECv2_00_VERS),
  1880. DEFINE_PROP_DRIVE("drive", SDState, blk),
  1881. /* We do not model the chip select pin, so allow the board to select
  1882. * whether card should be in SSI or MMC/SD mode. It is also up to the
  1883. * board to ensure that ssi transfers only occur when the chip select
  1884. * is asserted. */
  1885. DEFINE_PROP_BOOL("spi", SDState, spi, false),
  1886. DEFINE_PROP_END_OF_LIST()
  1887. };
  1888. static void sd_class_init(ObjectClass *klass, void *data)
  1889. {
  1890. DeviceClass *dc = DEVICE_CLASS(klass);
  1891. SDCardClass *sc = SD_CARD_CLASS(klass);
  1892. dc->realize = sd_realize;
  1893. device_class_set_props(dc, sd_properties);
  1894. dc->vmsd = &sd_vmstate;
  1895. dc->reset = sd_reset;
  1896. dc->bus_type = TYPE_SD_BUS;
  1897. set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
  1898. sc->set_voltage = sd_set_voltage;
  1899. sc->get_dat_lines = sd_get_dat_lines;
  1900. sc->get_cmd_line = sd_get_cmd_line;
  1901. sc->do_command = sd_do_command;
  1902. sc->write_byte = sd_write_byte;
  1903. sc->read_byte = sd_read_byte;
  1904. sc->receive_ready = sd_receive_ready;
  1905. sc->data_ready = sd_data_ready;
  1906. sc->enable = sd_enable;
  1907. sc->get_inserted = sd_get_inserted;
  1908. sc->get_readonly = sd_get_readonly;
  1909. }
  1910. static const TypeInfo sd_info = {
  1911. .name = TYPE_SD_CARD,
  1912. .parent = TYPE_DEVICE,
  1913. .instance_size = sizeof(SDState),
  1914. .class_size = sizeof(SDCardClass),
  1915. .class_init = sd_class_init,
  1916. .instance_init = sd_instance_init,
  1917. .instance_finalize = sd_instance_finalize,
  1918. };
  1919. static void sd_register_types(void)
  1920. {
  1921. type_register_static(&sd_info);
  1922. }
  1923. type_init(sd_register_types)