2
0

applesmc.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402
  1. /*
  2. * Apple SMC controller
  3. *
  4. * Copyright (c) 2007 Alexander Graf
  5. *
  6. * Authors: Alexander Graf <agraf@suse.de>
  7. * Susanne Graf <suse@csgraf.de>
  8. *
  9. * This library is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU Lesser General Public
  11. * License as published by the Free Software Foundation; either
  12. * version 2.1 of the License, or (at your option) any later version.
  13. *
  14. * This library is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * Lesser General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU Lesser General Public
  20. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  21. *
  22. * *****************************************************************
  23. *
  24. * In all Intel-based Apple hardware there is an SMC chip to control the
  25. * backlight, fans and several other generic device parameters. It also
  26. * contains the magic keys used to dongle Mac OS X to the device.
  27. *
  28. * This driver was mostly created by looking at the Linux AppleSMC driver
  29. * implementation and does not support IRQ.
  30. *
  31. */
  32. #include "qemu/osdep.h"
  33. #include "hw/isa/isa.h"
  34. #include "hw/qdev-properties.h"
  35. #include "ui/console.h"
  36. #include "qemu/error-report.h"
  37. #include "qemu/module.h"
  38. #include "qemu/timer.h"
  39. #include "qom/object.h"
  40. #include "hw/acpi/acpi_aml_interface.h"
  41. /* #define DEBUG_SMC */
  42. #define APPLESMC_DEFAULT_IOBASE 0x300
  43. #define TYPE_APPLE_SMC "isa-applesmc"
  44. #define APPLESMC_MAX_DATA_LENGTH 32
  45. #define APPLESMC_PROP_IO_BASE "iobase"
  46. enum {
  47. APPLESMC_DATA_PORT = 0x00,
  48. APPLESMC_CMD_PORT = 0x04,
  49. APPLESMC_ERR_PORT = 0x1e,
  50. APPLESMC_NUM_PORTS = 0x20,
  51. };
  52. enum {
  53. APPLESMC_READ_CMD = 0x10,
  54. APPLESMC_WRITE_CMD = 0x11,
  55. APPLESMC_GET_KEY_BY_INDEX_CMD = 0x12,
  56. APPLESMC_GET_KEY_TYPE_CMD = 0x13,
  57. };
  58. enum {
  59. APPLESMC_ST_CMD_DONE = 0x00,
  60. APPLESMC_ST_DATA_READY = 0x01,
  61. APPLESMC_ST_BUSY = 0x02,
  62. APPLESMC_ST_ACK = 0x04,
  63. APPLESMC_ST_NEW_CMD = 0x08,
  64. };
  65. enum {
  66. APPLESMC_ST_1E_CMD_INTRUPTED = 0x80,
  67. APPLESMC_ST_1E_STILL_BAD_CMD = 0x81,
  68. APPLESMC_ST_1E_BAD_CMD = 0x82,
  69. APPLESMC_ST_1E_NOEXIST = 0x84,
  70. APPLESMC_ST_1E_WRITEONLY = 0x85,
  71. APPLESMC_ST_1E_READONLY = 0x86,
  72. APPLESMC_ST_1E_BAD_INDEX = 0xb8,
  73. };
  74. #ifdef DEBUG_SMC
  75. #define smc_debug(...) fprintf(stderr, "AppleSMC: " __VA_ARGS__)
  76. #else
  77. #define smc_debug(...) do { } while (0)
  78. #endif
  79. static char default_osk[64] = "This is a dummy key. Enter the real key "
  80. "using the -osk parameter";
  81. struct AppleSMCData {
  82. uint8_t len;
  83. const char *key;
  84. const char *data;
  85. QLIST_ENTRY(AppleSMCData) node;
  86. };
  87. OBJECT_DECLARE_SIMPLE_TYPE(AppleSMCState, APPLE_SMC)
  88. struct AppleSMCState {
  89. ISADevice parent_obj;
  90. MemoryRegion io_data;
  91. MemoryRegion io_cmd;
  92. MemoryRegion io_err;
  93. uint32_t iobase;
  94. uint8_t cmd;
  95. uint8_t status;
  96. uint8_t status_1e;
  97. uint8_t last_ret;
  98. char key[4];
  99. uint8_t read_pos;
  100. uint8_t data_len;
  101. uint8_t data_pos;
  102. uint8_t data[255];
  103. char *osk;
  104. QLIST_HEAD(, AppleSMCData) data_def;
  105. };
  106. static void applesmc_io_cmd_write(void *opaque, hwaddr addr, uint64_t val,
  107. unsigned size)
  108. {
  109. AppleSMCState *s = opaque;
  110. uint8_t status = s->status & 0x0f;
  111. smc_debug("CMD received: 0x%02x\n", (uint8_t)val);
  112. switch (val) {
  113. case APPLESMC_READ_CMD:
  114. /* did last command run through OK? */
  115. if (status == APPLESMC_ST_CMD_DONE || status == APPLESMC_ST_NEW_CMD) {
  116. s->cmd = val;
  117. s->status = APPLESMC_ST_NEW_CMD | APPLESMC_ST_ACK;
  118. } else {
  119. smc_debug("ERROR: previous command interrupted!\n");
  120. s->status = APPLESMC_ST_NEW_CMD;
  121. s->status_1e = APPLESMC_ST_1E_CMD_INTRUPTED;
  122. }
  123. break;
  124. default:
  125. smc_debug("UNEXPECTED CMD 0x%02x\n", (uint8_t)val);
  126. s->status = APPLESMC_ST_NEW_CMD;
  127. s->status_1e = APPLESMC_ST_1E_BAD_CMD;
  128. }
  129. s->read_pos = 0;
  130. s->data_pos = 0;
  131. }
  132. static struct AppleSMCData *applesmc_find_key(AppleSMCState *s)
  133. {
  134. struct AppleSMCData *d;
  135. QLIST_FOREACH(d, &s->data_def, node) {
  136. if (!memcmp(d->key, s->key, 4)) {
  137. return d;
  138. }
  139. }
  140. return NULL;
  141. }
  142. static void applesmc_io_data_write(void *opaque, hwaddr addr, uint64_t val,
  143. unsigned size)
  144. {
  145. AppleSMCState *s = opaque;
  146. struct AppleSMCData *d;
  147. smc_debug("DATA received: 0x%02x\n", (uint8_t)val);
  148. switch (s->cmd) {
  149. case APPLESMC_READ_CMD:
  150. if ((s->status & 0x0f) == APPLESMC_ST_CMD_DONE) {
  151. break;
  152. }
  153. if (s->read_pos < 4) {
  154. s->key[s->read_pos] = val;
  155. s->status = APPLESMC_ST_ACK;
  156. } else if (s->read_pos == 4) {
  157. d = applesmc_find_key(s);
  158. if (d != NULL) {
  159. memcpy(s->data, d->data, d->len);
  160. s->data_len = d->len;
  161. s->data_pos = 0;
  162. s->status = APPLESMC_ST_ACK | APPLESMC_ST_DATA_READY;
  163. s->status_1e = APPLESMC_ST_CMD_DONE; /* clear on valid key */
  164. } else {
  165. smc_debug("READ_CMD: key '%c%c%c%c' not found!\n",
  166. s->key[0], s->key[1], s->key[2], s->key[3]);
  167. s->status = APPLESMC_ST_CMD_DONE;
  168. s->status_1e = APPLESMC_ST_1E_NOEXIST;
  169. }
  170. }
  171. s->read_pos++;
  172. break;
  173. default:
  174. s->status = APPLESMC_ST_CMD_DONE;
  175. s->status_1e = APPLESMC_ST_1E_STILL_BAD_CMD;
  176. }
  177. }
  178. static void applesmc_io_err_write(void *opaque, hwaddr addr, uint64_t val,
  179. unsigned size)
  180. {
  181. smc_debug("ERR_CODE received: 0x%02x, ignoring!\n", (uint8_t)val);
  182. /* NOTE: writing to the error port not supported! */
  183. }
  184. static uint64_t applesmc_io_data_read(void *opaque, hwaddr addr, unsigned size)
  185. {
  186. AppleSMCState *s = opaque;
  187. switch (s->cmd) {
  188. case APPLESMC_READ_CMD:
  189. if (!(s->status & APPLESMC_ST_DATA_READY)) {
  190. break;
  191. }
  192. if (s->data_pos < s->data_len) {
  193. s->last_ret = s->data[s->data_pos];
  194. smc_debug("READ '%c%c%c%c'[%d] = %02x\n",
  195. s->key[0], s->key[1], s->key[2], s->key[3],
  196. s->data_pos, s->last_ret);
  197. s->data_pos++;
  198. if (s->data_pos == s->data_len) {
  199. s->status = APPLESMC_ST_CMD_DONE;
  200. smc_debug("READ '%c%c%c%c' Len=%d complete!\n",
  201. s->key[0], s->key[1], s->key[2], s->key[3],
  202. s->data_len);
  203. } else {
  204. s->status = APPLESMC_ST_ACK | APPLESMC_ST_DATA_READY;
  205. }
  206. }
  207. break;
  208. default:
  209. s->status = APPLESMC_ST_CMD_DONE;
  210. s->status_1e = APPLESMC_ST_1E_STILL_BAD_CMD;
  211. }
  212. smc_debug("DATA sent: 0x%02x\n", s->last_ret);
  213. return s->last_ret;
  214. }
  215. static uint64_t applesmc_io_cmd_read(void *opaque, hwaddr addr, unsigned size)
  216. {
  217. AppleSMCState *s = opaque;
  218. smc_debug("CMD sent: 0x%02x\n", s->status);
  219. return s->status;
  220. }
  221. static uint64_t applesmc_io_err_read(void *opaque, hwaddr addr, unsigned size)
  222. {
  223. AppleSMCState *s = opaque;
  224. /* NOTE: read does not clear the 1e status */
  225. smc_debug("ERR_CODE sent: 0x%02x\n", s->status_1e);
  226. return s->status_1e;
  227. }
  228. static void applesmc_add_key(AppleSMCState *s, const char *key,
  229. int len, const char *data)
  230. {
  231. struct AppleSMCData *def;
  232. def = g_new0(struct AppleSMCData, 1);
  233. def->key = key;
  234. def->len = len;
  235. def->data = data;
  236. QLIST_INSERT_HEAD(&s->data_def, def, node);
  237. }
  238. static void qdev_applesmc_isa_reset(DeviceState *dev)
  239. {
  240. AppleSMCState *s = APPLE_SMC(dev);
  241. struct AppleSMCData *d, *next;
  242. /* Remove existing entries */
  243. QLIST_FOREACH_SAFE(d, &s->data_def, node, next) {
  244. QLIST_REMOVE(d, node);
  245. }
  246. s->status = 0x00;
  247. s->status_1e = 0x00;
  248. s->last_ret = 0x00;
  249. applesmc_add_key(s, "REV ", 6, "\x01\x13\x0f\x00\x00\x03");
  250. applesmc_add_key(s, "OSK0", 32, s->osk);
  251. applesmc_add_key(s, "OSK1", 32, s->osk + 32);
  252. applesmc_add_key(s, "NATJ", 1, "\0");
  253. applesmc_add_key(s, "MSSP", 1, "\0");
  254. applesmc_add_key(s, "MSSD", 1, "\0x3");
  255. }
  256. static const MemoryRegionOps applesmc_data_io_ops = {
  257. .write = applesmc_io_data_write,
  258. .read = applesmc_io_data_read,
  259. .endianness = DEVICE_NATIVE_ENDIAN,
  260. .impl = {
  261. .min_access_size = 1,
  262. .max_access_size = 1,
  263. },
  264. };
  265. static const MemoryRegionOps applesmc_cmd_io_ops = {
  266. .write = applesmc_io_cmd_write,
  267. .read = applesmc_io_cmd_read,
  268. .endianness = DEVICE_NATIVE_ENDIAN,
  269. .impl = {
  270. .min_access_size = 1,
  271. .max_access_size = 1,
  272. },
  273. };
  274. static const MemoryRegionOps applesmc_err_io_ops = {
  275. .write = applesmc_io_err_write,
  276. .read = applesmc_io_err_read,
  277. .endianness = DEVICE_NATIVE_ENDIAN,
  278. .impl = {
  279. .min_access_size = 1,
  280. .max_access_size = 1,
  281. },
  282. };
  283. static void applesmc_isa_realize(DeviceState *dev, Error **errp)
  284. {
  285. AppleSMCState *s = APPLE_SMC(dev);
  286. memory_region_init_io(&s->io_data, OBJECT(s), &applesmc_data_io_ops, s,
  287. "applesmc-data", 1);
  288. isa_register_ioport(&s->parent_obj, &s->io_data,
  289. s->iobase + APPLESMC_DATA_PORT);
  290. memory_region_init_io(&s->io_cmd, OBJECT(s), &applesmc_cmd_io_ops, s,
  291. "applesmc-cmd", 1);
  292. isa_register_ioport(&s->parent_obj, &s->io_cmd,
  293. s->iobase + APPLESMC_CMD_PORT);
  294. memory_region_init_io(&s->io_err, OBJECT(s), &applesmc_err_io_ops, s,
  295. "applesmc-err", 1);
  296. isa_register_ioport(&s->parent_obj, &s->io_err,
  297. s->iobase + APPLESMC_ERR_PORT);
  298. if (!s->osk || (strlen(s->osk) != 64)) {
  299. warn_report("Using AppleSMC with invalid key");
  300. s->osk = default_osk;
  301. }
  302. QLIST_INIT(&s->data_def);
  303. qdev_applesmc_isa_reset(dev);
  304. }
  305. static Property applesmc_isa_properties[] = {
  306. DEFINE_PROP_UINT32(APPLESMC_PROP_IO_BASE, AppleSMCState, iobase,
  307. APPLESMC_DEFAULT_IOBASE),
  308. DEFINE_PROP_STRING("osk", AppleSMCState, osk),
  309. DEFINE_PROP_END_OF_LIST(),
  310. };
  311. static void build_applesmc_aml(AcpiDevAmlIf *adev, Aml *scope)
  312. {
  313. Aml *crs;
  314. AppleSMCState *s = APPLE_SMC(adev);
  315. uint32_t iobase = s->iobase;
  316. Aml *dev = aml_device("SMC");
  317. aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001")));
  318. /* device present, functioning, decoding, not shown in UI */
  319. aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
  320. crs = aml_resource_template();
  321. aml_append(crs,
  322. aml_io(AML_DECODE16, iobase, iobase, 0x01, APPLESMC_MAX_DATA_LENGTH)
  323. );
  324. aml_append(crs, aml_irq_no_flags(6));
  325. aml_append(dev, aml_name_decl("_CRS", crs));
  326. aml_append(scope, dev);
  327. }
  328. static void qdev_applesmc_class_init(ObjectClass *klass, void *data)
  329. {
  330. DeviceClass *dc = DEVICE_CLASS(klass);
  331. AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
  332. dc->realize = applesmc_isa_realize;
  333. dc->reset = qdev_applesmc_isa_reset;
  334. device_class_set_props(dc, applesmc_isa_properties);
  335. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  336. adevc->build_dev_aml = build_applesmc_aml;
  337. }
  338. static const TypeInfo applesmc_isa_info = {
  339. .name = TYPE_APPLE_SMC,
  340. .parent = TYPE_ISA_DEVICE,
  341. .instance_size = sizeof(AppleSMCState),
  342. .class_init = qdev_applesmc_class_init,
  343. .interfaces = (InterfaceInfo[]) {
  344. { TYPE_ACPI_DEV_AML_IF },
  345. { },
  346. },
  347. };
  348. static void applesmc_register_types(void)
  349. {
  350. type_register_static(&applesmc_isa_info);
  351. }
  352. type_init(applesmc_register_types)