ssd0303.c 9.2 KB

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  1. /*
  2. * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
  3. *
  4. * Copyright (c) 2006-2007 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GPL.
  8. */
  9. /* The controller can support a variety of different displays, but we only
  10. implement one. Most of the commends relating to brightness and geometry
  11. setup are ignored. */
  12. #include "qemu/osdep.h"
  13. #include "hw/i2c/i2c.h"
  14. #include "migration/vmstate.h"
  15. #include "qemu/module.h"
  16. #include "ui/console.h"
  17. #include "qom/object.h"
  18. //#define DEBUG_SSD0303 1
  19. #ifdef DEBUG_SSD0303
  20. #define DPRINTF(fmt, ...) \
  21. do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
  22. #define BADF(fmt, ...) \
  23. do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
  24. #else
  25. #define DPRINTF(fmt, ...) do {} while(0)
  26. #define BADF(fmt, ...) \
  27. do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
  28. #endif
  29. /* Scaling factor for pixels. */
  30. #define MAGNIFY 4
  31. enum ssd0303_mode
  32. {
  33. SSD0303_IDLE,
  34. SSD0303_DATA,
  35. SSD0303_CMD
  36. };
  37. enum ssd0303_cmd {
  38. SSD0303_CMD_NONE,
  39. SSD0303_CMD_SKIP1
  40. };
  41. #define TYPE_SSD0303 "ssd0303"
  42. OBJECT_DECLARE_SIMPLE_TYPE(ssd0303_state, SSD0303)
  43. struct ssd0303_state {
  44. I2CSlave parent_obj;
  45. QemuConsole *con;
  46. int row;
  47. int col;
  48. int start_line;
  49. int mirror;
  50. int flash;
  51. int enabled;
  52. int inverse;
  53. int redraw;
  54. enum ssd0303_mode mode;
  55. enum ssd0303_cmd cmd_state;
  56. uint8_t framebuffer[132*8];
  57. };
  58. static uint8_t ssd0303_recv(I2CSlave *i2c)
  59. {
  60. BADF("Reads not implemented\n");
  61. return 0xff;
  62. }
  63. static int ssd0303_send(I2CSlave *i2c, uint8_t data)
  64. {
  65. ssd0303_state *s = SSD0303(i2c);
  66. enum ssd0303_cmd old_cmd_state;
  67. switch (s->mode) {
  68. case SSD0303_IDLE:
  69. DPRINTF("byte 0x%02x\n", data);
  70. if (data == 0x80)
  71. s->mode = SSD0303_CMD;
  72. else if (data == 0x40)
  73. s->mode = SSD0303_DATA;
  74. else
  75. BADF("Unexpected byte 0x%x\n", data);
  76. break;
  77. case SSD0303_DATA:
  78. DPRINTF("data 0x%02x\n", data);
  79. if (s->col < 132) {
  80. s->framebuffer[s->col + s->row * 132] = data;
  81. s->col++;
  82. s->redraw = 1;
  83. }
  84. break;
  85. case SSD0303_CMD:
  86. old_cmd_state = s->cmd_state;
  87. s->cmd_state = SSD0303_CMD_NONE;
  88. switch (old_cmd_state) {
  89. case SSD0303_CMD_NONE:
  90. DPRINTF("cmd 0x%02x\n", data);
  91. s->mode = SSD0303_IDLE;
  92. switch (data) {
  93. case 0x00 ... 0x0f: /* Set lower column address. */
  94. s->col = (s->col & 0xf0) | (data & 0xf);
  95. break;
  96. case 0x10 ... 0x20: /* Set higher column address. */
  97. s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
  98. break;
  99. case 0x40 ... 0x7f: /* Set start line. */
  100. s->start_line = 0;
  101. break;
  102. case 0x81: /* Set contrast (Ignored). */
  103. s->cmd_state = SSD0303_CMD_SKIP1;
  104. break;
  105. case 0xa0: /* Mirror off. */
  106. s->mirror = 0;
  107. break;
  108. case 0xa1: /* Mirror off. */
  109. s->mirror = 1;
  110. break;
  111. case 0xa4: /* Entire display off. */
  112. s->flash = 0;
  113. break;
  114. case 0xa5: /* Entire display on. */
  115. s->flash = 1;
  116. break;
  117. case 0xa6: /* Inverse off. */
  118. s->inverse = 0;
  119. break;
  120. case 0xa7: /* Inverse on. */
  121. s->inverse = 1;
  122. break;
  123. case 0xa8: /* Set multiplied ratio (Ignored). */
  124. s->cmd_state = SSD0303_CMD_SKIP1;
  125. break;
  126. case 0xad: /* DC-DC power control. */
  127. s->cmd_state = SSD0303_CMD_SKIP1;
  128. break;
  129. case 0xae: /* Display off. */
  130. s->enabled = 0;
  131. break;
  132. case 0xaf: /* Display on. */
  133. s->enabled = 1;
  134. break;
  135. case 0xb0 ... 0xbf: /* Set Page address. */
  136. s->row = data & 7;
  137. break;
  138. case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
  139. break;
  140. case 0xd3: /* Set display offset (Ignored). */
  141. s->cmd_state = SSD0303_CMD_SKIP1;
  142. break;
  143. case 0xd5: /* Set display clock (Ignored). */
  144. s->cmd_state = SSD0303_CMD_SKIP1;
  145. break;
  146. case 0xd8: /* Set color and power mode (Ignored). */
  147. s->cmd_state = SSD0303_CMD_SKIP1;
  148. break;
  149. case 0xd9: /* Set pre-charge period (Ignored). */
  150. s->cmd_state = SSD0303_CMD_SKIP1;
  151. break;
  152. case 0xda: /* Set COM pin configuration (Ignored). */
  153. s->cmd_state = SSD0303_CMD_SKIP1;
  154. break;
  155. case 0xdb: /* Set VCOM dselect level (Ignored). */
  156. s->cmd_state = SSD0303_CMD_SKIP1;
  157. break;
  158. case 0xe3: /* no-op. */
  159. break;
  160. default:
  161. BADF("Unknown command: 0x%x\n", data);
  162. }
  163. break;
  164. case SSD0303_CMD_SKIP1:
  165. DPRINTF("skip 0x%02x\n", data);
  166. break;
  167. }
  168. break;
  169. }
  170. return 0;
  171. }
  172. static int ssd0303_event(I2CSlave *i2c, enum i2c_event event)
  173. {
  174. ssd0303_state *s = SSD0303(i2c);
  175. switch (event) {
  176. case I2C_FINISH:
  177. s->mode = SSD0303_IDLE;
  178. break;
  179. case I2C_START_RECV:
  180. case I2C_START_SEND:
  181. case I2C_NACK:
  182. /* Nothing to do. */
  183. break;
  184. default:
  185. return -1;
  186. }
  187. return 0;
  188. }
  189. static void ssd0303_update_display(void *opaque)
  190. {
  191. ssd0303_state *s = (ssd0303_state *)opaque;
  192. DisplaySurface *surface = qemu_console_surface(s->con);
  193. uint8_t *dest;
  194. uint8_t *src;
  195. int x;
  196. int y;
  197. int line;
  198. char *colors[2];
  199. char colortab[MAGNIFY * 8];
  200. int dest_width;
  201. uint8_t mask;
  202. if (!s->redraw)
  203. return;
  204. switch (surface_bits_per_pixel(surface)) {
  205. case 0:
  206. return;
  207. case 15:
  208. dest_width = 2;
  209. break;
  210. case 16:
  211. dest_width = 2;
  212. break;
  213. case 24:
  214. dest_width = 3;
  215. break;
  216. case 32:
  217. dest_width = 4;
  218. break;
  219. default:
  220. BADF("Bad color depth\n");
  221. return;
  222. }
  223. dest_width *= MAGNIFY;
  224. memset(colortab, 0xff, dest_width);
  225. memset(colortab + dest_width, 0, dest_width);
  226. if (s->flash) {
  227. colors[0] = colortab;
  228. colors[1] = colortab;
  229. } else if (s->inverse) {
  230. colors[0] = colortab;
  231. colors[1] = colortab + dest_width;
  232. } else {
  233. colors[0] = colortab + dest_width;
  234. colors[1] = colortab;
  235. }
  236. dest = surface_data(surface);
  237. for (y = 0; y < 16; y++) {
  238. line = (y + s->start_line) & 63;
  239. src = s->framebuffer + 132 * (line >> 3) + 36;
  240. mask = 1 << (line & 7);
  241. for (x = 0; x < 96; x++) {
  242. memcpy(dest, colors[(*src & mask) != 0], dest_width);
  243. dest += dest_width;
  244. src++;
  245. }
  246. for (x = 1; x < MAGNIFY; x++) {
  247. memcpy(dest, dest - dest_width * 96, dest_width * 96);
  248. dest += dest_width * 96;
  249. }
  250. }
  251. s->redraw = 0;
  252. dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
  253. }
  254. static void ssd0303_invalidate_display(void * opaque)
  255. {
  256. ssd0303_state *s = (ssd0303_state *)opaque;
  257. s->redraw = 1;
  258. }
  259. static const VMStateDescription vmstate_ssd0303 = {
  260. .name = "ssd0303_oled",
  261. .version_id = 1,
  262. .minimum_version_id = 1,
  263. .fields = (VMStateField[]) {
  264. VMSTATE_INT32(row, ssd0303_state),
  265. VMSTATE_INT32(col, ssd0303_state),
  266. VMSTATE_INT32(start_line, ssd0303_state),
  267. VMSTATE_INT32(mirror, ssd0303_state),
  268. VMSTATE_INT32(flash, ssd0303_state),
  269. VMSTATE_INT32(enabled, ssd0303_state),
  270. VMSTATE_INT32(inverse, ssd0303_state),
  271. VMSTATE_INT32(redraw, ssd0303_state),
  272. VMSTATE_UINT32(mode, ssd0303_state),
  273. VMSTATE_UINT32(cmd_state, ssd0303_state),
  274. VMSTATE_BUFFER(framebuffer, ssd0303_state),
  275. VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
  276. VMSTATE_END_OF_LIST()
  277. }
  278. };
  279. static const GraphicHwOps ssd0303_ops = {
  280. .invalidate = ssd0303_invalidate_display,
  281. .gfx_update = ssd0303_update_display,
  282. };
  283. static void ssd0303_realize(DeviceState *dev, Error **errp)
  284. {
  285. ssd0303_state *s = SSD0303(dev);
  286. s->con = graphic_console_init(dev, 0, &ssd0303_ops, s);
  287. qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
  288. }
  289. static void ssd0303_class_init(ObjectClass *klass, void *data)
  290. {
  291. DeviceClass *dc = DEVICE_CLASS(klass);
  292. I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
  293. dc->realize = ssd0303_realize;
  294. k->event = ssd0303_event;
  295. k->recv = ssd0303_recv;
  296. k->send = ssd0303_send;
  297. dc->vmsd = &vmstate_ssd0303;
  298. }
  299. static const TypeInfo ssd0303_info = {
  300. .name = TYPE_SSD0303,
  301. .parent = TYPE_I2C_SLAVE,
  302. .instance_size = sizeof(ssd0303_state),
  303. .class_init = ssd0303_class_init,
  304. };
  305. static void ssd0303_register_types(void)
  306. {
  307. type_register_static(&ssd0303_info);
  308. }
  309. type_init(ssd0303_register_types)