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blizzard.c 29 KB

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  1. /*
  2. * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) version 3 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "qemu/bitops.h"
  22. #include "ui/console.h"
  23. #include "hw/display/blizzard.h"
  24. #include "ui/pixel_ops.h"
  25. typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
  26. typedef struct {
  27. uint8_t reg;
  28. uint32_t addr;
  29. int swallow;
  30. int pll;
  31. int pll_range;
  32. int pll_ctrl;
  33. uint8_t pll_mode;
  34. uint8_t clksel;
  35. int memenable;
  36. int memrefresh;
  37. uint8_t timing[3];
  38. int priority;
  39. uint8_t lcd_config;
  40. int x;
  41. int y;
  42. int skipx;
  43. int skipy;
  44. uint8_t hndp;
  45. uint8_t vndp;
  46. uint8_t hsync;
  47. uint8_t vsync;
  48. uint8_t pclk;
  49. uint8_t u;
  50. uint8_t v;
  51. uint8_t yrc[2];
  52. int ix[2];
  53. int iy[2];
  54. int ox[2];
  55. int oy[2];
  56. int enable;
  57. int blank;
  58. int bpp;
  59. int invalidate;
  60. int mx[2];
  61. int my[2];
  62. uint8_t mode;
  63. uint8_t effect;
  64. uint8_t iformat;
  65. uint8_t source;
  66. QemuConsole *con;
  67. blizzard_fn_t *line_fn_tab[2];
  68. void *fb;
  69. uint8_t hssi_config[3];
  70. uint8_t tv_config;
  71. uint8_t tv_timing[4];
  72. uint8_t vbi;
  73. uint8_t tv_x;
  74. uint8_t tv_y;
  75. uint8_t tv_test;
  76. uint8_t tv_filter_config;
  77. uint8_t tv_filter_idx;
  78. uint8_t tv_filter_coeff[0x20];
  79. uint8_t border_r;
  80. uint8_t border_g;
  81. uint8_t border_b;
  82. uint8_t gamma_config;
  83. uint8_t gamma_idx;
  84. uint8_t gamma_lut[0x100];
  85. uint8_t matrix_ena;
  86. uint8_t matrix_coeff[0x12];
  87. uint8_t matrix_r;
  88. uint8_t matrix_g;
  89. uint8_t matrix_b;
  90. uint8_t pm;
  91. uint8_t status;
  92. uint8_t rgbgpio_dir;
  93. uint8_t rgbgpio;
  94. uint8_t gpio_dir;
  95. uint8_t gpio;
  96. uint8_t gpio_edge[2];
  97. uint8_t gpio_irq;
  98. uint8_t gpio_pdown;
  99. struct {
  100. int x;
  101. int y;
  102. int dx;
  103. int dy;
  104. int len;
  105. int buflen;
  106. void *buf;
  107. void *data;
  108. uint16_t *ptr;
  109. int angle;
  110. int pitch;
  111. blizzard_fn_t line_fn;
  112. } data;
  113. } BlizzardState;
  114. /* Bytes(!) per pixel */
  115. static const int blizzard_iformat_bpp[0x10] = {
  116. 0,
  117. 2, /* RGB 5:6:5*/
  118. 3, /* RGB 6:6:6 mode 1 */
  119. 3, /* RGB 8:8:8 mode 1 */
  120. 0, 0,
  121. 4, /* RGB 6:6:6 mode 2 */
  122. 4, /* RGB 8:8:8 mode 2 */
  123. 0, /* YUV 4:2:2 */
  124. 0, /* YUV 4:2:0 */
  125. 0, 0, 0, 0, 0, 0,
  126. };
  127. static void blizzard_window(BlizzardState *s)
  128. {
  129. DisplaySurface *surface = qemu_console_surface(s->con);
  130. uint8_t *src, *dst;
  131. int bypp[2];
  132. int bypl[3];
  133. int y;
  134. blizzard_fn_t fn = s->data.line_fn;
  135. if (!fn)
  136. return;
  137. if (s->mx[0] > s->data.x)
  138. s->mx[0] = s->data.x;
  139. if (s->my[0] > s->data.y)
  140. s->my[0] = s->data.y;
  141. if (s->mx[1] < s->data.x + s->data.dx)
  142. s->mx[1] = s->data.x + s->data.dx;
  143. if (s->my[1] < s->data.y + s->data.dy)
  144. s->my[1] = s->data.y + s->data.dy;
  145. bypp[0] = s->bpp;
  146. bypp[1] = surface_bytes_per_pixel(surface);
  147. bypl[0] = bypp[0] * s->data.pitch;
  148. bypl[1] = bypp[1] * s->x;
  149. bypl[2] = bypp[0] * s->data.dx;
  150. src = s->data.data;
  151. dst = s->fb + bypl[1] * s->data.y + bypp[1] * s->data.x;
  152. for (y = s->data.dy; y > 0; y --, src += bypl[0], dst += bypl[1])
  153. fn(dst, src, bypl[2]);
  154. }
  155. static int blizzard_transfer_setup(BlizzardState *s)
  156. {
  157. if (s->source > 3 || !s->bpp ||
  158. s->ix[1] < s->ix[0] || s->iy[1] < s->iy[0])
  159. return 0;
  160. s->data.angle = s->effect & 3;
  161. s->data.line_fn = s->line_fn_tab[!!s->data.angle][s->iformat];
  162. s->data.x = s->ix[0];
  163. s->data.y = s->iy[0];
  164. s->data.dx = s->ix[1] - s->ix[0] + 1;
  165. s->data.dy = s->iy[1] - s->iy[0] + 1;
  166. s->data.len = s->bpp * s->data.dx * s->data.dy;
  167. s->data.pitch = s->data.dx;
  168. if (s->data.len > s->data.buflen) {
  169. s->data.buf = g_realloc(s->data.buf, s->data.len);
  170. s->data.buflen = s->data.len;
  171. }
  172. s->data.ptr = s->data.buf;
  173. s->data.data = s->data.buf;
  174. s->data.len /= 2;
  175. return 1;
  176. }
  177. static void blizzard_reset(BlizzardState *s)
  178. {
  179. s->reg = 0;
  180. s->swallow = 0;
  181. s->pll = 9;
  182. s->pll_range = 1;
  183. s->pll_ctrl = 0x14;
  184. s->pll_mode = 0x32;
  185. s->clksel = 0x00;
  186. s->memenable = 0;
  187. s->memrefresh = 0x25c;
  188. s->timing[0] = 0x3f;
  189. s->timing[1] = 0x13;
  190. s->timing[2] = 0x21;
  191. s->priority = 0;
  192. s->lcd_config = 0x74;
  193. s->x = 8;
  194. s->y = 1;
  195. s->skipx = 0;
  196. s->skipy = 0;
  197. s->hndp = 3;
  198. s->vndp = 2;
  199. s->hsync = 1;
  200. s->vsync = 1;
  201. s->pclk = 0x80;
  202. s->ix[0] = 0;
  203. s->ix[1] = 0;
  204. s->iy[0] = 0;
  205. s->iy[1] = 0;
  206. s->ox[0] = 0;
  207. s->ox[1] = 0;
  208. s->oy[0] = 0;
  209. s->oy[1] = 0;
  210. s->yrc[0] = 0x00;
  211. s->yrc[1] = 0x30;
  212. s->u = 0;
  213. s->v = 0;
  214. s->iformat = 3;
  215. s->source = 0;
  216. s->bpp = blizzard_iformat_bpp[s->iformat];
  217. s->hssi_config[0] = 0x00;
  218. s->hssi_config[1] = 0x00;
  219. s->hssi_config[2] = 0x01;
  220. s->tv_config = 0x00;
  221. s->tv_timing[0] = 0x00;
  222. s->tv_timing[1] = 0x00;
  223. s->tv_timing[2] = 0x00;
  224. s->tv_timing[3] = 0x00;
  225. s->vbi = 0x10;
  226. s->tv_x = 0x14;
  227. s->tv_y = 0x03;
  228. s->tv_test = 0x00;
  229. s->tv_filter_config = 0x80;
  230. s->tv_filter_idx = 0x00;
  231. s->border_r = 0x10;
  232. s->border_g = 0x80;
  233. s->border_b = 0x80;
  234. s->gamma_config = 0x00;
  235. s->gamma_idx = 0x00;
  236. s->matrix_ena = 0x00;
  237. memset(&s->matrix_coeff, 0, sizeof(s->matrix_coeff));
  238. s->matrix_r = 0x00;
  239. s->matrix_g = 0x00;
  240. s->matrix_b = 0x00;
  241. s->pm = 0x02;
  242. s->status = 0x00;
  243. s->rgbgpio_dir = 0x00;
  244. s->gpio_dir = 0x00;
  245. s->gpio_edge[0] = 0x00;
  246. s->gpio_edge[1] = 0x00;
  247. s->gpio_irq = 0x00;
  248. s->gpio_pdown = 0xff;
  249. }
  250. static inline void blizzard_invalidate_display(void *opaque) {
  251. BlizzardState *s = (BlizzardState *) opaque;
  252. s->invalidate = 1;
  253. }
  254. static uint16_t blizzard_reg_read(void *opaque, uint8_t reg)
  255. {
  256. BlizzardState *s = (BlizzardState *) opaque;
  257. switch (reg) {
  258. case 0x00: /* Revision Code */
  259. return 0xa5;
  260. case 0x02: /* Configuration Readback */
  261. return 0x83; /* Macrovision OK, CNF[2:0] = 3 */
  262. case 0x04: /* PLL M-Divider */
  263. return (s->pll - 1) | (1 << 7);
  264. case 0x06: /* PLL Lock Range Control */
  265. return s->pll_range;
  266. case 0x08: /* PLL Lock Synthesis Control 0 */
  267. return s->pll_ctrl & 0xff;
  268. case 0x0a: /* PLL Lock Synthesis Control 1 */
  269. return s->pll_ctrl >> 8;
  270. case 0x0c: /* PLL Mode Control 0 */
  271. return s->pll_mode;
  272. case 0x0e: /* Clock-Source Select */
  273. return s->clksel;
  274. case 0x10: /* Memory Controller Activate */
  275. case 0x14: /* Memory Controller Bank 0 Status Flag */
  276. return s->memenable;
  277. case 0x18: /* Auto-Refresh Interval Setting 0 */
  278. return s->memrefresh & 0xff;
  279. case 0x1a: /* Auto-Refresh Interval Setting 1 */
  280. return s->memrefresh >> 8;
  281. case 0x1c: /* Power-On Sequence Timing Control */
  282. return s->timing[0];
  283. case 0x1e: /* Timing Control 0 */
  284. return s->timing[1];
  285. case 0x20: /* Timing Control 1 */
  286. return s->timing[2];
  287. case 0x24: /* Arbitration Priority Control */
  288. return s->priority;
  289. case 0x28: /* LCD Panel Configuration */
  290. return s->lcd_config;
  291. case 0x2a: /* LCD Horizontal Display Width */
  292. return s->x >> 3;
  293. case 0x2c: /* LCD Horizontal Non-display Period */
  294. return s->hndp;
  295. case 0x2e: /* LCD Vertical Display Height 0 */
  296. return s->y & 0xff;
  297. case 0x30: /* LCD Vertical Display Height 1 */
  298. return s->y >> 8;
  299. case 0x32: /* LCD Vertical Non-display Period */
  300. return s->vndp;
  301. case 0x34: /* LCD HS Pulse-width */
  302. return s->hsync;
  303. case 0x36: /* LCd HS Pulse Start Position */
  304. return s->skipx >> 3;
  305. case 0x38: /* LCD VS Pulse-width */
  306. return s->vsync;
  307. case 0x3a: /* LCD VS Pulse Start Position */
  308. return s->skipy;
  309. case 0x3c: /* PCLK Polarity */
  310. return s->pclk;
  311. case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
  312. return s->hssi_config[0];
  313. case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
  314. return s->hssi_config[1];
  315. case 0x42: /* High-speed Serial Interface Tx Mode */
  316. return s->hssi_config[2];
  317. case 0x44: /* TV Display Configuration */
  318. return s->tv_config;
  319. case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits */
  320. return s->tv_timing[(reg - 0x46) >> 1];
  321. case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
  322. return s->vbi;
  323. case 0x50: /* TV Horizontal Start Position */
  324. return s->tv_x;
  325. case 0x52: /* TV Vertical Start Position */
  326. return s->tv_y;
  327. case 0x54: /* TV Test Pattern Setting */
  328. return s->tv_test;
  329. case 0x56: /* TV Filter Setting */
  330. return s->tv_filter_config;
  331. case 0x58: /* TV Filter Coefficient Index */
  332. return s->tv_filter_idx;
  333. case 0x5a: /* TV Filter Coefficient Data */
  334. if (s->tv_filter_idx < 0x20)
  335. return s->tv_filter_coeff[s->tv_filter_idx ++];
  336. return 0;
  337. case 0x60: /* Input YUV/RGB Translate Mode 0 */
  338. return s->yrc[0];
  339. case 0x62: /* Input YUV/RGB Translate Mode 1 */
  340. return s->yrc[1];
  341. case 0x64: /* U Data Fix */
  342. return s->u;
  343. case 0x66: /* V Data Fix */
  344. return s->v;
  345. case 0x68: /* Display Mode */
  346. return s->mode;
  347. case 0x6a: /* Special Effects */
  348. return s->effect;
  349. case 0x6c: /* Input Window X Start Position 0 */
  350. return s->ix[0] & 0xff;
  351. case 0x6e: /* Input Window X Start Position 1 */
  352. return s->ix[0] >> 3;
  353. case 0x70: /* Input Window Y Start Position 0 */
  354. return s->ix[0] & 0xff;
  355. case 0x72: /* Input Window Y Start Position 1 */
  356. return s->ix[0] >> 3;
  357. case 0x74: /* Input Window X End Position 0 */
  358. return s->ix[1] & 0xff;
  359. case 0x76: /* Input Window X End Position 1 */
  360. return s->ix[1] >> 3;
  361. case 0x78: /* Input Window Y End Position 0 */
  362. return s->ix[1] & 0xff;
  363. case 0x7a: /* Input Window Y End Position 1 */
  364. return s->ix[1] >> 3;
  365. case 0x7c: /* Output Window X Start Position 0 */
  366. return s->ox[0] & 0xff;
  367. case 0x7e: /* Output Window X Start Position 1 */
  368. return s->ox[0] >> 3;
  369. case 0x80: /* Output Window Y Start Position 0 */
  370. return s->oy[0] & 0xff;
  371. case 0x82: /* Output Window Y Start Position 1 */
  372. return s->oy[0] >> 3;
  373. case 0x84: /* Output Window X End Position 0 */
  374. return s->ox[1] & 0xff;
  375. case 0x86: /* Output Window X End Position 1 */
  376. return s->ox[1] >> 3;
  377. case 0x88: /* Output Window Y End Position 0 */
  378. return s->oy[1] & 0xff;
  379. case 0x8a: /* Output Window Y End Position 1 */
  380. return s->oy[1] >> 3;
  381. case 0x8c: /* Input Data Format */
  382. return s->iformat;
  383. case 0x8e: /* Data Source Select */
  384. return s->source;
  385. case 0x90: /* Display Memory Data Port */
  386. return 0;
  387. case 0xa8: /* Border Color 0 */
  388. return s->border_r;
  389. case 0xaa: /* Border Color 1 */
  390. return s->border_g;
  391. case 0xac: /* Border Color 2 */
  392. return s->border_b;
  393. case 0xb4: /* Gamma Correction Enable */
  394. return s->gamma_config;
  395. case 0xb6: /* Gamma Correction Table Index */
  396. return s->gamma_idx;
  397. case 0xb8: /* Gamma Correction Table Data */
  398. return s->gamma_lut[s->gamma_idx ++];
  399. case 0xba: /* 3x3 Matrix Enable */
  400. return s->matrix_ena;
  401. case 0xbc ... 0xde: /* Coefficient Registers */
  402. return s->matrix_coeff[(reg - 0xbc) >> 1];
  403. case 0xe0: /* 3x3 Matrix Red Offset */
  404. return s->matrix_r;
  405. case 0xe2: /* 3x3 Matrix Green Offset */
  406. return s->matrix_g;
  407. case 0xe4: /* 3x3 Matrix Blue Offset */
  408. return s->matrix_b;
  409. case 0xe6: /* Power-save */
  410. return s->pm;
  411. case 0xe8: /* Non-display Period Control / Status */
  412. return s->status | (1 << 5);
  413. case 0xea: /* RGB Interface Control */
  414. return s->rgbgpio_dir;
  415. case 0xec: /* RGB Interface Status */
  416. return s->rgbgpio;
  417. case 0xee: /* General-purpose IO Pins Configuration */
  418. return s->gpio_dir;
  419. case 0xf0: /* General-purpose IO Pins Status / Control */
  420. return s->gpio;
  421. case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
  422. return s->gpio_edge[0];
  423. case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
  424. return s->gpio_edge[1];
  425. case 0xf6: /* GPIO Interrupt Status */
  426. return s->gpio_irq;
  427. case 0xf8: /* GPIO Pull-down Control */
  428. return s->gpio_pdown;
  429. default:
  430. fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
  431. return 0;
  432. }
  433. }
  434. static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
  435. {
  436. BlizzardState *s = (BlizzardState *) opaque;
  437. switch (reg) {
  438. case 0x04: /* PLL M-Divider */
  439. s->pll = (value & 0x3f) + 1;
  440. break;
  441. case 0x06: /* PLL Lock Range Control */
  442. s->pll_range = value & 3;
  443. break;
  444. case 0x08: /* PLL Lock Synthesis Control 0 */
  445. s->pll_ctrl &= 0xf00;
  446. s->pll_ctrl |= (value << 0) & 0x0ff;
  447. break;
  448. case 0x0a: /* PLL Lock Synthesis Control 1 */
  449. s->pll_ctrl &= 0x0ff;
  450. s->pll_ctrl |= (value << 8) & 0xf00;
  451. break;
  452. case 0x0c: /* PLL Mode Control 0 */
  453. s->pll_mode = value & 0x77;
  454. if ((value & 3) == 0 || (value & 3) == 3)
  455. fprintf(stderr, "%s: wrong PLL Control bits (%i)\n",
  456. __func__, value & 3);
  457. break;
  458. case 0x0e: /* Clock-Source Select */
  459. s->clksel = value & 0xff;
  460. break;
  461. case 0x10: /* Memory Controller Activate */
  462. s->memenable = value & 1;
  463. break;
  464. case 0x14: /* Memory Controller Bank 0 Status Flag */
  465. break;
  466. case 0x18: /* Auto-Refresh Interval Setting 0 */
  467. s->memrefresh &= 0xf00;
  468. s->memrefresh |= (value << 0) & 0x0ff;
  469. break;
  470. case 0x1a: /* Auto-Refresh Interval Setting 1 */
  471. s->memrefresh &= 0x0ff;
  472. s->memrefresh |= (value << 8) & 0xf00;
  473. break;
  474. case 0x1c: /* Power-On Sequence Timing Control */
  475. s->timing[0] = value & 0x7f;
  476. break;
  477. case 0x1e: /* Timing Control 0 */
  478. s->timing[1] = value & 0x17;
  479. break;
  480. case 0x20: /* Timing Control 1 */
  481. s->timing[2] = value & 0x35;
  482. break;
  483. case 0x24: /* Arbitration Priority Control */
  484. s->priority = value & 1;
  485. break;
  486. case 0x28: /* LCD Panel Configuration */
  487. s->lcd_config = value & 0xff;
  488. if (value & (1 << 7))
  489. fprintf(stderr, "%s: data swap not supported!\n", __func__);
  490. break;
  491. case 0x2a: /* LCD Horizontal Display Width */
  492. s->x = value << 3;
  493. break;
  494. case 0x2c: /* LCD Horizontal Non-display Period */
  495. s->hndp = value & 0xff;
  496. break;
  497. case 0x2e: /* LCD Vertical Display Height 0 */
  498. s->y &= 0x300;
  499. s->y |= (value << 0) & 0x0ff;
  500. break;
  501. case 0x30: /* LCD Vertical Display Height 1 */
  502. s->y &= 0x0ff;
  503. s->y |= (value << 8) & 0x300;
  504. break;
  505. case 0x32: /* LCD Vertical Non-display Period */
  506. s->vndp = value & 0xff;
  507. break;
  508. case 0x34: /* LCD HS Pulse-width */
  509. s->hsync = value & 0xff;
  510. break;
  511. case 0x36: /* LCD HS Pulse Start Position */
  512. s->skipx = value & 0xff;
  513. break;
  514. case 0x38: /* LCD VS Pulse-width */
  515. s->vsync = value & 0xbf;
  516. break;
  517. case 0x3a: /* LCD VS Pulse Start Position */
  518. s->skipy = value & 0xff;
  519. break;
  520. case 0x3c: /* PCLK Polarity */
  521. s->pclk = value & 0x82;
  522. /* Affects calculation of s->hndp, s->hsync and s->skipx. */
  523. break;
  524. case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
  525. s->hssi_config[0] = value;
  526. break;
  527. case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
  528. s->hssi_config[1] = value;
  529. if (((value >> 4) & 3) == 3)
  530. fprintf(stderr, "%s: Illegal active-data-links value\n",
  531. __func__);
  532. break;
  533. case 0x42: /* High-speed Serial Interface Tx Mode */
  534. s->hssi_config[2] = value & 0xbd;
  535. break;
  536. case 0x44: /* TV Display Configuration */
  537. s->tv_config = value & 0xfe;
  538. break;
  539. case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits 0 */
  540. s->tv_timing[(reg - 0x46) >> 1] = value;
  541. break;
  542. case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
  543. s->vbi = value;
  544. break;
  545. case 0x50: /* TV Horizontal Start Position */
  546. s->tv_x = value;
  547. break;
  548. case 0x52: /* TV Vertical Start Position */
  549. s->tv_y = value & 0x7f;
  550. break;
  551. case 0x54: /* TV Test Pattern Setting */
  552. s->tv_test = value;
  553. break;
  554. case 0x56: /* TV Filter Setting */
  555. s->tv_filter_config = value & 0xbf;
  556. break;
  557. case 0x58: /* TV Filter Coefficient Index */
  558. s->tv_filter_idx = value & 0x1f;
  559. break;
  560. case 0x5a: /* TV Filter Coefficient Data */
  561. if (s->tv_filter_idx < 0x20)
  562. s->tv_filter_coeff[s->tv_filter_idx ++] = value;
  563. break;
  564. case 0x60: /* Input YUV/RGB Translate Mode 0 */
  565. s->yrc[0] = value & 0xb0;
  566. break;
  567. case 0x62: /* Input YUV/RGB Translate Mode 1 */
  568. s->yrc[1] = value & 0x30;
  569. break;
  570. case 0x64: /* U Data Fix */
  571. s->u = value & 0xff;
  572. break;
  573. case 0x66: /* V Data Fix */
  574. s->v = value & 0xff;
  575. break;
  576. case 0x68: /* Display Mode */
  577. if ((s->mode ^ value) & 3)
  578. s->invalidate = 1;
  579. s->mode = value & 0xb7;
  580. s->enable = value & 1;
  581. s->blank = (value >> 1) & 1;
  582. if (value & (1 << 4))
  583. fprintf(stderr, "%s: Macrovision enable attempt!\n", __func__);
  584. break;
  585. case 0x6a: /* Special Effects */
  586. s->effect = value & 0xfb;
  587. break;
  588. case 0x6c: /* Input Window X Start Position 0 */
  589. s->ix[0] &= 0x300;
  590. s->ix[0] |= (value << 0) & 0x0ff;
  591. break;
  592. case 0x6e: /* Input Window X Start Position 1 */
  593. s->ix[0] &= 0x0ff;
  594. s->ix[0] |= (value << 8) & 0x300;
  595. break;
  596. case 0x70: /* Input Window Y Start Position 0 */
  597. s->iy[0] &= 0x300;
  598. s->iy[0] |= (value << 0) & 0x0ff;
  599. break;
  600. case 0x72: /* Input Window Y Start Position 1 */
  601. s->iy[0] &= 0x0ff;
  602. s->iy[0] |= (value << 8) & 0x300;
  603. break;
  604. case 0x74: /* Input Window X End Position 0 */
  605. s->ix[1] &= 0x300;
  606. s->ix[1] |= (value << 0) & 0x0ff;
  607. break;
  608. case 0x76: /* Input Window X End Position 1 */
  609. s->ix[1] &= 0x0ff;
  610. s->ix[1] |= (value << 8) & 0x300;
  611. break;
  612. case 0x78: /* Input Window Y End Position 0 */
  613. s->iy[1] &= 0x300;
  614. s->iy[1] |= (value << 0) & 0x0ff;
  615. break;
  616. case 0x7a: /* Input Window Y End Position 1 */
  617. s->iy[1] &= 0x0ff;
  618. s->iy[1] |= (value << 8) & 0x300;
  619. break;
  620. case 0x7c: /* Output Window X Start Position 0 */
  621. s->ox[0] &= 0x300;
  622. s->ox[0] |= (value << 0) & 0x0ff;
  623. break;
  624. case 0x7e: /* Output Window X Start Position 1 */
  625. s->ox[0] &= 0x0ff;
  626. s->ox[0] |= (value << 8) & 0x300;
  627. break;
  628. case 0x80: /* Output Window Y Start Position 0 */
  629. s->oy[0] &= 0x300;
  630. s->oy[0] |= (value << 0) & 0x0ff;
  631. break;
  632. case 0x82: /* Output Window Y Start Position 1 */
  633. s->oy[0] &= 0x0ff;
  634. s->oy[0] |= (value << 8) & 0x300;
  635. break;
  636. case 0x84: /* Output Window X End Position 0 */
  637. s->ox[1] &= 0x300;
  638. s->ox[1] |= (value << 0) & 0x0ff;
  639. break;
  640. case 0x86: /* Output Window X End Position 1 */
  641. s->ox[1] &= 0x0ff;
  642. s->ox[1] |= (value << 8) & 0x300;
  643. break;
  644. case 0x88: /* Output Window Y End Position 0 */
  645. s->oy[1] &= 0x300;
  646. s->oy[1] |= (value << 0) & 0x0ff;
  647. break;
  648. case 0x8a: /* Output Window Y End Position 1 */
  649. s->oy[1] &= 0x0ff;
  650. s->oy[1] |= (value << 8) & 0x300;
  651. break;
  652. case 0x8c: /* Input Data Format */
  653. s->iformat = value & 0xf;
  654. s->bpp = blizzard_iformat_bpp[s->iformat];
  655. if (!s->bpp)
  656. fprintf(stderr, "%s: Illegal or unsupported input format %x\n",
  657. __func__, s->iformat);
  658. break;
  659. case 0x8e: /* Data Source Select */
  660. s->source = value & 7;
  661. /* Currently all windows will be "destructive overlays". */
  662. if ((!(s->effect & (1 << 3)) && (s->ix[0] != s->ox[0] ||
  663. s->iy[0] != s->oy[0] ||
  664. s->ix[1] != s->ox[1] ||
  665. s->iy[1] != s->oy[1])) ||
  666. !((s->ix[1] - s->ix[0]) & (s->iy[1] - s->iy[0]) &
  667. (s->ox[1] - s->ox[0]) & (s->oy[1] - s->oy[0]) & 1))
  668. fprintf(stderr, "%s: Illegal input/output window positions\n",
  669. __func__);
  670. blizzard_transfer_setup(s);
  671. break;
  672. case 0x90: /* Display Memory Data Port */
  673. if (!s->data.len && !blizzard_transfer_setup(s))
  674. break;
  675. *s->data.ptr ++ = value;
  676. if (-- s->data.len == 0)
  677. blizzard_window(s);
  678. break;
  679. case 0xa8: /* Border Color 0 */
  680. s->border_r = value;
  681. break;
  682. case 0xaa: /* Border Color 1 */
  683. s->border_g = value;
  684. break;
  685. case 0xac: /* Border Color 2 */
  686. s->border_b = value;
  687. break;
  688. case 0xb4: /* Gamma Correction Enable */
  689. s->gamma_config = value & 0x87;
  690. break;
  691. case 0xb6: /* Gamma Correction Table Index */
  692. s->gamma_idx = value;
  693. break;
  694. case 0xb8: /* Gamma Correction Table Data */
  695. s->gamma_lut[s->gamma_idx ++] = value;
  696. break;
  697. case 0xba: /* 3x3 Matrix Enable */
  698. s->matrix_ena = value & 1;
  699. break;
  700. case 0xbc ... 0xde: /* Coefficient Registers */
  701. s->matrix_coeff[(reg - 0xbc) >> 1] = value & ((reg & 2) ? 0x80 : 0xff);
  702. break;
  703. case 0xe0: /* 3x3 Matrix Red Offset */
  704. s->matrix_r = value;
  705. break;
  706. case 0xe2: /* 3x3 Matrix Green Offset */
  707. s->matrix_g = value;
  708. break;
  709. case 0xe4: /* 3x3 Matrix Blue Offset */
  710. s->matrix_b = value;
  711. break;
  712. case 0xe6: /* Power-save */
  713. s->pm = value & 0x83;
  714. if (value & s->mode & 1)
  715. fprintf(stderr, "%s: The display must be disabled before entering "
  716. "Standby Mode\n", __func__);
  717. break;
  718. case 0xe8: /* Non-display Period Control / Status */
  719. s->status = value & 0x1b;
  720. break;
  721. case 0xea: /* RGB Interface Control */
  722. s->rgbgpio_dir = value & 0x8f;
  723. break;
  724. case 0xec: /* RGB Interface Status */
  725. s->rgbgpio = value & 0xcf;
  726. break;
  727. case 0xee: /* General-purpose IO Pins Configuration */
  728. s->gpio_dir = value;
  729. break;
  730. case 0xf0: /* General-purpose IO Pins Status / Control */
  731. s->gpio = value;
  732. break;
  733. case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
  734. s->gpio_edge[0] = value;
  735. break;
  736. case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
  737. s->gpio_edge[1] = value;
  738. break;
  739. case 0xf6: /* GPIO Interrupt Status */
  740. s->gpio_irq &= value;
  741. break;
  742. case 0xf8: /* GPIO Pull-down Control */
  743. s->gpio_pdown = value;
  744. break;
  745. default:
  746. fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
  747. break;
  748. }
  749. }
  750. uint16_t s1d13745_read(void *opaque, int dc)
  751. {
  752. BlizzardState *s = (BlizzardState *) opaque;
  753. uint16_t value = blizzard_reg_read(s, s->reg);
  754. if (s->swallow -- > 0)
  755. return 0;
  756. if (dc)
  757. s->reg ++;
  758. return value;
  759. }
  760. void s1d13745_write(void *opaque, int dc, uint16_t value)
  761. {
  762. BlizzardState *s = (BlizzardState *) opaque;
  763. if (s->swallow -- > 0)
  764. return;
  765. if (dc) {
  766. blizzard_reg_write(s, s->reg, value);
  767. if (s->reg != 0x90 && s->reg != 0x5a && s->reg != 0xb8)
  768. s->reg += 2;
  769. } else
  770. s->reg = value & 0xff;
  771. }
  772. void s1d13745_write_block(void *opaque, int dc,
  773. void *buf, size_t len, int pitch)
  774. {
  775. BlizzardState *s = (BlizzardState *) opaque;
  776. while (len > 0) {
  777. if (s->reg == 0x90 && dc &&
  778. (s->data.len || blizzard_transfer_setup(s)) &&
  779. len >= (s->data.len << 1)) {
  780. len -= s->data.len << 1;
  781. s->data.len = 0;
  782. s->data.data = buf;
  783. if (pitch)
  784. s->data.pitch = pitch;
  785. blizzard_window(s);
  786. s->data.data = s->data.buf;
  787. continue;
  788. }
  789. s1d13745_write(opaque, dc, *(uint16_t *) buf);
  790. len -= 2;
  791. buf += 2;
  792. }
  793. }
  794. static void blizzard_update_display(void *opaque)
  795. {
  796. BlizzardState *s = (BlizzardState *) opaque;
  797. DisplaySurface *surface = qemu_console_surface(s->con);
  798. int y, bypp, bypl, bwidth;
  799. uint8_t *src, *dst;
  800. if (!s->enable)
  801. return;
  802. if (s->x != surface_width(surface) || s->y != surface_height(surface)) {
  803. s->invalidate = 1;
  804. qemu_console_resize(s->con, s->x, s->y);
  805. surface = qemu_console_surface(s->con);
  806. }
  807. if (s->invalidate) {
  808. s->invalidate = 0;
  809. if (s->blank) {
  810. bypp = surface_bytes_per_pixel(surface);
  811. memset(surface_data(surface), 0, bypp * s->x * s->y);
  812. return;
  813. }
  814. s->mx[0] = 0;
  815. s->mx[1] = s->x;
  816. s->my[0] = 0;
  817. s->my[1] = s->y;
  818. }
  819. if (s->mx[1] <= s->mx[0])
  820. return;
  821. bypp = surface_bytes_per_pixel(surface);
  822. bypl = bypp * s->x;
  823. bwidth = bypp * (s->mx[1] - s->mx[0]);
  824. y = s->my[0];
  825. src = s->fb + bypl * y + bypp * s->mx[0];
  826. dst = surface_data(surface) + bypl * y + bypp * s->mx[0];
  827. for (; y < s->my[1]; y ++, src += bypl, dst += bypl)
  828. memcpy(dst, src, bwidth);
  829. dpy_gfx_update(s->con, s->mx[0], s->my[0],
  830. s->mx[1] - s->mx[0], y - s->my[0]);
  831. s->mx[0] = s->x;
  832. s->mx[1] = 0;
  833. s->my[0] = s->y;
  834. s->my[1] = 0;
  835. }
  836. static void blizzard_draw_line16_32(uint32_t *dest,
  837. const uint16_t *src, unsigned int width)
  838. {
  839. uint16_t data;
  840. unsigned int r, g, b;
  841. const uint16_t *end = (const void *) src + width;
  842. while (src < end) {
  843. data = *src ++;
  844. b = extract16(data, 0, 5) << 3;
  845. g = extract16(data, 5, 6) << 2;
  846. r = extract16(data, 11, 5) << 3;
  847. *dest++ = rgb_to_pixel32(r, g, b);
  848. }
  849. }
  850. static void blizzard_draw_line24mode1_32(uint32_t *dest,
  851. const uint8_t *src, unsigned int width)
  852. {
  853. /* TODO: check if SDL 24-bit planes are not in the same format and
  854. * if so, use memcpy */
  855. unsigned int r[2], g[2], b[2];
  856. const uint8_t *end = src + width;
  857. while (src < end) {
  858. g[0] = *src ++;
  859. r[0] = *src ++;
  860. r[1] = *src ++;
  861. b[0] = *src ++;
  862. *dest++ = rgb_to_pixel32(r[0], g[0], b[0]);
  863. b[1] = *src ++;
  864. g[1] = *src ++;
  865. *dest++ = rgb_to_pixel32(r[1], g[1], b[1]);
  866. }
  867. }
  868. static void blizzard_draw_line24mode2_32(uint32_t *dest,
  869. const uint8_t *src, unsigned int width)
  870. {
  871. unsigned int r, g, b;
  872. const uint8_t *end = src + width;
  873. while (src < end) {
  874. r = *src ++;
  875. src ++;
  876. b = *src ++;
  877. g = *src ++;
  878. *dest++ = rgb_to_pixel32(r, g, b);
  879. }
  880. }
  881. /* No rotation */
  882. static blizzard_fn_t blizzard_draw_fn_32[0x10] = {
  883. NULL,
  884. /* RGB 5:6:5*/
  885. (blizzard_fn_t) blizzard_draw_line16_32,
  886. /* RGB 6:6:6 mode 1 */
  887. (blizzard_fn_t) blizzard_draw_line24mode1_32,
  888. /* RGB 8:8:8 mode 1 */
  889. (blizzard_fn_t) blizzard_draw_line24mode1_32,
  890. NULL, NULL,
  891. /* RGB 6:6:6 mode 2 */
  892. (blizzard_fn_t) blizzard_draw_line24mode2_32,
  893. /* RGB 8:8:8 mode 2 */
  894. (blizzard_fn_t) blizzard_draw_line24mode2_32,
  895. /* YUV 4:2:2 */
  896. NULL,
  897. /* YUV 4:2:0 */
  898. NULL,
  899. NULL, NULL, NULL, NULL, NULL, NULL,
  900. };
  901. /* 90deg, 180deg and 270deg rotation */
  902. static blizzard_fn_t blizzard_draw_fn_r_32[0x10] = {
  903. /* TODO */
  904. [0 ... 0xf] = NULL,
  905. };
  906. static const GraphicHwOps blizzard_ops = {
  907. .invalidate = blizzard_invalidate_display,
  908. .gfx_update = blizzard_update_display,
  909. };
  910. void *s1d13745_init(qemu_irq gpio_int)
  911. {
  912. BlizzardState *s = g_malloc0(sizeof(*s));
  913. DisplaySurface *surface;
  914. s->fb = g_malloc(0x180000);
  915. s->con = graphic_console_init(NULL, 0, &blizzard_ops, s);
  916. surface = qemu_console_surface(s->con);
  917. assert(surface_bits_per_pixel(surface) == 32);
  918. s->line_fn_tab[0] = blizzard_draw_fn_32;
  919. s->line_fn_tab[1] = blizzard_draw_fn_r_32;
  920. blizzard_reset(s);
  921. return s;
  922. }