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core.c 21 KB

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  1. /*
  2. * ACPI implementation
  3. *
  4. * Copyright (c) 2006 Fabrice Bellard
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License version 2.1 as published by the Free Software Foundation.
  9. *
  10. * This library is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * Lesser General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU Lesser General Public
  16. * License along with this library; if not, see <http://www.gnu.org/licenses/>
  17. *
  18. * Contributions after 2012-01-13 are licensed under the terms of the
  19. * GNU GPL, version 2 or (at your option) any later version.
  20. */
  21. #include "qemu/osdep.h"
  22. #include "hw/irq.h"
  23. #include "hw/acpi/acpi.h"
  24. #include "hw/nvram/fw_cfg.h"
  25. #include "qemu/config-file.h"
  26. #include "qapi/error.h"
  27. #include "qapi/opts-visitor.h"
  28. #include "qapi/qapi-events-run-state.h"
  29. #include "qapi/qapi-visit-acpi.h"
  30. #include "qemu/error-report.h"
  31. #include "qemu/module.h"
  32. #include "qemu/option.h"
  33. #include "sysemu/runstate.h"
  34. struct acpi_table_header {
  35. uint16_t _length; /* our length, not actual part of the hdr */
  36. /* allows easier parsing for fw_cfg clients */
  37. char sig[4]
  38. QEMU_NONSTRING; /* ACPI signature (4 ASCII characters) */
  39. uint32_t length; /* Length of table, in bytes, including header */
  40. uint8_t revision; /* ACPI Specification minor version # */
  41. uint8_t checksum; /* To make sum of entire table == 0 */
  42. char oem_id[6]
  43. QEMU_NONSTRING; /* OEM identification */
  44. char oem_table_id[8]
  45. QEMU_NONSTRING; /* OEM table identification */
  46. uint32_t oem_revision; /* OEM revision number */
  47. char asl_compiler_id[4]
  48. QEMU_NONSTRING; /* ASL compiler vendor ID */
  49. uint32_t asl_compiler_revision; /* ASL compiler revision number */
  50. } QEMU_PACKED;
  51. #define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header)
  52. #define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */
  53. static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] =
  54. "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */
  55. "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */
  56. "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */
  57. ;
  58. char unsigned *acpi_tables;
  59. size_t acpi_tables_len;
  60. static QemuOptsList qemu_acpi_opts = {
  61. .name = "acpi",
  62. .implied_opt_name = "data",
  63. .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head),
  64. .desc = { { 0 } } /* validated with OptsVisitor */
  65. };
  66. static void acpi_register_config(void)
  67. {
  68. qemu_add_opts(&qemu_acpi_opts);
  69. }
  70. opts_init(acpi_register_config);
  71. static int acpi_checksum(const uint8_t *data, int len)
  72. {
  73. int sum, i;
  74. sum = 0;
  75. for (i = 0; i < len; i++) {
  76. sum += data[i];
  77. }
  78. return (-sum) & 0xff;
  79. }
  80. /* Install a copy of the ACPI table specified in @blob.
  81. *
  82. * If @has_header is set, @blob starts with the System Description Table Header
  83. * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
  84. * is optionally overwritten from @hdrs.
  85. *
  86. * It is valid to call this function with
  87. * (@blob == NULL && bloblen == 0 && !has_header).
  88. *
  89. * @hdrs->file and @hdrs->data are ignored.
  90. *
  91. * SIZE_MAX is considered "infinity" in this function.
  92. *
  93. * The number of tables that can be installed is not limited, but the 16-bit
  94. * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
  95. */
  96. static void acpi_table_install(const char unsigned *blob, size_t bloblen,
  97. bool has_header,
  98. const struct AcpiTableOptions *hdrs,
  99. Error **errp)
  100. {
  101. size_t body_start;
  102. const char unsigned *hdr_src;
  103. size_t body_size, acpi_payload_size;
  104. struct acpi_table_header *ext_hdr;
  105. unsigned changed_fields;
  106. /* Calculate where the ACPI table body starts within the blob, plus where
  107. * to copy the ACPI table header from.
  108. */
  109. if (has_header) {
  110. /* _length | ACPI header in blob | blob body
  111. * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^
  112. * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
  113. * == body_start
  114. *
  115. * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  116. * acpi_payload_size == bloblen
  117. */
  118. body_start = sizeof dfl_hdr;
  119. if (bloblen < body_start) {
  120. error_setg(errp, "ACPI table claiming to have header is too "
  121. "short, available: %zu, expected: %zu", bloblen,
  122. body_start);
  123. return;
  124. }
  125. hdr_src = blob;
  126. } else {
  127. /* _length | ACPI header in template | blob body
  128. * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^
  129. * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
  130. * == bloblen
  131. *
  132. * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  133. * acpi_payload_size
  134. */
  135. body_start = 0;
  136. hdr_src = dfl_hdr;
  137. }
  138. body_size = bloblen - body_start;
  139. acpi_payload_size = sizeof dfl_hdr + body_size;
  140. if (acpi_payload_size > UINT16_MAX) {
  141. error_setg(errp, "ACPI table too big, requested: %zu, max: %u",
  142. acpi_payload_size, (unsigned)UINT16_MAX);
  143. return;
  144. }
  145. /* We won't fail from here on. Initialize / extend the globals. */
  146. if (acpi_tables == NULL) {
  147. acpi_tables_len = sizeof(uint16_t);
  148. acpi_tables = g_malloc0(acpi_tables_len);
  149. }
  150. acpi_tables = g_realloc(acpi_tables, acpi_tables_len +
  151. ACPI_TABLE_PFX_SIZE +
  152. sizeof dfl_hdr + body_size);
  153. ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len);
  154. acpi_tables_len += ACPI_TABLE_PFX_SIZE;
  155. memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr);
  156. acpi_tables_len += sizeof dfl_hdr;
  157. if (blob != NULL) {
  158. memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size);
  159. acpi_tables_len += body_size;
  160. }
  161. /* increase number of tables */
  162. stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
  163. /* Update the header fields. The strings need not be NUL-terminated. */
  164. changed_fields = 0;
  165. ext_hdr->_length = cpu_to_le16(acpi_payload_size);
  166. if (hdrs->sig) {
  167. strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
  168. ++changed_fields;
  169. }
  170. if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) {
  171. warn_report("ACPI table has wrong length, header says "
  172. "%" PRIu32 ", actual size %zu bytes",
  173. le32_to_cpu(ext_hdr->length), acpi_payload_size);
  174. }
  175. ext_hdr->length = cpu_to_le32(acpi_payload_size);
  176. if (hdrs->has_rev) {
  177. ext_hdr->revision = hdrs->rev;
  178. ++changed_fields;
  179. }
  180. ext_hdr->checksum = 0;
  181. if (hdrs->oem_id) {
  182. strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
  183. ++changed_fields;
  184. }
  185. if (hdrs->oem_table_id) {
  186. strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id,
  187. sizeof ext_hdr->oem_table_id);
  188. ++changed_fields;
  189. }
  190. if (hdrs->has_oem_rev) {
  191. ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev);
  192. ++changed_fields;
  193. }
  194. if (hdrs->asl_compiler_id) {
  195. strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id,
  196. sizeof ext_hdr->asl_compiler_id);
  197. ++changed_fields;
  198. }
  199. if (hdrs->has_asl_compiler_rev) {
  200. ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev);
  201. ++changed_fields;
  202. }
  203. if (!has_header && changed_fields == 0) {
  204. warn_report("ACPI table: no headers are specified");
  205. }
  206. /* recalculate checksum */
  207. ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
  208. ACPI_TABLE_PFX_SIZE, acpi_payload_size);
  209. }
  210. void acpi_table_add(const QemuOpts *opts, Error **errp)
  211. {
  212. AcpiTableOptions *hdrs = NULL;
  213. char **pathnames = NULL;
  214. char **cur;
  215. size_t bloblen = 0;
  216. char unsigned *blob = NULL;
  217. {
  218. Visitor *v;
  219. v = opts_visitor_new(opts);
  220. visit_type_AcpiTableOptions(v, NULL, &hdrs, errp);
  221. visit_free(v);
  222. }
  223. if (!hdrs) {
  224. goto out;
  225. }
  226. if (!hdrs->file == !hdrs->data) {
  227. error_setg(errp, "'-acpitable' requires one of 'data' or 'file'");
  228. goto out;
  229. }
  230. pathnames = g_strsplit(hdrs->file ?: hdrs->data, ":", 0);
  231. if (pathnames == NULL || pathnames[0] == NULL) {
  232. error_setg(errp, "'-acpitable' requires at least one pathname");
  233. goto out;
  234. }
  235. /* now read in the data files, reallocating buffer as needed */
  236. for (cur = pathnames; *cur; ++cur) {
  237. int fd = open(*cur, O_RDONLY | O_BINARY);
  238. if (fd < 0) {
  239. error_setg(errp, "can't open file %s: %s", *cur, strerror(errno));
  240. goto out;
  241. }
  242. for (;;) {
  243. char unsigned data[8192];
  244. ssize_t r;
  245. r = read(fd, data, sizeof data);
  246. if (r == 0) {
  247. break;
  248. } else if (r > 0) {
  249. blob = g_realloc(blob, bloblen + r);
  250. memcpy(blob + bloblen, data, r);
  251. bloblen += r;
  252. } else if (errno != EINTR) {
  253. error_setg(errp, "can't read file %s: %s", *cur,
  254. strerror(errno));
  255. close(fd);
  256. goto out;
  257. }
  258. }
  259. close(fd);
  260. }
  261. acpi_table_install(blob, bloblen, !!hdrs->file, hdrs, errp);
  262. out:
  263. g_free(blob);
  264. g_strfreev(pathnames);
  265. qapi_free_AcpiTableOptions(hdrs);
  266. }
  267. unsigned acpi_table_len(void *current)
  268. {
  269. struct acpi_table_header *hdr = current - sizeof(hdr->_length);
  270. return hdr->_length;
  271. }
  272. static
  273. void *acpi_table_hdr(void *h)
  274. {
  275. struct acpi_table_header *hdr = h;
  276. return &hdr->sig;
  277. }
  278. uint8_t *acpi_table_first(void)
  279. {
  280. if (!acpi_tables) {
  281. return NULL;
  282. }
  283. return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE);
  284. }
  285. uint8_t *acpi_table_next(uint8_t *current)
  286. {
  287. uint8_t *next = current + acpi_table_len(current);
  288. if (next - acpi_tables >= acpi_tables_len) {
  289. return NULL;
  290. } else {
  291. return acpi_table_hdr(next);
  292. }
  293. }
  294. int acpi_get_slic_oem(AcpiSlicOem *oem)
  295. {
  296. uint8_t *u;
  297. for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
  298. struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length));
  299. if (memcmp(hdr->sig, "SLIC", 4) == 0) {
  300. oem->id = g_strndup(hdr->oem_id, 6);
  301. oem->table_id = g_strndup(hdr->oem_table_id, 8);
  302. return 0;
  303. }
  304. }
  305. return -1;
  306. }
  307. static void acpi_notify_wakeup(Notifier *notifier, void *data)
  308. {
  309. ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup);
  310. WakeupReason *reason = data;
  311. switch (*reason) {
  312. case QEMU_WAKEUP_REASON_RTC:
  313. ar->pm1.evt.sts |=
  314. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS);
  315. break;
  316. case QEMU_WAKEUP_REASON_PMTIMER:
  317. ar->pm1.evt.sts |=
  318. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS);
  319. break;
  320. case QEMU_WAKEUP_REASON_OTHER:
  321. /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
  322. Pretend that resume was caused by power button */
  323. ar->pm1.evt.sts |=
  324. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS);
  325. break;
  326. default:
  327. break;
  328. }
  329. }
  330. /* ACPI PM1a EVT */
  331. uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar)
  332. {
  333. /* Compare ns-clock, not PM timer ticks, because
  334. acpi_pm_tmr_update function uses ns for setting the timer. */
  335. int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  336. if (d >= muldiv64(ar->tmr.overflow_time,
  337. NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) {
  338. ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS;
  339. }
  340. return ar->pm1.evt.sts;
  341. }
  342. static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val)
  343. {
  344. uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar);
  345. if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) {
  346. /* if TMRSTS is reset, then compute the new overflow time */
  347. acpi_pm_tmr_calc_overflow_time(ar);
  348. }
  349. ar->pm1.evt.sts &= ~val;
  350. }
  351. static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val)
  352. {
  353. ar->pm1.evt.en = val;
  354. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC,
  355. val & ACPI_BITMASK_RT_CLOCK_ENABLE);
  356. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER,
  357. val & ACPI_BITMASK_TIMER_ENABLE);
  358. }
  359. void acpi_pm1_evt_power_down(ACPIREGS *ar)
  360. {
  361. if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
  362. ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
  363. ar->tmr.update_sci(ar);
  364. }
  365. }
  366. void acpi_pm1_evt_reset(ACPIREGS *ar)
  367. {
  368. ar->pm1.evt.sts = 0;
  369. ar->pm1.evt.en = 0;
  370. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0);
  371. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0);
  372. }
  373. static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width)
  374. {
  375. ACPIREGS *ar = opaque;
  376. switch (addr) {
  377. case 0:
  378. return acpi_pm1_evt_get_sts(ar);
  379. case 2:
  380. return ar->pm1.evt.en;
  381. default:
  382. return 0;
  383. }
  384. }
  385. static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val,
  386. unsigned width)
  387. {
  388. ACPIREGS *ar = opaque;
  389. switch (addr) {
  390. case 0:
  391. acpi_pm1_evt_write_sts(ar, val);
  392. ar->pm1.evt.update_sci(ar);
  393. break;
  394. case 2:
  395. acpi_pm1_evt_write_en(ar, val);
  396. ar->pm1.evt.update_sci(ar);
  397. break;
  398. }
  399. }
  400. static const MemoryRegionOps acpi_pm_evt_ops = {
  401. .read = acpi_pm_evt_read,
  402. .write = acpi_pm_evt_write,
  403. .impl.min_access_size = 2,
  404. .valid.min_access_size = 1,
  405. .valid.max_access_size = 2,
  406. .endianness = DEVICE_LITTLE_ENDIAN,
  407. };
  408. void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
  409. MemoryRegion *parent)
  410. {
  411. ar->pm1.evt.update_sci = update_sci;
  412. memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
  413. &acpi_pm_evt_ops, ar, "acpi-evt", 4);
  414. memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
  415. }
  416. /* ACPI PM_TMR */
  417. void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
  418. {
  419. int64_t expire_time;
  420. /* schedule a timer interruption if needed */
  421. if (enable) {
  422. expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND,
  423. PM_TIMER_FREQUENCY);
  424. timer_mod(ar->tmr.timer, expire_time);
  425. } else {
  426. timer_del(ar->tmr.timer);
  427. }
  428. }
  429. static inline int64_t acpi_pm_tmr_get_clock(void)
  430. {
  431. return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
  432. NANOSECONDS_PER_SECOND);
  433. }
  434. void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar)
  435. {
  436. int64_t d = acpi_pm_tmr_get_clock();
  437. ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
  438. }
  439. static uint32_t acpi_pm_tmr_get(ACPIREGS *ar)
  440. {
  441. uint32_t d = acpi_pm_tmr_get_clock();
  442. return d & 0xffffff;
  443. }
  444. static void acpi_pm_tmr_timer(void *opaque)
  445. {
  446. ACPIREGS *ar = opaque;
  447. qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER, NULL);
  448. ar->tmr.update_sci(ar);
  449. }
  450. static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width)
  451. {
  452. return acpi_pm_tmr_get(opaque);
  453. }
  454. static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val,
  455. unsigned width)
  456. {
  457. /* nothing */
  458. }
  459. static const MemoryRegionOps acpi_pm_tmr_ops = {
  460. .read = acpi_pm_tmr_read,
  461. .write = acpi_pm_tmr_write,
  462. .impl.min_access_size = 4,
  463. .valid.min_access_size = 1,
  464. .valid.max_access_size = 4,
  465. .endianness = DEVICE_LITTLE_ENDIAN,
  466. };
  467. void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
  468. MemoryRegion *parent)
  469. {
  470. ar->tmr.update_sci = update_sci;
  471. ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar);
  472. memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
  473. &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
  474. memory_region_add_subregion(parent, 8, &ar->tmr.io);
  475. }
  476. void acpi_pm_tmr_reset(ACPIREGS *ar)
  477. {
  478. ar->tmr.overflow_time = 0;
  479. timer_del(ar->tmr.timer);
  480. }
  481. /* ACPI PM1aCNT */
  482. static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
  483. {
  484. ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
  485. if (val & ACPI_BITMASK_SLEEP_ENABLE) {
  486. /* change suspend type */
  487. uint16_t sus_typ = (val >> 10) & 7;
  488. switch (sus_typ) {
  489. case 0: /* soft power off */
  490. qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  491. break;
  492. case 1:
  493. qemu_system_suspend_request();
  494. break;
  495. default:
  496. if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
  497. qapi_event_send_suspend_disk();
  498. qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  499. }
  500. break;
  501. }
  502. }
  503. }
  504. void acpi_pm1_cnt_update(ACPIREGS *ar,
  505. bool sci_enable, bool sci_disable)
  506. {
  507. /* ACPI specs 3.0, 4.7.2.5 */
  508. if (ar->pm1.cnt.acpi_only) {
  509. return;
  510. }
  511. if (sci_enable) {
  512. ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE;
  513. } else if (sci_disable) {
  514. ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE;
  515. }
  516. }
  517. static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width)
  518. {
  519. ACPIREGS *ar = opaque;
  520. return ar->pm1.cnt.cnt;
  521. }
  522. static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val,
  523. unsigned width)
  524. {
  525. acpi_pm1_cnt_write(opaque, val);
  526. }
  527. static const MemoryRegionOps acpi_pm_cnt_ops = {
  528. .read = acpi_pm_cnt_read,
  529. .write = acpi_pm_cnt_write,
  530. .impl.min_access_size = 2,
  531. .valid.min_access_size = 1,
  532. .valid.max_access_size = 2,
  533. .endianness = DEVICE_LITTLE_ENDIAN,
  534. };
  535. void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
  536. bool disable_s3, bool disable_s4, uint8_t s4_val,
  537. bool acpi_only)
  538. {
  539. FWCfgState *fw_cfg;
  540. ar->pm1.cnt.s4_val = s4_val;
  541. ar->pm1.cnt.acpi_only = acpi_only;
  542. ar->wakeup.notify = acpi_notify_wakeup;
  543. qemu_register_wakeup_notifier(&ar->wakeup);
  544. /*
  545. * Register wake-up support in QMP query-current-machine API
  546. */
  547. qemu_register_wakeup_support();
  548. memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
  549. &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
  550. memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
  551. fw_cfg = fw_cfg_find();
  552. if (fw_cfg) {
  553. uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
  554. suspend[3] = 1 | ((!disable_s3) << 7);
  555. suspend[4] = s4_val | ((!disable_s4) << 7);
  556. fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6);
  557. }
  558. }
  559. void acpi_pm1_cnt_reset(ACPIREGS *ar)
  560. {
  561. ar->pm1.cnt.cnt = 0;
  562. if (ar->pm1.cnt.acpi_only) {
  563. ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE;
  564. }
  565. }
  566. /* ACPI GPE */
  567. void acpi_gpe_init(ACPIREGS *ar, uint8_t len)
  568. {
  569. ar->gpe.len = len;
  570. /* Only first len / 2 bytes are ever used,
  571. * but the caller in ich9.c migrates full len bytes.
  572. * TODO: fix ich9.c and drop the extra allocation.
  573. */
  574. ar->gpe.sts = g_malloc0(len);
  575. ar->gpe.en = g_malloc0(len);
  576. }
  577. void acpi_gpe_reset(ACPIREGS *ar)
  578. {
  579. memset(ar->gpe.sts, 0, ar->gpe.len / 2);
  580. memset(ar->gpe.en, 0, ar->gpe.len / 2);
  581. }
  582. static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr)
  583. {
  584. uint8_t *cur = NULL;
  585. if (addr < ar->gpe.len / 2) {
  586. cur = ar->gpe.sts + addr;
  587. } else if (addr < ar->gpe.len) {
  588. cur = ar->gpe.en + addr - ar->gpe.len / 2;
  589. } else {
  590. abort();
  591. }
  592. return cur;
  593. }
  594. void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val)
  595. {
  596. uint8_t *cur;
  597. cur = acpi_gpe_ioport_get_ptr(ar, addr);
  598. if (addr < ar->gpe.len / 2) {
  599. /* GPE_STS */
  600. *cur = (*cur) & ~val;
  601. } else if (addr < ar->gpe.len) {
  602. /* GPE_EN */
  603. *cur = val;
  604. } else {
  605. abort();
  606. }
  607. }
  608. uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
  609. {
  610. uint8_t *cur;
  611. uint32_t val;
  612. cur = acpi_gpe_ioport_get_ptr(ar, addr);
  613. val = 0;
  614. if (cur != NULL) {
  615. val = *cur;
  616. }
  617. return val;
  618. }
  619. void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
  620. AcpiEventStatusBits status)
  621. {
  622. ar->gpe.sts[0] |= status;
  623. acpi_update_sci(ar, irq);
  624. }
  625. void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
  626. {
  627. int sci_level, pm1a_sts;
  628. pm1a_sts = acpi_pm1_evt_get_sts(regs);
  629. sci_level = ((pm1a_sts &
  630. regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
  631. ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
  632. qemu_set_irq(irq, sci_level);
  633. /* schedule a timer interruption if needed */
  634. acpi_pm_tmr_update(regs,
  635. (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
  636. !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
  637. }