cpu_hotplug.c 11 KB

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  1. /*
  2. * QEMU ACPI hotplug utilities
  3. *
  4. * Copyright (C) 2013 Red Hat Inc
  5. *
  6. * Authors:
  7. * Igor Mammedov <imammedo@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10. * See the COPYING file in the top-level directory.
  11. */
  12. #include "qemu/osdep.h"
  13. #include "hw/acpi/cpu_hotplug.h"
  14. #include "qapi/error.h"
  15. #include "hw/core/cpu.h"
  16. #include "hw/i386/pc.h"
  17. #include "hw/pci/pci.h"
  18. #include "qemu/error-report.h"
  19. #define CPU_EJECT_METHOD "CPEJ"
  20. #define CPU_MAT_METHOD "CPMA"
  21. #define CPU_ON_BITMAP "CPON"
  22. #define CPU_STATUS_METHOD "CPST"
  23. #define CPU_STATUS_MAP "PRS"
  24. #define CPU_SCAN_METHOD "PRSC"
  25. static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
  26. {
  27. AcpiCpuHotplug *cpus = opaque;
  28. uint64_t val = cpus->sts[addr];
  29. return val;
  30. }
  31. static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
  32. unsigned int size)
  33. {
  34. /* firmware never used to write in CPU present bitmap so use
  35. this fact as means to switch QEMU into modern CPU hotplug
  36. mode by writing 0 at the beginning of legacy CPU bitmap
  37. */
  38. if (addr == 0 && data == 0) {
  39. AcpiCpuHotplug *cpus = opaque;
  40. object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false,
  41. &error_abort);
  42. }
  43. }
  44. static const MemoryRegionOps AcpiCpuHotplug_ops = {
  45. .read = cpu_status_read,
  46. .write = cpu_status_write,
  47. .endianness = DEVICE_LITTLE_ENDIAN,
  48. .valid = {
  49. .min_access_size = 1,
  50. .max_access_size = 4,
  51. },
  52. .impl = {
  53. .max_access_size = 1,
  54. },
  55. };
  56. static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu)
  57. {
  58. CPUClass *k = CPU_GET_CLASS(cpu);
  59. int64_t cpu_id;
  60. cpu_id = k->get_arch_id(cpu);
  61. if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
  62. object_property_set_bool(g->device, "cpu-hotplug-legacy", false,
  63. &error_abort);
  64. return;
  65. }
  66. g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
  67. }
  68. void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  69. AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
  70. {
  71. acpi_set_cpu_present_bit(g, CPU(dev));
  72. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  73. }
  74. void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
  75. AcpiCpuHotplug *gpe_cpu, uint16_t base)
  76. {
  77. CPUState *cpu;
  78. memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
  79. gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
  80. memory_region_add_subregion(parent, base, &gpe_cpu->io);
  81. gpe_cpu->device = owner;
  82. CPU_FOREACH(cpu) {
  83. acpi_set_cpu_present_bit(gpe_cpu, cpu);
  84. }
  85. }
  86. void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
  87. CPUHotplugState *cpuhp_state,
  88. uint16_t io_port)
  89. {
  90. MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
  91. memory_region_del_subregion(parent, &gpe_cpu->io);
  92. cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
  93. }
  94. void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
  95. uint16_t io_base)
  96. {
  97. Aml *dev;
  98. Aml *crs;
  99. Aml *pkg;
  100. Aml *field;
  101. Aml *method;
  102. Aml *if_ctx;
  103. Aml *else_ctx;
  104. int i, apic_idx;
  105. Aml *sb_scope = aml_scope("_SB");
  106. uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
  107. Aml *cpu_id = aml_arg(1);
  108. Aml *apic_id = aml_arg(0);
  109. Aml *cpu_on = aml_local(0);
  110. Aml *madt = aml_local(1);
  111. Aml *cpus_map = aml_name(CPU_ON_BITMAP);
  112. Aml *zero = aml_int(0);
  113. Aml *one = aml_int(1);
  114. MachineClass *mc = MACHINE_GET_CLASS(machine);
  115. const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
  116. X86MachineState *x86ms = X86_MACHINE(machine);
  117. /*
  118. * _MAT method - creates an madt apic buffer
  119. * apic_id = Arg0 = Local APIC ID
  120. * cpu_id = Arg1 = Processor ID
  121. * cpu_on = Local0 = CPON flag for this cpu
  122. * madt = Local1 = Buffer (in madt apic form) to return
  123. */
  124. method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
  125. aml_append(method,
  126. aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
  127. aml_append(method,
  128. aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
  129. /* Update the processor id, lapic id, and enable/disable status */
  130. aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
  131. aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
  132. aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
  133. aml_append(method, aml_return(madt));
  134. aml_append(sb_scope, method);
  135. /*
  136. * _STA method - return ON status of cpu
  137. * apic_id = Arg0 = Local APIC ID
  138. * cpu_on = Local0 = CPON flag for this cpu
  139. */
  140. method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
  141. aml_append(method,
  142. aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
  143. if_ctx = aml_if(cpu_on);
  144. {
  145. aml_append(if_ctx, aml_return(aml_int(0xF)));
  146. }
  147. aml_append(method, if_ctx);
  148. else_ctx = aml_else();
  149. {
  150. aml_append(else_ctx, aml_return(zero));
  151. }
  152. aml_append(method, else_ctx);
  153. aml_append(sb_scope, method);
  154. method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
  155. aml_append(method, aml_sleep(200));
  156. aml_append(sb_scope, method);
  157. method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
  158. {
  159. Aml *while_ctx, *if_ctx2, *else_ctx2;
  160. Aml *bus_check_evt = aml_int(1);
  161. Aml *remove_evt = aml_int(3);
  162. Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
  163. Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
  164. Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
  165. Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
  166. Aml *status = aml_local(3); /* Local3 = active state for cpu */
  167. aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
  168. aml_append(method, aml_store(zero, byte));
  169. aml_append(method, aml_store(zero, idx));
  170. /* While (idx < SizeOf(CPON)) */
  171. while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
  172. aml_append(while_ctx,
  173. aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
  174. if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
  175. {
  176. /* Shift down previously read bitmap byte */
  177. aml_append(if_ctx, aml_shiftright(byte, one, byte));
  178. }
  179. aml_append(while_ctx, if_ctx);
  180. else_ctx = aml_else();
  181. {
  182. /* Read next byte from cpu bitmap */
  183. aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
  184. aml_shiftright(idx, aml_int(3), NULL))), byte));
  185. }
  186. aml_append(while_ctx, else_ctx);
  187. aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
  188. if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
  189. {
  190. /* State change - update CPON with new state */
  191. aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
  192. if_ctx2 = aml_if(aml_equal(status, one));
  193. {
  194. aml_append(if_ctx2,
  195. aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
  196. }
  197. aml_append(if_ctx, if_ctx2);
  198. else_ctx2 = aml_else();
  199. {
  200. aml_append(else_ctx2,
  201. aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
  202. }
  203. }
  204. aml_append(if_ctx, else_ctx2);
  205. aml_append(while_ctx, if_ctx);
  206. aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
  207. aml_append(method, while_ctx);
  208. }
  209. aml_append(sb_scope, method);
  210. /* The current AML generator can cover the APIC ID range [0..255],
  211. * inclusive, for VCPU hotplug. */
  212. QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
  213. if (x86ms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
  214. error_report("max_cpus is too large. APIC ID of last CPU is %u",
  215. x86ms->apic_id_limit - 1);
  216. exit(1);
  217. }
  218. /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
  219. dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
  220. aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  221. aml_append(dev,
  222. aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
  223. );
  224. /* device present, functioning, decoding, not shown in UI */
  225. aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
  226. crs = aml_resource_template();
  227. aml_append(crs,
  228. aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
  229. );
  230. aml_append(dev, aml_name_decl("_CRS", crs));
  231. aml_append(sb_scope, dev);
  232. /* declare CPU hotplug MMIO region and PRS field to access it */
  233. aml_append(sb_scope, aml_operation_region(
  234. "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
  235. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
  236. aml_append(field, aml_named_field("PRS", 256));
  237. aml_append(sb_scope, field);
  238. /* build Processor object for each processor */
  239. for (i = 0; i < apic_ids->len; i++) {
  240. int apic_id = apic_ids->cpus[i].arch_id;
  241. assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
  242. dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
  243. method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
  244. aml_append(method,
  245. aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
  246. ));
  247. aml_append(dev, method);
  248. method = aml_method("_STA", 0, AML_NOTSERIALIZED);
  249. aml_append(method,
  250. aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
  251. aml_append(dev, method);
  252. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  253. aml_append(method,
  254. aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
  255. aml_arg(0)))
  256. );
  257. aml_append(dev, method);
  258. aml_append(sb_scope, dev);
  259. }
  260. /* build this code:
  261. * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
  262. */
  263. /* Arg0 = APIC ID */
  264. method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  265. for (i = 0; i < apic_ids->len; i++) {
  266. int apic_id = apic_ids->cpus[i].arch_id;
  267. if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
  268. aml_append(if_ctx,
  269. aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
  270. );
  271. aml_append(method, if_ctx);
  272. }
  273. aml_append(sb_scope, method);
  274. /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
  275. *
  276. * Note: The ability to create variable-sized packages was first
  277. * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
  278. * ith up to 255 elements. Windows guests up to win2k8 fail when
  279. * VarPackageOp is used.
  280. */
  281. pkg = x86ms->apic_id_limit <= 255 ? aml_package(x86ms->apic_id_limit) :
  282. aml_varpackage(x86ms->apic_id_limit);
  283. for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
  284. int apic_id = apic_ids->cpus[i].arch_id;
  285. for (; apic_idx < apic_id; apic_idx++) {
  286. aml_append(pkg, aml_int(0));
  287. }
  288. aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
  289. apic_idx = apic_id + 1;
  290. }
  291. aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
  292. aml_append(ctx, sb_scope);
  293. method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
  294. aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
  295. aml_append(ctx, method);
  296. }