cpu.c 26 KB

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  1. #include "qemu/osdep.h"
  2. #include "migration/vmstate.h"
  3. #include "hw/acpi/cpu.h"
  4. #include "qapi/error.h"
  5. #include "qapi/qapi-events-acpi.h"
  6. #include "trace.h"
  7. #include "sysemu/numa.h"
  8. #define ACPI_CPU_HOTPLUG_REG_LEN 12
  9. #define ACPI_CPU_SELECTOR_OFFSET_WR 0
  10. #define ACPI_CPU_FLAGS_OFFSET_RW 4
  11. #define ACPI_CPU_CMD_OFFSET_WR 5
  12. #define ACPI_CPU_CMD_DATA_OFFSET_RW 8
  13. #define ACPI_CPU_CMD_DATA2_OFFSET_R 0
  14. #define OVMF_CPUHP_SMI_CMD 4
  15. enum {
  16. CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
  17. CPHP_OST_EVENT_CMD = 1,
  18. CPHP_OST_STATUS_CMD = 2,
  19. CPHP_GET_CPU_ID_CMD = 3,
  20. CPHP_CMD_MAX
  21. };
  22. static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
  23. {
  24. ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
  25. info->slot_type = ACPI_SLOT_TYPE_CPU;
  26. info->slot = g_strdup_printf("%d", idx);
  27. info->source = cdev->ost_event;
  28. info->status = cdev->ost_status;
  29. if (cdev->cpu) {
  30. DeviceState *dev = DEVICE(cdev->cpu);
  31. if (dev->id) {
  32. info->device = g_strdup(dev->id);
  33. }
  34. }
  35. return info;
  36. }
  37. void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
  38. {
  39. ACPIOSTInfoList ***tail = list;
  40. int i;
  41. for (i = 0; i < cpu_st->dev_count; i++) {
  42. QAPI_LIST_APPEND(*tail, acpi_cpu_device_status(i, &cpu_st->devs[i]));
  43. }
  44. }
  45. static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
  46. {
  47. uint64_t val = 0;
  48. CPUHotplugState *cpu_st = opaque;
  49. AcpiCpuStatus *cdev;
  50. if (cpu_st->selector >= cpu_st->dev_count) {
  51. return val;
  52. }
  53. cdev = &cpu_st->devs[cpu_st->selector];
  54. switch (addr) {
  55. case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
  56. val |= cdev->cpu ? 1 : 0;
  57. val |= cdev->is_inserting ? 2 : 0;
  58. val |= cdev->is_removing ? 4 : 0;
  59. val |= cdev->fw_remove ? 16 : 0;
  60. trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
  61. break;
  62. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  63. switch (cpu_st->command) {
  64. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  65. val = cpu_st->selector;
  66. break;
  67. case CPHP_GET_CPU_ID_CMD:
  68. val = cdev->arch_id & 0xFFFFFFFF;
  69. break;
  70. default:
  71. break;
  72. }
  73. trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
  74. break;
  75. case ACPI_CPU_CMD_DATA2_OFFSET_R:
  76. switch (cpu_st->command) {
  77. case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
  78. val = 0;
  79. break;
  80. case CPHP_GET_CPU_ID_CMD:
  81. val = cdev->arch_id >> 32;
  82. break;
  83. default:
  84. break;
  85. }
  86. trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val);
  87. break;
  88. default:
  89. break;
  90. }
  91. return val;
  92. }
  93. static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
  94. unsigned int size)
  95. {
  96. CPUHotplugState *cpu_st = opaque;
  97. AcpiCpuStatus *cdev;
  98. ACPIOSTInfo *info;
  99. assert(cpu_st->dev_count);
  100. if (addr) {
  101. if (cpu_st->selector >= cpu_st->dev_count) {
  102. trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
  103. return;
  104. }
  105. }
  106. switch (addr) {
  107. case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
  108. cpu_st->selector = data;
  109. trace_cpuhp_acpi_write_idx(cpu_st->selector);
  110. break;
  111. case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
  112. cdev = &cpu_st->devs[cpu_st->selector];
  113. if (data & 2) { /* clear insert event */
  114. cdev->is_inserting = false;
  115. trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
  116. } else if (data & 4) { /* clear remove event */
  117. cdev->is_removing = false;
  118. trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
  119. } else if (data & 8) {
  120. DeviceState *dev = NULL;
  121. HotplugHandler *hotplug_ctrl = NULL;
  122. if (!cdev->cpu || cdev->cpu == first_cpu) {
  123. trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
  124. break;
  125. }
  126. trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
  127. dev = DEVICE(cdev->cpu);
  128. hotplug_ctrl = qdev_get_hotplug_handler(dev);
  129. hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
  130. object_unparent(OBJECT(dev));
  131. cdev->fw_remove = false;
  132. } else if (data & 16) {
  133. if (!cdev->cpu || cdev->cpu == first_cpu) {
  134. trace_cpuhp_acpi_fw_remove_invalid_cpu(cpu_st->selector);
  135. break;
  136. }
  137. trace_cpuhp_acpi_fw_remove_cpu(cpu_st->selector);
  138. cdev->fw_remove = true;
  139. }
  140. break;
  141. case ACPI_CPU_CMD_OFFSET_WR:
  142. trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
  143. if (data < CPHP_CMD_MAX) {
  144. cpu_st->command = data;
  145. if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
  146. uint32_t iter = cpu_st->selector;
  147. do {
  148. cdev = &cpu_st->devs[iter];
  149. if (cdev->is_inserting || cdev->is_removing ||
  150. cdev->fw_remove) {
  151. cpu_st->selector = iter;
  152. trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
  153. cdev->is_inserting, cdev->is_removing);
  154. break;
  155. }
  156. iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
  157. } while (iter != cpu_st->selector);
  158. }
  159. }
  160. break;
  161. case ACPI_CPU_CMD_DATA_OFFSET_RW:
  162. switch (cpu_st->command) {
  163. case CPHP_OST_EVENT_CMD: {
  164. cdev = &cpu_st->devs[cpu_st->selector];
  165. cdev->ost_event = data;
  166. trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
  167. break;
  168. }
  169. case CPHP_OST_STATUS_CMD: {
  170. cdev = &cpu_st->devs[cpu_st->selector];
  171. cdev->ost_status = data;
  172. info = acpi_cpu_device_status(cpu_st->selector, cdev);
  173. qapi_event_send_acpi_device_ost(info);
  174. qapi_free_ACPIOSTInfo(info);
  175. trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
  176. cdev->ost_status);
  177. break;
  178. }
  179. default:
  180. break;
  181. }
  182. break;
  183. default:
  184. break;
  185. }
  186. }
  187. static const MemoryRegionOps cpu_hotplug_ops = {
  188. .read = cpu_hotplug_rd,
  189. .write = cpu_hotplug_wr,
  190. .endianness = DEVICE_LITTLE_ENDIAN,
  191. .valid = {
  192. .min_access_size = 1,
  193. .max_access_size = 4,
  194. },
  195. };
  196. void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
  197. CPUHotplugState *state, hwaddr base_addr)
  198. {
  199. MachineState *machine = MACHINE(qdev_get_machine());
  200. MachineClass *mc = MACHINE_GET_CLASS(machine);
  201. const CPUArchIdList *id_list;
  202. int i;
  203. assert(mc->possible_cpu_arch_ids);
  204. id_list = mc->possible_cpu_arch_ids(machine);
  205. state->dev_count = id_list->len;
  206. state->devs = g_new0(typeof(*state->devs), state->dev_count);
  207. for (i = 0; i < id_list->len; i++) {
  208. state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
  209. state->devs[i].arch_id = id_list->cpus[i].arch_id;
  210. }
  211. memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
  212. "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
  213. memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
  214. }
  215. static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
  216. {
  217. CPUClass *k = CPU_GET_CLASS(dev);
  218. uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
  219. int i;
  220. for (i = 0; i < cpu_st->dev_count; i++) {
  221. if (cpu_arch_id == cpu_st->devs[i].arch_id) {
  222. return &cpu_st->devs[i];
  223. }
  224. }
  225. return NULL;
  226. }
  227. void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  228. CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
  229. {
  230. AcpiCpuStatus *cdev;
  231. cdev = get_cpu_status(cpu_st, dev);
  232. if (!cdev) {
  233. return;
  234. }
  235. cdev->cpu = CPU(dev);
  236. if (dev->hotplugged) {
  237. cdev->is_inserting = true;
  238. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  239. }
  240. }
  241. void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
  242. CPUHotplugState *cpu_st,
  243. DeviceState *dev, Error **errp)
  244. {
  245. AcpiCpuStatus *cdev;
  246. cdev = get_cpu_status(cpu_st, dev);
  247. if (!cdev) {
  248. return;
  249. }
  250. cdev->is_removing = true;
  251. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  252. }
  253. void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
  254. DeviceState *dev, Error **errp)
  255. {
  256. AcpiCpuStatus *cdev;
  257. cdev = get_cpu_status(cpu_st, dev);
  258. if (!cdev) {
  259. return;
  260. }
  261. cdev->cpu = NULL;
  262. }
  263. static const VMStateDescription vmstate_cpuhp_sts = {
  264. .name = "CPU hotplug device state",
  265. .version_id = 1,
  266. .minimum_version_id = 1,
  267. .fields = (VMStateField[]) {
  268. VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
  269. VMSTATE_BOOL(is_removing, AcpiCpuStatus),
  270. VMSTATE_UINT32(ost_event, AcpiCpuStatus),
  271. VMSTATE_UINT32(ost_status, AcpiCpuStatus),
  272. VMSTATE_END_OF_LIST()
  273. }
  274. };
  275. const VMStateDescription vmstate_cpu_hotplug = {
  276. .name = "CPU hotplug state",
  277. .version_id = 1,
  278. .minimum_version_id = 1,
  279. .fields = (VMStateField[]) {
  280. VMSTATE_UINT32(selector, CPUHotplugState),
  281. VMSTATE_UINT8(command, CPUHotplugState),
  282. VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
  283. vmstate_cpuhp_sts, AcpiCpuStatus),
  284. VMSTATE_END_OF_LIST()
  285. }
  286. };
  287. #define CPU_NAME_FMT "C%.03X"
  288. #define CPUHP_RES_DEVICE "PRES"
  289. #define CPU_LOCK "CPLK"
  290. #define CPU_STS_METHOD "CSTA"
  291. #define CPU_SCAN_METHOD "CSCN"
  292. #define CPU_NOTIFY_METHOD "CTFY"
  293. #define CPU_EJECT_METHOD "CEJ0"
  294. #define CPU_OST_METHOD "COST"
  295. #define CPU_ADDED_LIST "CNEW"
  296. #define CPU_ENABLED "CPEN"
  297. #define CPU_SELECTOR "CSEL"
  298. #define CPU_COMMAND "CCMD"
  299. #define CPU_DATA "CDAT"
  300. #define CPU_INSERT_EVENT "CINS"
  301. #define CPU_REMOVE_EVENT "CRMV"
  302. #define CPU_EJECT_EVENT "CEJ0"
  303. #define CPU_FW_EJECT_EVENT "CEJF"
  304. void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
  305. hwaddr io_base,
  306. const char *res_root,
  307. const char *event_handler_method)
  308. {
  309. Aml *ifctx;
  310. Aml *field;
  311. Aml *method;
  312. Aml *cpu_ctrl_dev;
  313. Aml *cpus_dev;
  314. Aml *zero = aml_int(0);
  315. Aml *one = aml_int(1);
  316. Aml *sb_scope = aml_scope("_SB");
  317. MachineClass *mc = MACHINE_GET_CLASS(machine);
  318. const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
  319. char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
  320. Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
  321. AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
  322. cpu_ctrl_dev = aml_device("%s", cphp_res_path);
  323. {
  324. Aml *crs;
  325. aml_append(cpu_ctrl_dev,
  326. aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  327. aml_append(cpu_ctrl_dev,
  328. aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
  329. aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
  330. crs = aml_resource_template();
  331. aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
  332. ACPI_CPU_HOTPLUG_REG_LEN));
  333. aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
  334. /* declare CPU hotplug MMIO region with related access fields */
  335. aml_append(cpu_ctrl_dev,
  336. aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
  337. ACPI_CPU_HOTPLUG_REG_LEN));
  338. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
  339. AML_WRITE_AS_ZEROS);
  340. aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
  341. /* 1 if enabled, read only */
  342. aml_append(field, aml_named_field(CPU_ENABLED, 1));
  343. /* (read) 1 if has a insert event. (write) 1 to clear event */
  344. aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
  345. /* (read) 1 if has a remove event. (write) 1 to clear event */
  346. aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
  347. /* initiates device eject, write only */
  348. aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
  349. /* tell firmware to do device eject, write only */
  350. aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1));
  351. aml_append(field, aml_reserved_field(3));
  352. aml_append(field, aml_named_field(CPU_COMMAND, 8));
  353. aml_append(cpu_ctrl_dev, field);
  354. field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
  355. /* CPU selector, write only */
  356. aml_append(field, aml_named_field(CPU_SELECTOR, 32));
  357. /* flags + cmd + 2byte align */
  358. aml_append(field, aml_reserved_field(4 * 8));
  359. aml_append(field, aml_named_field(CPU_DATA, 32));
  360. aml_append(cpu_ctrl_dev, field);
  361. if (opts.has_legacy_cphp) {
  362. method = aml_method("_INI", 0, AML_SERIALIZED);
  363. /* switch off legacy CPU hotplug HW and use new one,
  364. * on reboot system is in new mode and writing 0
  365. * in CPU_SELECTOR selects BSP, which is NOP at
  366. * the time _INI is called */
  367. aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
  368. aml_append(cpu_ctrl_dev, method);
  369. }
  370. }
  371. aml_append(sb_scope, cpu_ctrl_dev);
  372. cpus_dev = aml_device("\\_SB.CPUS");
  373. {
  374. int i;
  375. Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
  376. Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
  377. Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
  378. Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
  379. Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
  380. Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
  381. Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
  382. Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
  383. Aml *fw_ej_evt = aml_name("%s.%s", cphp_res_path, CPU_FW_EJECT_EVENT);
  384. aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
  385. aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
  386. method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  387. for (i = 0; i < arch_ids->len; i++) {
  388. Aml *cpu = aml_name(CPU_NAME_FMT, i);
  389. Aml *uid = aml_arg(0);
  390. Aml *event = aml_arg(1);
  391. ifctx = aml_if(aml_equal(uid, aml_int(i)));
  392. {
  393. aml_append(ifctx, aml_notify(cpu, event));
  394. }
  395. aml_append(method, ifctx);
  396. }
  397. aml_append(cpus_dev, method);
  398. method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
  399. {
  400. Aml *idx = aml_arg(0);
  401. Aml *sta = aml_local(0);
  402. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  403. aml_append(method, aml_store(idx, cpu_selector));
  404. aml_append(method, aml_store(zero, sta));
  405. ifctx = aml_if(aml_equal(is_enabled, one));
  406. {
  407. aml_append(ifctx, aml_store(aml_int(0xF), sta));
  408. }
  409. aml_append(method, ifctx);
  410. aml_append(method, aml_release(ctrl_lock));
  411. aml_append(method, aml_return(sta));
  412. }
  413. aml_append(cpus_dev, method);
  414. method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
  415. {
  416. Aml *idx = aml_arg(0);
  417. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  418. aml_append(method, aml_store(idx, cpu_selector));
  419. if (opts.fw_unplugs_cpu) {
  420. aml_append(method, aml_store(one, fw_ej_evt));
  421. aml_append(method, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
  422. aml_name("%s", opts.smi_path)));
  423. } else {
  424. aml_append(method, aml_store(one, ej_evt));
  425. }
  426. aml_append(method, aml_release(ctrl_lock));
  427. }
  428. aml_append(cpus_dev, method);
  429. method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
  430. {
  431. const uint8_t max_cpus_per_pass = 255;
  432. Aml *else_ctx;
  433. Aml *while_ctx, *while_ctx2;
  434. Aml *has_event = aml_local(0);
  435. Aml *dev_chk = aml_int(1);
  436. Aml *eject_req = aml_int(3);
  437. Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
  438. Aml *num_added_cpus = aml_local(1);
  439. Aml *cpu_idx = aml_local(2);
  440. Aml *uid = aml_local(3);
  441. Aml *has_job = aml_local(4);
  442. Aml *new_cpus = aml_name(CPU_ADDED_LIST);
  443. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  444. /*
  445. * Windows versions newer than XP (including Windows 10/Windows
  446. * Server 2019), do support* VarPackageOp but, it is cripled to hold
  447. * the same elements number as old PackageOp.
  448. * For compatibility with Windows XP (so it won't crash) use ACPI1.0
  449. * PackageOp which can hold max 255 elements.
  450. *
  451. * use named package as old Windows don't support it in local var
  452. */
  453. aml_append(method, aml_name_decl(CPU_ADDED_LIST,
  454. aml_package(max_cpus_per_pass)));
  455. aml_append(method, aml_store(zero, uid));
  456. aml_append(method, aml_store(one, has_job));
  457. /*
  458. * CPU_ADDED_LIST can hold limited number of elements, outer loop
  459. * allows to process CPUs in batches which let us to handle more
  460. * CPUs than CPU_ADDED_LIST can hold.
  461. */
  462. while_ctx2 = aml_while(aml_equal(has_job, one));
  463. {
  464. aml_append(while_ctx2, aml_store(zero, has_job));
  465. aml_append(while_ctx2, aml_store(one, has_event));
  466. aml_append(while_ctx2, aml_store(zero, num_added_cpus));
  467. /*
  468. * Scan CPUs, till there are CPUs with events or
  469. * CPU_ADDED_LIST capacity is exhausted
  470. */
  471. while_ctx = aml_while(aml_land(aml_equal(has_event, one),
  472. aml_lless(uid, aml_int(arch_ids->len))));
  473. {
  474. /*
  475. * clear loop exit condition, ins_evt/rm_evt checks will
  476. * set it to 1 while next_cpu_cmd returns a CPU with events
  477. */
  478. aml_append(while_ctx, aml_store(zero, has_event));
  479. aml_append(while_ctx, aml_store(uid, cpu_selector));
  480. aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
  481. /*
  482. * wrap around case, scan is complete, exit loop.
  483. * It happens since events are not cleared in scan loop,
  484. * so next_cpu_cmd continues to find already processed CPUs
  485. */
  486. ifctx = aml_if(aml_lless(cpu_data, uid));
  487. {
  488. aml_append(ifctx, aml_break());
  489. }
  490. aml_append(while_ctx, ifctx);
  491. /*
  492. * if CPU_ADDED_LIST is full, exit inner loop and process
  493. * collected CPUs
  494. */
  495. ifctx = aml_if(
  496. aml_equal(num_added_cpus, aml_int(max_cpus_per_pass)));
  497. {
  498. aml_append(ifctx, aml_store(one, has_job));
  499. aml_append(ifctx, aml_break());
  500. }
  501. aml_append(while_ctx, ifctx);
  502. aml_append(while_ctx, aml_store(cpu_data, uid));
  503. ifctx = aml_if(aml_equal(ins_evt, one));
  504. {
  505. /* cache added CPUs to Notify/Wakeup later */
  506. aml_append(ifctx, aml_store(uid,
  507. aml_index(new_cpus, num_added_cpus)));
  508. aml_append(ifctx, aml_increment(num_added_cpus));
  509. aml_append(ifctx, aml_store(one, has_event));
  510. }
  511. aml_append(while_ctx, ifctx);
  512. else_ctx = aml_else();
  513. ifctx = aml_if(aml_equal(rm_evt, one));
  514. {
  515. aml_append(ifctx,
  516. aml_call2(CPU_NOTIFY_METHOD, uid, eject_req));
  517. aml_append(ifctx, aml_store(one, rm_evt));
  518. aml_append(ifctx, aml_store(one, has_event));
  519. }
  520. aml_append(else_ctx, ifctx);
  521. aml_append(while_ctx, else_ctx);
  522. aml_append(while_ctx, aml_increment(uid));
  523. }
  524. aml_append(while_ctx2, while_ctx);
  525. /*
  526. * in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT,
  527. * make upcall to FW, so it can pull in new CPUs before
  528. * OS is notified and wakes them up
  529. */
  530. if (opts.smi_path) {
  531. ifctx = aml_if(aml_lgreater(num_added_cpus, zero));
  532. {
  533. aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
  534. aml_name("%s", opts.smi_path)));
  535. }
  536. aml_append(while_ctx2, ifctx);
  537. }
  538. /* Notify OSPM about new CPUs and clear insert events */
  539. aml_append(while_ctx2, aml_store(zero, cpu_idx));
  540. while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus));
  541. {
  542. aml_append(while_ctx,
  543. aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)),
  544. uid));
  545. aml_append(while_ctx,
  546. aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk));
  547. aml_append(while_ctx, aml_store(uid, aml_debug()));
  548. aml_append(while_ctx, aml_store(uid, cpu_selector));
  549. aml_append(while_ctx, aml_store(one, ins_evt));
  550. aml_append(while_ctx, aml_increment(cpu_idx));
  551. }
  552. aml_append(while_ctx2, while_ctx);
  553. /*
  554. * If another batch is needed, then it will resume scanning
  555. * exactly at -- and not after -- the last CPU that's currently
  556. * in CPU_ADDED_LIST. In other words, the last CPU in
  557. * CPU_ADDED_LIST is going to be re-checked. That's OK: we've
  558. * just cleared the insert event for *all* CPUs in
  559. * CPU_ADDED_LIST, including the last one. So the scan will
  560. * simply seek past it.
  561. */
  562. }
  563. aml_append(method, while_ctx2);
  564. aml_append(method, aml_release(ctrl_lock));
  565. }
  566. aml_append(cpus_dev, method);
  567. method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
  568. {
  569. Aml *uid = aml_arg(0);
  570. Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
  571. Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
  572. aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
  573. aml_append(method, aml_store(uid, cpu_selector));
  574. aml_append(method, aml_store(ev_cmd, cpu_cmd));
  575. aml_append(method, aml_store(aml_arg(1), cpu_data));
  576. aml_append(method, aml_store(st_cmd, cpu_cmd));
  577. aml_append(method, aml_store(aml_arg(2), cpu_data));
  578. aml_append(method, aml_release(ctrl_lock));
  579. }
  580. aml_append(cpus_dev, method);
  581. /* build Processor object for each processor */
  582. for (i = 0; i < arch_ids->len; i++) {
  583. Aml *dev;
  584. Aml *uid = aml_int(i);
  585. GArray *madt_buf = g_array_new(0, 1, 1);
  586. int arch_id = arch_ids->cpus[i].arch_id;
  587. if (opts.acpi_1_compatible && arch_id < 255) {
  588. dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
  589. } else {
  590. dev = aml_device(CPU_NAME_FMT, i);
  591. aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
  592. aml_append(dev, aml_name_decl("_UID", uid));
  593. }
  594. method = aml_method("_STA", 0, AML_SERIALIZED);
  595. aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
  596. aml_append(dev, method);
  597. /* build _MAT object */
  598. assert(adevc && adevc->madt_cpu);
  599. adevc->madt_cpu(i, arch_ids, madt_buf,
  600. true); /* set enabled flag */
  601. aml_append(dev, aml_name_decl("_MAT",
  602. aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
  603. g_array_free(madt_buf, true);
  604. if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
  605. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  606. aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
  607. aml_append(dev, method);
  608. }
  609. method = aml_method("_OST", 3, AML_SERIALIZED);
  610. aml_append(method,
  611. aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
  612. aml_arg(1), aml_arg(2))
  613. );
  614. aml_append(dev, method);
  615. /* Linux guests discard SRAT info for non-present CPUs
  616. * as a result _PXM is required for all CPUs which might
  617. * be hot-plugged. For simplicity, add it for all CPUs.
  618. */
  619. if (arch_ids->cpus[i].props.has_node_id) {
  620. aml_append(dev, aml_name_decl("_PXM",
  621. aml_int(arch_ids->cpus[i].props.node_id)));
  622. }
  623. aml_append(cpus_dev, dev);
  624. }
  625. }
  626. aml_append(sb_scope, cpus_dev);
  627. aml_append(table, sb_scope);
  628. method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
  629. aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
  630. aml_append(table, method);
  631. g_free(cphp_res_path);
  632. }