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stm32f2xx_timer.h 2.9 KB

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  1. /*
  2. * STM32F2XX Timer
  3. *
  4. * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. #ifndef HW_STM32F2XX_TIMER_H
  25. #define HW_STM32F2XX_TIMER_H
  26. #include "hw/sysbus.h"
  27. #include "qemu/timer.h"
  28. #include "qom/object.h"
  29. #define TIM_CR1 0x00
  30. #define TIM_CR2 0x04
  31. #define TIM_SMCR 0x08
  32. #define TIM_DIER 0x0C
  33. #define TIM_SR 0x10
  34. #define TIM_EGR 0x14
  35. #define TIM_CCMR1 0x18
  36. #define TIM_CCMR2 0x1C
  37. #define TIM_CCER 0x20
  38. #define TIM_CNT 0x24
  39. #define TIM_PSC 0x28
  40. #define TIM_ARR 0x2C
  41. #define TIM_CCR1 0x34
  42. #define TIM_CCR2 0x38
  43. #define TIM_CCR3 0x3C
  44. #define TIM_CCR4 0x40
  45. #define TIM_DCR 0x48
  46. #define TIM_DMAR 0x4C
  47. #define TIM_OR 0x50
  48. #define TIM_CR1_CEN 1
  49. #define TIM_EGR_UG 1
  50. #define TIM_CCER_CC2E (1 << 4)
  51. #define TIM_CCMR1_OC2M2 (1 << 14)
  52. #define TIM_CCMR1_OC2M1 (1 << 13)
  53. #define TIM_CCMR1_OC2M0 (1 << 12)
  54. #define TIM_CCMR1_OC2PE (1 << 11)
  55. #define TIM_DIER_UIE 1
  56. #define TYPE_STM32F2XX_TIMER "stm32f2xx-timer"
  57. typedef struct STM32F2XXTimerState STM32F2XXTimerState;
  58. DECLARE_INSTANCE_CHECKER(STM32F2XXTimerState, STM32F2XXTIMER,
  59. TYPE_STM32F2XX_TIMER)
  60. struct STM32F2XXTimerState {
  61. /* <private> */
  62. SysBusDevice parent_obj;
  63. /* <public> */
  64. MemoryRegion iomem;
  65. QEMUTimer *timer;
  66. qemu_irq irq;
  67. int64_t tick_offset;
  68. uint64_t hit_time;
  69. uint64_t freq_hz;
  70. uint32_t tim_cr1;
  71. uint32_t tim_cr2;
  72. uint32_t tim_smcr;
  73. uint32_t tim_dier;
  74. uint32_t tim_sr;
  75. uint32_t tim_egr;
  76. uint32_t tim_ccmr1;
  77. uint32_t tim_ccmr2;
  78. uint32_t tim_ccer;
  79. uint32_t tim_psc;
  80. uint32_t tim_arr;
  81. uint32_t tim_ccr1;
  82. uint32_t tim_ccr2;
  83. uint32_t tim_ccr3;
  84. uint32_t tim_ccr4;
  85. uint32_t tim_dcr;
  86. uint32_t tim_dmar;
  87. uint32_t tim_or;
  88. };
  89. #endif /* HW_STM32F2XX_TIMER_H */