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- /*
- * Raspberry Pi emulation (c) 2012 Gregory Estrade
- * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
- *
- * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
- * Written by Andrew Baumann
- *
- * ARM Local Timer IRQ Copyright (c) 2019. Zoltán Baldaszti
- * Added basic IRQ_TIMER interrupt support
- *
- * This work is licensed under the terms of the GNU GPL, version 2 or later.
- * See the COPYING file in the top-level directory.
- */
- #ifndef BCM2836_CONTROL_H
- #define BCM2836_CONTROL_H
- #include "hw/sysbus.h"
- #include "qemu/timer.h"
- #include "qom/object.h"
- /* 4 mailboxes per core, for 16 total */
- #define BCM2836_NCORES 4
- #define BCM2836_MBPERCORE 4
- #define TYPE_BCM2836_CONTROL "bcm2836-control"
- OBJECT_DECLARE_SIMPLE_TYPE(BCM2836ControlState, BCM2836_CONTROL)
- struct BCM2836ControlState {
- /*< private >*/
- SysBusDevice busdev;
- /*< public >*/
- MemoryRegion iomem;
- /* mailbox state */
- uint32_t mailboxes[BCM2836_NCORES * BCM2836_MBPERCORE];
- /* interrupt routing/control registers */
- uint8_t route_gpu_irq, route_gpu_fiq;
- uint32_t timercontrol[BCM2836_NCORES];
- uint32_t mailboxcontrol[BCM2836_NCORES];
- /* interrupt status regs (derived from input pins; not visible to user) */
- bool gpu_irq, gpu_fiq;
- uint8_t timerirqs[BCM2836_NCORES];
- /* local timer */
- QEMUTimer timer;
- uint32_t local_timer_control;
- uint8_t route_localtimer;
- /* interrupt source registers, post-routing (also input-derived; visible) */
- uint32_t irqsrc[BCM2836_NCORES];
- uint32_t fiqsrc[BCM2836_NCORES];
- /* outputs to CPU cores */
- qemu_irq irq[BCM2836_NCORES];
- qemu_irq fiq[BCM2836_NCORES];
- };
- #endif
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