cadence_uart.h 1.5 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556
  1. /*
  2. * Device model for Cadence UART
  3. *
  4. * Copyright (c) 2010 Xilinx Inc.
  5. * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
  6. * Copyright (c) 2012 PetaLogix Pty Ltd.
  7. * Written by Haibing Ma
  8. * M.Habib
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * as published by the Free Software Foundation; either version
  13. * 2 of the License, or (at your option) any later version.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef CADENCE_UART_H
  19. #define CADENCE_UART_H
  20. #include "hw/qdev-properties.h"
  21. #include "hw/sysbus.h"
  22. #include "chardev/char-fe.h"
  23. #include "qapi/error.h"
  24. #include "qemu/timer.h"
  25. #include "qom/object.h"
  26. #define CADENCE_UART_RX_FIFO_SIZE 16
  27. #define CADENCE_UART_TX_FIFO_SIZE 16
  28. #define CADENCE_UART_R_MAX (0x48/4)
  29. #define TYPE_CADENCE_UART "cadence_uart"
  30. OBJECT_DECLARE_SIMPLE_TYPE(CadenceUARTState, CADENCE_UART)
  31. struct CadenceUARTState {
  32. /*< private >*/
  33. SysBusDevice parent_obj;
  34. /*< public >*/
  35. MemoryRegion iomem;
  36. uint32_t r[CADENCE_UART_R_MAX];
  37. uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE];
  38. uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE];
  39. uint32_t rx_wpos;
  40. uint32_t rx_count;
  41. uint32_t tx_count;
  42. uint64_t char_tx_time;
  43. CharBackend chr;
  44. qemu_irq irq;
  45. QEMUTimer *fifo_trigger_handle;
  46. Clock *refclk;
  47. };
  48. #endif