virt.h 6.0 KB

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  1. /*
  2. *
  3. * Copyright (c) 2015 Linaro Limited
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2 or later, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * Emulate a virtual board which works by passing Linux all the information
  18. * it needs about what devices are present via the device tree.
  19. * There are some restrictions about what we can do here:
  20. * + we can only present devices whose Linux drivers will work based
  21. * purely on the device tree with no platform data at all
  22. * + we want to present a very stripped-down minimalist platform,
  23. * both because this reduces the security attack surface from the guest
  24. * and also because it reduces our exposure to being broken when
  25. * the kernel updates its device tree bindings and requires further
  26. * information in a device binding that we aren't providing.
  27. * This is essentially the same approach kvmtool uses.
  28. */
  29. #ifndef QEMU_ARM_VIRT_H
  30. #define QEMU_ARM_VIRT_H
  31. #include "exec/hwaddr.h"
  32. #include "qemu/notify.h"
  33. #include "hw/boards.h"
  34. #include "hw/arm/boot.h"
  35. #include "hw/arm/bsa.h"
  36. #include "hw/block/flash.h"
  37. #include "system/kvm.h"
  38. #include "hw/intc/arm_gicv3_common.h"
  39. #include "qom/object.h"
  40. #define NUM_GICV2M_SPIS 64
  41. #define NUM_VIRTIO_TRANSPORTS 32
  42. #define NUM_SMMU_IRQS 4
  43. /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
  44. #define PVTIME_SIZE_PER_CPU 64
  45. /* GPIO pins */
  46. #define GPIO_PIN_POWER_BUTTON 3
  47. enum {
  48. VIRT_FLASH,
  49. VIRT_MEM,
  50. VIRT_CPUPERIPHS,
  51. VIRT_GIC_DIST,
  52. VIRT_GIC_CPU,
  53. VIRT_GIC_V2M,
  54. VIRT_GIC_HYP,
  55. VIRT_GIC_VCPU,
  56. VIRT_GIC_ITS,
  57. VIRT_GIC_REDIST,
  58. VIRT_SMMU,
  59. VIRT_UART0,
  60. VIRT_MMIO,
  61. VIRT_RTC,
  62. VIRT_FW_CFG,
  63. VIRT_PCIE,
  64. VIRT_PCIE_MMIO,
  65. VIRT_PCIE_PIO,
  66. VIRT_PCIE_ECAM,
  67. VIRT_PLATFORM_BUS,
  68. VIRT_GPIO,
  69. VIRT_UART1,
  70. VIRT_SECURE_MEM,
  71. VIRT_SECURE_GPIO,
  72. VIRT_PCDIMM_ACPI,
  73. VIRT_ACPI_GED,
  74. VIRT_NVDIMM_ACPI,
  75. VIRT_PVTIME,
  76. VIRT_LOWMEMMAP_LAST,
  77. };
  78. /* indices of IO regions located after the RAM */
  79. enum {
  80. VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST,
  81. VIRT_HIGH_PCIE_ECAM,
  82. VIRT_HIGH_PCIE_MMIO,
  83. };
  84. typedef enum VirtIOMMUType {
  85. VIRT_IOMMU_NONE,
  86. VIRT_IOMMU_SMMUV3,
  87. VIRT_IOMMU_VIRTIO,
  88. } VirtIOMMUType;
  89. typedef enum VirtMSIControllerType {
  90. VIRT_MSI_CTRL_NONE,
  91. VIRT_MSI_CTRL_GICV2M,
  92. VIRT_MSI_CTRL_ITS,
  93. } VirtMSIControllerType;
  94. typedef enum VirtGICType {
  95. VIRT_GIC_VERSION_MAX = 0,
  96. VIRT_GIC_VERSION_HOST = 1,
  97. /* The concrete GIC values have to match the GIC version number */
  98. VIRT_GIC_VERSION_2 = 2,
  99. VIRT_GIC_VERSION_3 = 3,
  100. VIRT_GIC_VERSION_4 = 4,
  101. VIRT_GIC_VERSION_NOSEL,
  102. } VirtGICType;
  103. #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
  104. #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
  105. #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
  106. struct VirtMachineClass {
  107. MachineClass parent;
  108. bool disallow_affinity_adjustment;
  109. bool no_its;
  110. bool no_tcg_its;
  111. bool no_pmu;
  112. bool claim_edge_triggered_timers;
  113. bool smbios_old_sys_ver;
  114. bool no_highmem_compact;
  115. bool no_highmem_ecam;
  116. bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */
  117. bool kvm_no_adjvtime;
  118. bool no_kvm_steal_time;
  119. bool acpi_expose_flash;
  120. bool no_secure_gpio;
  121. /* Machines < 6.2 have no support for describing cpu topology to guest */
  122. bool no_cpu_topology;
  123. bool no_tcg_lpa2;
  124. bool no_ns_el2_virt_timer_irq;
  125. bool no_nested_smmu;
  126. };
  127. struct VirtMachineState {
  128. MachineState parent;
  129. Notifier machine_done;
  130. DeviceState *platform_bus_dev;
  131. FWCfgState *fw_cfg;
  132. PFlashCFI01 *flash[2];
  133. bool secure;
  134. bool highmem;
  135. bool highmem_compact;
  136. bool highmem_ecam;
  137. bool highmem_mmio;
  138. bool highmem_redists;
  139. bool its;
  140. bool tcg_its;
  141. bool virt;
  142. bool ras;
  143. bool mte;
  144. bool dtb_randomness;
  145. bool second_ns_uart_present;
  146. OnOffAuto acpi;
  147. VirtGICType gic_version;
  148. VirtIOMMUType iommu;
  149. bool default_bus_bypass_iommu;
  150. VirtMSIControllerType msi_controller;
  151. uint16_t virtio_iommu_bdf;
  152. struct arm_boot_info bootinfo;
  153. MemMapEntry *memmap;
  154. char *pciehb_nodename;
  155. const int *irqmap;
  156. int fdt_size;
  157. uint32_t clock_phandle;
  158. uint32_t gic_phandle;
  159. uint32_t msi_phandle;
  160. uint32_t iommu_phandle;
  161. int psci_conduit;
  162. hwaddr highest_gpa;
  163. DeviceState *gic;
  164. DeviceState *acpi_dev;
  165. Notifier powerdown_notifier;
  166. PCIBus *bus;
  167. char *oem_id;
  168. char *oem_table_id;
  169. bool ns_el2_virt_timer_irq;
  170. };
  171. #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
  172. #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
  173. OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
  174. void virt_acpi_setup(VirtMachineState *vms);
  175. bool virt_is_acpi_enabled(VirtMachineState *vms);
  176. /* Return number of redistributors that fit in the specified region */
  177. static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
  178. {
  179. uint32_t redist_size;
  180. if (vms->gic_version == VIRT_GIC_VERSION_3) {
  181. redist_size = GICV3_REDIST_SIZE;
  182. } else {
  183. redist_size = GICV4_REDIST_SIZE;
  184. }
  185. return vms->memmap[region].size / redist_size;
  186. }
  187. /* Return the number of used redistributor regions */
  188. static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
  189. {
  190. uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
  191. assert(vms->gic_version != VIRT_GIC_VERSION_2);
  192. return (MACHINE(vms)->smp.cpus > redist0_capacity &&
  193. vms->highmem_redists) ? 2 : 1;
  194. }
  195. #endif /* QEMU_ARM_VIRT_H */