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stm32l4x5_soc.h 2.0 KB

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  1. /*
  2. * STM32L4x5 SoC family
  3. *
  4. * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
  5. * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0-or-later
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10. * See the COPYING file in the top-level directory.
  11. *
  12. * This work is heavily inspired by the stm32f405_soc by Alistair Francis.
  13. * Original code is licensed under the MIT License:
  14. *
  15. * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
  16. */
  17. /*
  18. * The reference used is the STMicroElectronics RM0351 Reference manual
  19. * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
  20. * https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
  21. */
  22. #ifndef HW_ARM_STM32L4x5_SOC_H
  23. #define HW_ARM_STM32L4x5_SOC_H
  24. #include "exec/memory.h"
  25. #include "hw/arm/armv7m.h"
  26. #include "hw/or-irq.h"
  27. #include "hw/misc/stm32l4x5_syscfg.h"
  28. #include "hw/misc/stm32l4x5_exti.h"
  29. #include "hw/misc/stm32l4x5_rcc.h"
  30. #include "hw/gpio/stm32l4x5_gpio.h"
  31. #include "hw/char/stm32l4x5_usart.h"
  32. #include "qom/object.h"
  33. #define TYPE_STM32L4X5_SOC "stm32l4x5-soc"
  34. #define TYPE_STM32L4X5XC_SOC "stm32l4x5xc-soc"
  35. #define TYPE_STM32L4X5XE_SOC "stm32l4x5xe-soc"
  36. #define TYPE_STM32L4X5XG_SOC "stm32l4x5xg-soc"
  37. OBJECT_DECLARE_TYPE(Stm32l4x5SocState, Stm32l4x5SocClass, STM32L4X5_SOC)
  38. #define NUM_EXTI_OR_GATES 4
  39. #define STM_NUM_USARTS 3
  40. #define STM_NUM_UARTS 2
  41. struct Stm32l4x5SocState {
  42. SysBusDevice parent_obj;
  43. ARMv7MState armv7m;
  44. Stm32l4x5ExtiState exti;
  45. OrIRQState exti_or_gates[NUM_EXTI_OR_GATES];
  46. Stm32l4x5SyscfgState syscfg;
  47. Stm32l4x5RccState rcc;
  48. Stm32l4x5GpioState gpio[NUM_GPIOS];
  49. Stm32l4x5UsartBaseState usart[STM_NUM_USARTS];
  50. Stm32l4x5UsartBaseState uart[STM_NUM_UARTS];
  51. Stm32l4x5UsartBaseState lpuart;
  52. MemoryRegion sram1;
  53. MemoryRegion sram2;
  54. MemoryRegion flash;
  55. MemoryRegion flash_alias;
  56. };
  57. struct Stm32l4x5SocClass {
  58. SysBusDeviceClass parent_class;
  59. size_t flash_size;
  60. };
  61. #endif