ich9.h 3.1 KB

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  1. /*
  2. * QEMU GMCH/ICH9 LPC PM Emulation
  3. *
  4. * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
  5. * VA Linux Systems Japan K.K.
  6. *
  7. * This library is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU Lesser General Public
  9. * License as published by the Free Software Foundation; either
  10. * version 2.1 of the License, or (at your option) any later version.
  11. *
  12. * This library is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * Lesser General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU Lesser General Public
  18. * License along with this library; if not, see <http://www.gnu.org/licenses/>
  19. */
  20. #ifndef HW_ACPI_ICH9_H
  21. #define HW_ACPI_ICH9_H
  22. #include "hw/acpi/acpi.h"
  23. #include "hw/acpi/cpu_hotplug.h"
  24. #include "hw/acpi/cpu.h"
  25. #include "hw/acpi/pcihp.h"
  26. #include "hw/acpi/memory_hotplug.h"
  27. #include "hw/acpi/acpi_dev_interface.h"
  28. #include "hw/acpi/ich9_tco.h"
  29. #define ACPI_PCIHP_ADDR_ICH9 0x0cc0
  30. typedef struct ICH9LPCPMRegs {
  31. /*
  32. * In ich9 spec says that pm1_cnt register is 32bit width and
  33. * that the upper 16bits are reserved and unused.
  34. * PM1a_CNT_BLK = 2 in FADT so it is defined as uint16_t.
  35. */
  36. ACPIREGS acpi_regs;
  37. MemoryRegion io;
  38. MemoryRegion io_gpe;
  39. MemoryRegion io_smi;
  40. uint32_t smi_en;
  41. uint32_t smi_en_wmask;
  42. uint32_t smi_sts;
  43. uint32_t smi_sts_wmask;
  44. qemu_irq irq; /* SCI */
  45. uint32_t pm_io_base;
  46. Notifier powerdown_notifier;
  47. bool cpu_hotplug_legacy;
  48. AcpiCpuHotplug gpe_cpu;
  49. CPUHotplugState cpuhp_state;
  50. bool keep_pci_slot_hpc;
  51. bool use_acpi_hotplug_bridge;
  52. AcpiPciHpState acpi_pci_hotplug;
  53. MemHotplugState acpi_memory_hotplug;
  54. uint8_t disable_s3;
  55. uint8_t disable_s4;
  56. uint8_t s4_val;
  57. bool smm_enabled;
  58. bool smm_compat;
  59. bool enable_tco;
  60. TCOIORegs tco_regs;
  61. bool swsmi_timer_enabled;
  62. bool periodic_timer_enabled;
  63. QEMUTimer *swsmi_timer;
  64. QEMUTimer *periodic_timer;
  65. } ICH9LPCPMRegs;
  66. #define ACPI_PM_PROP_TCO_ENABLED "enable_tco"
  67. void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq);
  68. void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
  69. extern const VMStateDescription vmstate_ich9_pm;
  70. void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm);
  71. void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
  72. Error **errp);
  73. void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
  74. Error **errp);
  75. void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
  76. DeviceState *dev, Error **errp);
  77. void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
  78. Error **errp);
  79. bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus);
  80. void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list);
  81. #endif /* HW_ACPI_ICH9_H */