xen-pvh-common.c 14 KB

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  1. /*
  2. * QEMU Xen PVH machine - common code.
  3. *
  4. * Copyright (c) 2024 Advanced Micro Devices, Inc.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0-or-later
  7. */
  8. #include "qemu/osdep.h"
  9. #include "qemu/error-report.h"
  10. #include "qemu/units.h"
  11. #include "qapi/visitor.h"
  12. #include "hw/boards.h"
  13. #include "hw/irq.h"
  14. #include "system/tpm.h"
  15. #include "system/tpm_backend.h"
  16. #include "system/runstate.h"
  17. #include "hw/xen/xen-pvh-common.h"
  18. #include "trace.h"
  19. static const MemoryListener xen_memory_listener = {
  20. .region_add = xen_region_add,
  21. .region_del = xen_region_del,
  22. .log_start = NULL,
  23. .log_stop = NULL,
  24. .log_sync = NULL,
  25. .log_global_start = NULL,
  26. .log_global_stop = NULL,
  27. .priority = MEMORY_LISTENER_PRIORITY_ACCEL,
  28. };
  29. static void xen_pvh_init_ram(XenPVHMachineState *s,
  30. MemoryRegion *sysmem)
  31. {
  32. MachineState *ms = MACHINE(s);
  33. ram_addr_t block_len, ram_size[2];
  34. if (ms->ram_size <= s->cfg.ram_low.size) {
  35. ram_size[0] = ms->ram_size;
  36. ram_size[1] = 0;
  37. block_len = s->cfg.ram_low.base + ram_size[0];
  38. } else {
  39. ram_size[0] = s->cfg.ram_low.size;
  40. ram_size[1] = ms->ram_size - s->cfg.ram_low.size;
  41. block_len = s->cfg.ram_high.base + ram_size[1];
  42. }
  43. memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
  44. &error_fatal);
  45. memory_region_init_alias(&s->ram.low, NULL, "xen.ram.lo", &xen_memory,
  46. s->cfg.ram_low.base, ram_size[0]);
  47. memory_region_add_subregion(sysmem, s->cfg.ram_low.base, &s->ram.low);
  48. if (ram_size[1] > 0) {
  49. memory_region_init_alias(&s->ram.high, NULL, "xen.ram.hi", &xen_memory,
  50. s->cfg.ram_high.base, ram_size[1]);
  51. memory_region_add_subregion(sysmem, s->cfg.ram_high.base, &s->ram.high);
  52. }
  53. /* Setup support for grants. */
  54. memory_region_init_ram(&xen_grants, NULL, "xen.grants", block_len,
  55. &error_fatal);
  56. memory_region_add_subregion(sysmem, XEN_GRANT_ADDR_OFF, &xen_grants);
  57. }
  58. static void xen_set_irq(void *opaque, int irq, int level)
  59. {
  60. if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) {
  61. error_report("xendevicemodel_set_irq_level failed");
  62. }
  63. }
  64. static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
  65. {
  66. int i;
  67. /*
  68. * We create the transports in reverse order. Since qbus_realize()
  69. * prepends (not appends) new child buses, the decrementing loop below will
  70. * create a list of virtio-mmio buses with increasing base addresses.
  71. *
  72. * When a -device option is processed from the command line,
  73. * qbus_find_recursive() picks the next free virtio-mmio bus in forwards
  74. * order.
  75. *
  76. * This is what the Xen tools expect.
  77. */
  78. for (i = s->cfg.virtio_mmio_num - 1; i >= 0; i--) {
  79. hwaddr base = s->cfg.virtio_mmio.base + i * s->cfg.virtio_mmio.size;
  80. qemu_irq irq = qemu_allocate_irq(xen_set_irq, NULL,
  81. s->cfg.virtio_mmio_irq_base + i);
  82. sysbus_create_simple("virtio-mmio", base, irq);
  83. trace_xen_create_virtio_mmio_devices(i,
  84. s->cfg.virtio_mmio_irq_base + i,
  85. base);
  86. }
  87. }
  88. #ifdef CONFIG_TPM
  89. static void xen_enable_tpm(XenPVHMachineState *s)
  90. {
  91. Error *errp = NULL;
  92. DeviceState *dev;
  93. SysBusDevice *busdev;
  94. TPMBackend *be = qemu_find_tpm_be("tpm0");
  95. if (be == NULL) {
  96. error_report("Couldn't find tmp0 backend");
  97. return;
  98. }
  99. dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
  100. object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
  101. object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
  102. busdev = SYS_BUS_DEVICE(dev);
  103. sysbus_realize_and_unref(busdev, &error_fatal);
  104. sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);
  105. trace_xen_enable_tpm(s->cfg.tpm.base);
  106. }
  107. #endif
  108. /*
  109. * We use the GPEX PCIe controller with its internal INTX PCI interrupt
  110. * swizzling. This swizzling is emulated in QEMU and routes all INTX
  111. * interrupts from endpoints down to only 4 INTX interrupts.
  112. * See include/hw/pci/pci.h : pci_swizzle()
  113. */
  114. static inline void xenpvh_gpex_init(XenPVHMachineState *s,
  115. XenPVHMachineClass *xpc,
  116. MemoryRegion *sysmem)
  117. {
  118. MemoryRegion *ecam_reg;
  119. MemoryRegion *mmio_reg;
  120. DeviceState *dev;
  121. int i;
  122. object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex,
  123. TYPE_GPEX_HOST);
  124. dev = DEVICE(&s->pci.gpex);
  125. sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  126. ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
  127. memory_region_add_subregion(sysmem, s->cfg.pci_ecam.base, ecam_reg);
  128. mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
  129. if (s->cfg.pci_mmio.size) {
  130. memory_region_init_alias(&s->pci.mmio_alias, OBJECT(dev), "pcie-mmio",
  131. mmio_reg,
  132. s->cfg.pci_mmio.base, s->cfg.pci_mmio.size);
  133. memory_region_add_subregion(sysmem, s->cfg.pci_mmio.base,
  134. &s->pci.mmio_alias);
  135. }
  136. if (s->cfg.pci_mmio_high.size) {
  137. memory_region_init_alias(&s->pci.mmio_high_alias, OBJECT(dev),
  138. "pcie-mmio-high",
  139. mmio_reg, s->cfg.pci_mmio_high.base, s->cfg.pci_mmio_high.size);
  140. memory_region_add_subregion(sysmem, s->cfg.pci_mmio_high.base,
  141. &s->pci.mmio_high_alias);
  142. }
  143. /*
  144. * PVH implementations with PCI enabled must provide set_pci_intx_irq()
  145. * and optionally an implementation of set_pci_link_route().
  146. */
  147. assert(xpc->set_pci_intx_irq);
  148. for (i = 0; i < PCI_NUM_PINS; i++) {
  149. qemu_irq irq = qemu_allocate_irq(xpc->set_pci_intx_irq, s, i);
  150. sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
  151. gpex_set_irq_num(GPEX_HOST(dev), i, s->cfg.pci_intx_irq_base + i);
  152. if (xpc->set_pci_link_route) {
  153. xpc->set_pci_link_route(i, s->cfg.pci_intx_irq_base + i);
  154. }
  155. }
  156. }
  157. static void xen_pvh_init(MachineState *ms)
  158. {
  159. XenPVHMachineState *s = XEN_PVH_MACHINE(ms);
  160. XenPVHMachineClass *xpc = XEN_PVH_MACHINE_GET_CLASS(s);
  161. MemoryRegion *sysmem = get_system_memory();
  162. if (ms->ram_size == 0) {
  163. warn_report("%s: ram size not specified. QEMU machine started"
  164. " without IOREQ (no emulated devices including virtio)",
  165. MACHINE_CLASS(object_get_class(OBJECT(ms)))->desc);
  166. return;
  167. }
  168. xen_pvh_init_ram(s, sysmem);
  169. xen_register_ioreq(&s->ioreq, ms->smp.max_cpus,
  170. xpc->handle_bufioreq,
  171. &xen_memory_listener);
  172. if (s->cfg.virtio_mmio_num) {
  173. xen_create_virtio_mmio_devices(s);
  174. }
  175. #ifdef CONFIG_TPM
  176. if (xpc->has_tpm) {
  177. if (s->cfg.tpm.base) {
  178. xen_enable_tpm(s);
  179. } else {
  180. warn_report("tpm-base-addr is not set. TPM will not be enabled");
  181. }
  182. }
  183. #endif
  184. /* Non-zero pci-ecam-size enables PCI. */
  185. if (s->cfg.pci_ecam.size) {
  186. if (s->cfg.pci_ecam.size != 256 * MiB) {
  187. error_report("pci-ecam-size only supports values 0 or 0x10000000");
  188. exit(EXIT_FAILURE);
  189. }
  190. if (!s->cfg.pci_intx_irq_base) {
  191. error_report("PCI enabled but pci-intx-irq-base not set");
  192. exit(EXIT_FAILURE);
  193. }
  194. xenpvh_gpex_init(s, xpc, sysmem);
  195. }
  196. /* Call the implementation specific init. */
  197. if (xpc->init) {
  198. xpc->init(ms);
  199. }
  200. }
  201. #define XEN_PVH_PROP_MEMMAP_SETTER(n, f) \
  202. static void xen_pvh_set_ ## n ## _ ## f(Object *obj, Visitor *v, \
  203. const char *name, void *opaque, \
  204. Error **errp) \
  205. { \
  206. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
  207. uint64_t value; \
  208. \
  209. if (!visit_type_size(v, name, &value, errp)) { \
  210. return; \
  211. } \
  212. xp->cfg.n.f = value; \
  213. }
  214. #define XEN_PVH_PROP_MEMMAP_GETTER(n, f) \
  215. static void xen_pvh_get_ ## n ## _ ## f(Object *obj, Visitor *v, \
  216. const char *name, void *opaque, \
  217. Error **errp) \
  218. { \
  219. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
  220. uint64_t value = xp->cfg.n.f; \
  221. \
  222. visit_type_uint64(v, name, &value, errp); \
  223. }
  224. #define XEN_PVH_PROP_MEMMAP_BASE(n) \
  225. XEN_PVH_PROP_MEMMAP_SETTER(n, base) \
  226. XEN_PVH_PROP_MEMMAP_GETTER(n, base) \
  227. #define XEN_PVH_PROP_MEMMAP_SIZE(n) \
  228. XEN_PVH_PROP_MEMMAP_SETTER(n, size) \
  229. XEN_PVH_PROP_MEMMAP_GETTER(n, size)
  230. #define XEN_PVH_PROP_MEMMAP(n) \
  231. XEN_PVH_PROP_MEMMAP_BASE(n) \
  232. XEN_PVH_PROP_MEMMAP_SIZE(n)
  233. XEN_PVH_PROP_MEMMAP(ram_low)
  234. XEN_PVH_PROP_MEMMAP(ram_high)
  235. /* TPM only has a base-addr option. */
  236. XEN_PVH_PROP_MEMMAP_BASE(tpm)
  237. XEN_PVH_PROP_MEMMAP(virtio_mmio)
  238. XEN_PVH_PROP_MEMMAP(pci_ecam)
  239. XEN_PVH_PROP_MEMMAP(pci_mmio)
  240. XEN_PVH_PROP_MEMMAP(pci_mmio_high)
  241. static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v,
  242. const char *name, void *opaque,
  243. Error **errp)
  244. {
  245. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
  246. uint32_t value;
  247. if (!visit_type_uint32(v, name, &value, errp)) {
  248. return;
  249. }
  250. xp->cfg.pci_intx_irq_base = value;
  251. }
  252. static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v,
  253. const char *name, void *opaque,
  254. Error **errp)
  255. {
  256. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
  257. uint32_t value = xp->cfg.pci_intx_irq_base;
  258. visit_type_uint32(v, name, &value, errp);
  259. }
  260. void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc)
  261. {
  262. ObjectClass *oc = OBJECT_CLASS(xpc);
  263. MachineClass *mc = MACHINE_CLASS(xpc);
  264. #define OC_MEMMAP_PROP_BASE(c, prop_name, name) \
  265. do { \
  266. object_class_property_add(c, prop_name "-base", "uint64_t", \
  267. xen_pvh_get_ ## name ## _base, \
  268. xen_pvh_set_ ## name ## _base, NULL, NULL); \
  269. object_class_property_set_description(oc, prop_name "-base", \
  270. "Set base address for " prop_name); \
  271. } while (0)
  272. #define OC_MEMMAP_PROP_SIZE(c, prop_name, name) \
  273. do { \
  274. object_class_property_add(c, prop_name "-size", "uint64_t", \
  275. xen_pvh_get_ ## name ## _size, \
  276. xen_pvh_set_ ## name ## _size, NULL, NULL); \
  277. object_class_property_set_description(oc, prop_name "-size", \
  278. "Set memory range size for " prop_name); \
  279. } while (0)
  280. #define OC_MEMMAP_PROP(c, prop_name, name) \
  281. do { \
  282. OC_MEMMAP_PROP_BASE(c, prop_name, name); \
  283. OC_MEMMAP_PROP_SIZE(c, prop_name, name); \
  284. } while (0)
  285. /*
  286. * We provide memmap properties to allow Xen to move things to other
  287. * addresses for example when users need to accomodate the memory-map
  288. * for 1:1 mapped devices/memory.
  289. */
  290. OC_MEMMAP_PROP(oc, "ram-low", ram_low);
  291. OC_MEMMAP_PROP(oc, "ram-high", ram_high);
  292. if (xpc->has_virtio_mmio) {
  293. OC_MEMMAP_PROP(oc, "virtio-mmio", virtio_mmio);
  294. }
  295. if (xpc->has_pci) {
  296. OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam);
  297. OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio);
  298. OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high);
  299. object_class_property_add(oc, "pci-intx-irq-base", "uint32_t",
  300. xen_pvh_get_pci_intx_irq_base,
  301. xen_pvh_set_pci_intx_irq_base,
  302. NULL, NULL);
  303. object_class_property_set_description(oc, "pci-intx-irq-base",
  304. "Set PCI INTX interrupt base line.");
  305. }
  306. #ifdef CONFIG_TPM
  307. if (xpc->has_tpm) {
  308. object_class_property_add(oc, "tpm-base-addr", "uint64_t",
  309. xen_pvh_get_tpm_base,
  310. xen_pvh_set_tpm_base,
  311. NULL, NULL);
  312. object_class_property_set_description(oc, "tpm-base-addr",
  313. "Set Base address for TPM device.");
  314. machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
  315. }
  316. #endif
  317. }
  318. static void xen_pvh_class_init(ObjectClass *oc, void *data)
  319. {
  320. MachineClass *mc = MACHINE_CLASS(oc);
  321. mc->init = xen_pvh_init;
  322. mc->desc = "Xen PVH machine";
  323. mc->max_cpus = 1;
  324. mc->default_machine_opts = "accel=xen";
  325. /* Set to zero to make sure that the real ram size is passed. */
  326. mc->default_ram_size = 0;
  327. }
  328. static const TypeInfo xen_pvh_info = {
  329. .name = TYPE_XEN_PVH_MACHINE,
  330. .parent = TYPE_MACHINE,
  331. .abstract = true,
  332. .instance_size = sizeof(XenPVHMachineState),
  333. .class_size = sizeof(XenPVHMachineClass),
  334. .class_init = xen_pvh_class_init,
  335. };
  336. static void xen_pvh_register_types(void)
  337. {
  338. type_register_static(&xen_pvh_info);
  339. }
  340. type_init(xen_pvh_register_types);