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xlnx-usb-subsystem.c 3.3 KB

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  1. /*
  2. * QEMU model of the Xilinx usb subsystem
  3. *
  4. * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu <sai.pava.boddu@xilinx.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. #include "qemu/osdep.h"
  25. #include "hw/sysbus.h"
  26. #include "hw/register.h"
  27. #include "qemu/bitops.h"
  28. #include "qom/object.h"
  29. #include "qapi/error.h"
  30. #include "hw/qdev-properties.h"
  31. #include "hw/usb/xlnx-usb-subsystem.h"
  32. static void versal_usb2_realize(DeviceState *dev, Error **errp)
  33. {
  34. VersalUsb2 *s = VERSAL_USB2(dev);
  35. SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  36. Error *err = NULL;
  37. sysbus_realize(SYS_BUS_DEVICE(&s->dwc3), &err);
  38. if (err) {
  39. error_propagate(errp, err);
  40. return;
  41. }
  42. sysbus_realize(SYS_BUS_DEVICE(&s->usb2Ctrl), &err);
  43. if (err) {
  44. error_propagate(errp, err);
  45. return;
  46. }
  47. sysbus_init_mmio(sbd, &s->dwc3_mr);
  48. sysbus_init_mmio(sbd, &s->usb2Ctrl_mr);
  49. qdev_pass_gpios(DEVICE(&s->dwc3.sysbus_xhci), dev, SYSBUS_DEVICE_GPIO_IRQ);
  50. }
  51. static void versal_usb2_init(Object *obj)
  52. {
  53. VersalUsb2 *s = VERSAL_USB2(obj);
  54. object_initialize_child(obj, "versal.dwc3", &s->dwc3,
  55. TYPE_USB_DWC3);
  56. object_initialize_child(obj, "versal.usb2-ctrl", &s->usb2Ctrl,
  57. TYPE_XILINX_VERSAL_USB2_CTRL_REGS);
  58. memory_region_init_alias(&s->dwc3_mr, obj, "versal.dwc3_alias",
  59. &s->dwc3.iomem, 0, DWC3_SIZE);
  60. memory_region_init_alias(&s->usb2Ctrl_mr, obj, "versal.usb2Ctrl_alias",
  61. &s->usb2Ctrl.iomem, 0, USB2_REGS_R_MAX * 4);
  62. qdev_alias_all_properties(DEVICE(&s->dwc3), obj);
  63. qdev_alias_all_properties(DEVICE(&s->dwc3.sysbus_xhci), obj);
  64. object_property_add_alias(obj, "dma", OBJECT(&s->dwc3.sysbus_xhci), "dma");
  65. }
  66. static void versal_usb2_class_init(ObjectClass *klass, void *data)
  67. {
  68. DeviceClass *dc = DEVICE_CLASS(klass);
  69. dc->realize = versal_usb2_realize;
  70. }
  71. static const TypeInfo versal_usb2_info = {
  72. .name = TYPE_XILINX_VERSAL_USB2,
  73. .parent = TYPE_SYS_BUS_DEVICE,
  74. .instance_size = sizeof(VersalUsb2),
  75. .class_init = versal_usb2_class_init,
  76. .instance_init = versal_usb2_init,
  77. };
  78. static void versal_usb_types(void)
  79. {
  80. type_register_static(&versal_usb2_info);
  81. }
  82. type_init(versal_usb_types)