sd.c 85 KB

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  1. /*
  2. * SD Memory Card emulation as defined in the "SD Memory Card Physical
  3. * layer specification, Version 2.00."
  4. *
  5. * eMMC emulation defined in "JEDEC Standard No. 84-A43"
  6. *
  7. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  8. * Copyright (c) 2007 CodeSourcery
  9. * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
  10. *
  11. * Redistribution and use in source and binary forms, with or without
  12. * modification, are permitted provided that the following conditions
  13. * are met:
  14. *
  15. * 1. Redistributions of source code must retain the above copyright
  16. * notice, this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright
  18. * notice, this list of conditions and the following disclaimer in
  19. * the documentation and/or other materials provided with the
  20. * distribution.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  24. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  25. * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR
  26. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  27. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  28. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  29. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  30. * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include "qemu/osdep.h"
  35. #include "qemu/units.h"
  36. #include "qemu/cutils.h"
  37. #include "hw/irq.h"
  38. #include "hw/registerfields.h"
  39. #include "system/block-backend.h"
  40. #include "hw/sd/sd.h"
  41. #include "migration/vmstate.h"
  42. #include "qapi/error.h"
  43. #include "qemu/bitmap.h"
  44. #include "hw/qdev-properties.h"
  45. #include "hw/qdev-properties-system.h"
  46. #include "qemu/error-report.h"
  47. #include "qemu/timer.h"
  48. #include "qemu/log.h"
  49. #include "qemu/guest-random.h"
  50. #include "qemu/module.h"
  51. #include "sdmmc-internal.h"
  52. #include "trace.h"
  53. //#define DEBUG_SD 1
  54. #define SDSC_MAX_CAPACITY (2 * GiB)
  55. #define INVALID_ADDRESS UINT32_MAX
  56. typedef enum {
  57. sd_r0 = 0, /* no response */
  58. sd_r1, /* normal response command */
  59. sd_r2_i, /* CID register */
  60. sd_r2_s, /* CSD register */
  61. sd_r3, /* OCR register */
  62. sd_r6 = 6, /* Published RCA response */
  63. sd_r7, /* Operating voltage */
  64. sd_r1b = -1,
  65. sd_illegal = -2,
  66. } sd_rsp_type_t;
  67. typedef enum {
  68. sd_spi,
  69. sd_bc, /* broadcast -- no response */
  70. sd_bcr, /* broadcast with response */
  71. sd_ac, /* addressed -- no data transfer */
  72. sd_adtc, /* addressed with data transfer */
  73. } sd_cmd_type_t;
  74. enum SDCardModes {
  75. sd_inactive,
  76. sd_card_identification_mode,
  77. sd_data_transfer_mode,
  78. };
  79. enum SDCardStates {
  80. sd_waitirq_state = -2, /* emmc */
  81. sd_inactive_state = -1,
  82. sd_idle_state = 0,
  83. sd_ready_state = 1,
  84. sd_identification_state = 2,
  85. sd_standby_state = 3,
  86. sd_transfer_state = 4,
  87. sd_sendingdata_state = 5,
  88. sd_receivingdata_state = 6,
  89. sd_programming_state = 7,
  90. sd_disconnect_state = 8,
  91. sd_bus_test_state = 9, /* emmc */
  92. sd_sleep_state = 10, /* emmc */
  93. sd_io_state = 15 /* sd */
  94. };
  95. #define SDMMC_CMD_MAX 64
  96. typedef sd_rsp_type_t (*sd_cmd_handler)(SDState *sd, SDRequest req);
  97. typedef struct SDProto {
  98. const char *name;
  99. struct {
  100. const unsigned class;
  101. const sd_cmd_type_t type;
  102. const char *name;
  103. sd_cmd_handler handler;
  104. } cmd[SDMMC_CMD_MAX], acmd[SDMMC_CMD_MAX];
  105. } SDProto;
  106. struct SDState {
  107. DeviceState parent_obj;
  108. /* SD Memory Card Registers */
  109. uint32_t ocr;
  110. uint8_t scr[8];
  111. uint8_t cid[16];
  112. uint8_t csd[16];
  113. uint16_t rca;
  114. uint32_t card_status;
  115. uint8_t sd_status[64];
  116. union {
  117. uint8_t ext_csd[512];
  118. struct {
  119. uint8_t ext_csd_rw[192]; /* Modes segment */
  120. uint8_t ext_csd_ro[320]; /* Properties segment */
  121. };
  122. };
  123. /* Static properties */
  124. uint8_t spec_version;
  125. uint64_t boot_part_size;
  126. BlockBackend *blk;
  127. uint8_t boot_config;
  128. const SDProto *proto;
  129. /* Runtime changeables */
  130. uint32_t mode; /* current card mode, one of SDCardModes */
  131. int32_t state; /* current card state, one of SDCardStates */
  132. uint32_t vhs;
  133. bool wp_switch;
  134. unsigned long *wp_group_bmap;
  135. int32_t wp_group_bits;
  136. uint64_t size;
  137. uint32_t blk_len;
  138. uint32_t multi_blk_cnt;
  139. uint32_t erase_start;
  140. uint32_t erase_end;
  141. uint8_t pwd[16];
  142. uint32_t pwd_len;
  143. uint8_t function_group[6];
  144. uint8_t current_cmd;
  145. const char *last_cmd_name;
  146. /* True if we will handle the next command as an ACMD. Note that this does
  147. * *not* track the APP_CMD status bit!
  148. */
  149. bool expecting_acmd;
  150. uint32_t blk_written;
  151. uint64_t data_start;
  152. uint32_t data_offset;
  153. size_t data_size;
  154. uint8_t data[512];
  155. QEMUTimer *ocr_power_timer;
  156. uint8_t dat_lines;
  157. bool cmd_line;
  158. };
  159. static void sd_realize(DeviceState *dev, Error **errp);
  160. static const SDProto sd_proto_spi;
  161. static const SDProto sd_proto_emmc;
  162. static bool sd_is_spi(SDState *sd)
  163. {
  164. return sd->proto == &sd_proto_spi;
  165. }
  166. static bool sd_is_emmc(SDState *sd)
  167. {
  168. return sd->proto == &sd_proto_emmc;
  169. }
  170. static const char *sd_version_str(enum SDPhySpecificationVersion version)
  171. {
  172. static const char *sdphy_version[] = {
  173. [SD_PHY_SPECv1_10_VERS] = "v1.10",
  174. [SD_PHY_SPECv2_00_VERS] = "v2.00",
  175. [SD_PHY_SPECv3_01_VERS] = "v3.01",
  176. };
  177. if (version >= ARRAY_SIZE(sdphy_version)) {
  178. return "unsupported version";
  179. }
  180. return sdphy_version[version];
  181. }
  182. static const char *sd_mode_name(enum SDCardModes mode)
  183. {
  184. static const char *mode_name[] = {
  185. [sd_inactive] = "inactive",
  186. [sd_card_identification_mode] = "identification",
  187. [sd_data_transfer_mode] = "transfer",
  188. };
  189. assert(mode < ARRAY_SIZE(mode_name));
  190. return mode_name[mode];
  191. }
  192. static const char *sd_state_name(enum SDCardStates state)
  193. {
  194. static const char *state_name[] = {
  195. [sd_idle_state] = "idle",
  196. [sd_ready_state] = "ready",
  197. [sd_identification_state] = "identification",
  198. [sd_standby_state] = "standby",
  199. [sd_transfer_state] = "transfer",
  200. [sd_sendingdata_state] = "sendingdata",
  201. [sd_bus_test_state] = "bus-test",
  202. [sd_receivingdata_state] = "receivingdata",
  203. [sd_programming_state] = "programming",
  204. [sd_disconnect_state] = "disconnect",
  205. [sd_sleep_state] = "sleep",
  206. [sd_io_state] = "i/o"
  207. };
  208. if (state == sd_inactive_state) {
  209. return "inactive";
  210. }
  211. if (state == sd_waitirq_state) {
  212. return "wait-irq";
  213. }
  214. assert(state < ARRAY_SIZE(state_name));
  215. return state_name[state];
  216. }
  217. static const char *sd_response_name(sd_rsp_type_t rsp)
  218. {
  219. static const char *response_name[] = {
  220. [sd_r0] = "RESP#0 (no response)",
  221. [sd_r1] = "RESP#1 (normal cmd)",
  222. [sd_r2_i] = "RESP#2 (CID reg)",
  223. [sd_r2_s] = "RESP#2 (CSD reg)",
  224. [sd_r3] = "RESP#3 (OCR reg)",
  225. [sd_r6] = "RESP#6 (RCA)",
  226. [sd_r7] = "RESP#7 (operating voltage)",
  227. };
  228. if (rsp == sd_illegal) {
  229. return "ILLEGAL RESP";
  230. }
  231. if (rsp == sd_r1b) {
  232. rsp = sd_r1;
  233. }
  234. assert(rsp < ARRAY_SIZE(response_name));
  235. return response_name[rsp];
  236. }
  237. static const char *sd_cmd_name(SDState *sd, uint8_t cmd)
  238. {
  239. static const char *cmd_abbrev[SDMMC_CMD_MAX] = {
  240. [18] = "READ_MULTIPLE_BLOCK",
  241. [25] = "WRITE_MULTIPLE_BLOCK",
  242. };
  243. const SDProto *sdp = sd->proto;
  244. if (sdp->cmd[cmd].handler) {
  245. assert(!cmd_abbrev[cmd]);
  246. return sdp->cmd[cmd].name;
  247. }
  248. return cmd_abbrev[cmd] ? cmd_abbrev[cmd] : "UNKNOWN_CMD";
  249. }
  250. static const char *sd_acmd_name(SDState *sd, uint8_t cmd)
  251. {
  252. const SDProto *sdp = sd->proto;
  253. if (sdp->acmd[cmd].handler) {
  254. return sdp->acmd[cmd].name;
  255. }
  256. return "UNKNOWN_ACMD";
  257. }
  258. static uint8_t sd_get_dat_lines(SDState *sd)
  259. {
  260. return sd->dat_lines;
  261. }
  262. static bool sd_get_cmd_line(SDState *sd)
  263. {
  264. return sd->cmd_line;
  265. }
  266. static void sd_set_voltage(SDState *sd, uint16_t millivolts)
  267. {
  268. trace_sdcard_set_voltage(millivolts);
  269. switch (millivolts) {
  270. case 3001 ... 3600: /* SD_VOLTAGE_3_3V */
  271. case 2001 ... 3000: /* SD_VOLTAGE_3_0V */
  272. break;
  273. default:
  274. qemu_log_mask(LOG_GUEST_ERROR, "SD card voltage not supported: %.3fV",
  275. millivolts / 1000.f);
  276. }
  277. }
  278. static void sd_set_mode(SDState *sd)
  279. {
  280. switch (sd->state) {
  281. case sd_inactive_state:
  282. sd->mode = sd_inactive;
  283. break;
  284. case sd_idle_state:
  285. case sd_ready_state:
  286. case sd_identification_state:
  287. sd->mode = sd_card_identification_mode;
  288. break;
  289. case sd_standby_state:
  290. case sd_transfer_state:
  291. case sd_sendingdata_state:
  292. case sd_receivingdata_state:
  293. case sd_programming_state:
  294. case sd_disconnect_state:
  295. sd->mode = sd_data_transfer_mode;
  296. break;
  297. }
  298. }
  299. static uint8_t sd_crc7(const void *message, size_t width)
  300. {
  301. int i, bit;
  302. uint8_t shift_reg = 0x00;
  303. const uint8_t *msg = (const uint8_t *)message;
  304. for (i = 0; i < width; i ++, msg ++)
  305. for (bit = 7; bit >= 0; bit --) {
  306. shift_reg <<= 1;
  307. if ((shift_reg >> 7) ^ ((*msg >> bit) & 1))
  308. shift_reg ^= 0x89;
  309. }
  310. return shift_reg;
  311. }
  312. /* Operation Conditions register */
  313. #define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
  314. FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
  315. FIELD(OCR, VDD_VOLTAGE_WIN_LO, 0, 8)
  316. FIELD(OCR, DUAL_VOLTAGE_CARD, 7, 1)
  317. FIELD(OCR, VDD_VOLTAGE_WIN_HI, 8, 16)
  318. FIELD(OCR, ACCEPT_SWITCH_1V8, 24, 1) /* Only UHS-I */
  319. FIELD(OCR, UHS_II_CARD, 29, 1) /* Only UHS-II */
  320. FIELD(OCR, CARD_CAPACITY, 30, 1) /* 0:SDSC, 1:SDHC/SDXC */
  321. FIELD(OCR, CARD_POWER_UP, 31, 1)
  322. #define ACMD41_ENQUIRY_MASK 0x00ffffff
  323. #define ACMD41_R3_MASK (R_OCR_VDD_VOLTAGE_WIN_HI_MASK \
  324. | R_OCR_ACCEPT_SWITCH_1V8_MASK \
  325. | R_OCR_UHS_II_CARD_MASK \
  326. | R_OCR_CARD_CAPACITY_MASK \
  327. | R_OCR_CARD_POWER_UP_MASK)
  328. static void sd_ocr_powerup(void *opaque)
  329. {
  330. SDState *sd = opaque;
  331. trace_sdcard_powerup();
  332. assert(!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP));
  333. /* card power-up OK */
  334. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
  335. if (sd->size > SDSC_MAX_CAPACITY) {
  336. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
  337. }
  338. }
  339. static void sd_set_ocr(SDState *sd)
  340. {
  341. /* All voltages OK */
  342. sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
  343. if (sd_is_spi(sd)) {
  344. /*
  345. * We don't need to emulate power up sequence in SPI-mode.
  346. * Thus, the card's power up status bit should be set to 1 when reset.
  347. * The card's capacity status bit should also be set if SD card size
  348. * is larger than 2GB for SDHC support.
  349. */
  350. sd_ocr_powerup(sd);
  351. }
  352. }
  353. /* SD Configuration register */
  354. static void sd_set_scr(SDState *sd)
  355. {
  356. sd->scr[0] = 0 << 4; /* SCR structure version 1.0 */
  357. if (sd->spec_version == SD_PHY_SPECv1_10_VERS) {
  358. sd->scr[0] |= 1; /* Spec Version 1.10 */
  359. } else {
  360. sd->scr[0] |= 2; /* Spec Version 2.00 or Version 3.0X */
  361. }
  362. sd->scr[1] = (2 << 4) /* SDSC Card (Security Version 1.01) */
  363. | 0b0101; /* 1-bit or 4-bit width bus modes */
  364. sd->scr[2] = 0x00; /* Extended Security is not supported. */
  365. if (sd->spec_version >= SD_PHY_SPECv3_01_VERS) {
  366. sd->scr[2] |= 1 << 7; /* Spec Version 3.0X */
  367. }
  368. sd->scr[3] = 0x00;
  369. /* reserved for manufacturer usage */
  370. sd->scr[4] = 0x00;
  371. sd->scr[5] = 0x00;
  372. sd->scr[6] = 0x00;
  373. sd->scr[7] = 0x00;
  374. }
  375. /* Card IDentification register */
  376. #define MID 0xaa
  377. #define OID "XY"
  378. #define PNM "QEMU!"
  379. #define PRV 0x01
  380. #define MDT_YR 2006
  381. #define MDT_MON 2
  382. static void sd_set_cid(SDState *sd)
  383. {
  384. sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
  385. sd->cid[1] = OID[0]; /* OEM/Application ID (OID) */
  386. sd->cid[2] = OID[1];
  387. sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
  388. sd->cid[4] = PNM[1];
  389. sd->cid[5] = PNM[2];
  390. sd->cid[6] = PNM[3];
  391. sd->cid[7] = PNM[4];
  392. sd->cid[8] = PRV; /* Fake product revision (PRV) */
  393. stl_be_p(&sd->cid[9], 0xdeadbeef); /* Fake serial number (PSN) */
  394. sd->cid[13] = 0x00 | /* Manufacture date (MDT) */
  395. ((MDT_YR - 2000) / 10);
  396. sd->cid[14] = ((MDT_YR % 10) << 4) | MDT_MON;
  397. sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
  398. }
  399. static void emmc_set_cid(SDState *sd)
  400. {
  401. sd->cid[0] = MID; /* Fake card manufacturer ID (MID) */
  402. sd->cid[1] = 0b01; /* CBX: soldered BGA */
  403. sd->cid[2] = OID[0]; /* OEM/Application ID (OID) */
  404. sd->cid[3] = PNM[0]; /* Fake product name (PNM) */
  405. sd->cid[4] = PNM[1];
  406. sd->cid[5] = PNM[2];
  407. sd->cid[6] = PNM[3];
  408. sd->cid[7] = PNM[4];
  409. sd->cid[8] = PNM[4];
  410. sd->cid[9] = PRV; /* Fake product revision (PRV) */
  411. stl_be_p(&sd->cid[10], 0xdeadbeef); /* Fake serial number (PSN) */
  412. sd->cid[14] = (MDT_MON << 4) | (MDT_YR - 1997); /* Manufacture date (MDT) */
  413. sd->cid[15] = (sd_crc7(sd->cid, 15) << 1) | 1;
  414. }
  415. /* Card-Specific Data register */
  416. #define HWBLOCK_SHIFT 9 /* 512 bytes */
  417. #define SECTOR_SHIFT 5 /* 16 kilobytes */
  418. #define WPGROUP_SHIFT 7 /* 2 megs */
  419. #define CMULT_SHIFT 9 /* 512 times HWBLOCK_SIZE */
  420. #define WPGROUP_SIZE (1 << (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT))
  421. static const uint8_t sd_csd_rw_mask[16] = {
  422. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  423. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe,
  424. };
  425. static void emmc_set_ext_csd(SDState *sd, uint64_t size)
  426. {
  427. uint32_t sectcount = size >> HWBLOCK_SHIFT;
  428. memset(sd->ext_csd, 0, sizeof(sd->ext_csd)); /* FIXME only RW at reset */
  429. /* Properties segment (RO) */
  430. sd->ext_csd[EXT_CSD_S_CMD_SET] = 0b1; /* supported command sets */
  431. sd->ext_csd[EXT_CSD_BOOT_INFO] = 0x0; /* Boot information */
  432. /* Boot partition size. 128KB unit */
  433. sd->ext_csd[EXT_CSD_BOOT_MULT] = sd->boot_part_size / (128 * KiB);
  434. sd->ext_csd[EXT_CSD_ACC_SIZE] = 0x1; /* Access size */
  435. sd->ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] = 0x01; /* HC Erase unit size */
  436. sd->ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] = 0x01; /* HC erase timeout */
  437. sd->ext_csd[EXT_CSD_REL_WR_SEC_C] = 0x1; /* Reliable write sector count */
  438. sd->ext_csd[EXT_CSD_HC_WP_GRP_SIZE] = 0x01; /* HC write protect group size */
  439. sd->ext_csd[EXT_CSD_S_C_VCC] = 0x01; /* Sleep current VCC */
  440. sd->ext_csd[EXT_CSD_S_C_VCCQ] = 0x01; /* Sleep current VCCQ */
  441. sd->ext_csd[EXT_CSD_S_A_TIMEOUT] = 0x01; /* Sleep/Awake timeout */
  442. stl_le_p(&sd->ext_csd[EXT_CSD_SEC_CNT], sectcount); /* Sector count */
  443. sd->ext_csd[210] = 0x46; /* Min write perf for 8bit@52Mhz */
  444. sd->ext_csd[209] = 0x46; /* Min read perf for 8bit@52Mhz */
  445. sd->ext_csd[208] = 0x46; /* Min write perf for 4bit@52Mhz */
  446. sd->ext_csd[207] = 0x46; /* Min read perf for 4bit@52Mhz */
  447. sd->ext_csd[206] = 0x46; /* Min write perf for 4bit@26Mhz */
  448. sd->ext_csd[205] = 0x46; /* Min read perf for 4bit@26Mhz */
  449. sd->ext_csd[EXT_CSD_CARD_TYPE] = 0b11;
  450. sd->ext_csd[EXT_CSD_STRUCTURE] = 2;
  451. sd->ext_csd[EXT_CSD_REV] = 3;
  452. /* Mode segment (RW) */
  453. sd->ext_csd[EXT_CSD_PART_CONFIG] = sd->boot_config;
  454. }
  455. static void emmc_set_csd(SDState *sd, uint64_t size)
  456. {
  457. int hwblock_shift = HWBLOCK_SHIFT;
  458. uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
  459. uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
  460. sd->csd[0] = (3 << 6) | (4 << 2); /* Spec v4.3 with EXT_CSD */
  461. sd->csd[1] = (1 << 3) | 6; /* Asynchronous data access time: 1ms */
  462. sd->csd[2] = 0x00;
  463. sd->csd[3] = (1 << 3) | 3;; /* Maximum bus clock frequency: 100MHz */
  464. sd->csd[4] = 0x0f;
  465. if (size <= 2 * GiB) {
  466. /* use 1k blocks */
  467. uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1;
  468. sd->csd[5] = 0x5a;
  469. sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf);
  470. sd->csd[7] = (csize1k >> 2) & 0xff;
  471. } else { /* >= 2GB : size stored in ext CSD, block addressing */
  472. sd->csd[5] = 0x59;
  473. sd->csd[6] = 0x8f;
  474. sd->csd[7] = 0xff;
  475. sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
  476. }
  477. sd->csd[8] = 0xff;
  478. sd->csd[9] = 0xfc | /* Max. write current */
  479. ((CMULT_SHIFT - 2) >> 1);
  480. sd->csd[10] = 0x40 | /* Erase sector size */
  481. (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
  482. sd->csd[11] = 0x00 | /* Write protect group size */
  483. ((sectsize << 7) & 0x80) | wpsize;
  484. sd->csd[12] = 0x90 | /* Write speed factor */
  485. (hwblock_shift >> 2);
  486. sd->csd[13] = 0x20 | /* Max. write data block length */
  487. ((hwblock_shift << 6) & 0xc0);
  488. sd->csd[14] = 0x00;
  489. sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
  490. emmc_set_ext_csd(sd, size);
  491. }
  492. static void sd_set_csd(SDState *sd, uint64_t size)
  493. {
  494. int hwblock_shift = HWBLOCK_SHIFT;
  495. uint32_t csize;
  496. uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
  497. uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
  498. /* To indicate 2 GiB card, BLOCK_LEN shall be 1024 bytes */
  499. if (size == SDSC_MAX_CAPACITY) {
  500. hwblock_shift += 1;
  501. }
  502. csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1;
  503. if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */
  504. sd->csd[0] = 0x00; /* CSD structure */
  505. sd->csd[1] = 0x26; /* Data read access-time-1 */
  506. sd->csd[2] = 0x00; /* Data read access-time-2 */
  507. sd->csd[3] = 0x32; /* Max. data transfer rate: 25 MHz */
  508. sd->csd[4] = 0x5f; /* Card Command Classes */
  509. sd->csd[5] = 0x50 | /* Max. read data block length */
  510. hwblock_shift;
  511. sd->csd[6] = 0xe0 | /* Partial block for read allowed */
  512. ((csize >> 10) & 0x03);
  513. sd->csd[7] = 0x00 | /* Device size */
  514. ((csize >> 2) & 0xff);
  515. sd->csd[8] = 0x3f | /* Max. read current */
  516. ((csize << 6) & 0xc0);
  517. sd->csd[9] = 0xfc | /* Max. write current */
  518. ((CMULT_SHIFT - 2) >> 1);
  519. sd->csd[10] = 0x40 | /* Erase sector size */
  520. (((CMULT_SHIFT - 2) << 7) & 0x80) | (sectsize >> 1);
  521. sd->csd[11] = 0x00 | /* Write protect group size */
  522. ((sectsize << 7) & 0x80) | wpsize;
  523. sd->csd[12] = 0x90 | /* Write speed factor */
  524. (hwblock_shift >> 2);
  525. sd->csd[13] = 0x20 | /* Max. write data block length */
  526. ((hwblock_shift << 6) & 0xc0);
  527. sd->csd[14] = 0x00; /* File format group */
  528. } else { /* SDHC */
  529. size /= 512 * KiB;
  530. size -= 1;
  531. sd->csd[0] = 0x40;
  532. sd->csd[1] = 0x0e;
  533. sd->csd[2] = 0x00;
  534. sd->csd[3] = 0x32;
  535. sd->csd[4] = 0x5b;
  536. sd->csd[5] = 0x59;
  537. sd->csd[6] = 0x00;
  538. st24_be_p(&sd->csd[7], size);
  539. sd->csd[10] = 0x7f;
  540. sd->csd[11] = 0x80;
  541. sd->csd[12] = 0x0a;
  542. sd->csd[13] = 0x40;
  543. sd->csd[14] = 0x00;
  544. }
  545. sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1;
  546. }
  547. /* Relative Card Address register */
  548. static void sd_set_rca(SDState *sd, uint16_t value)
  549. {
  550. trace_sdcard_set_rca(value);
  551. sd->rca = value;
  552. }
  553. static uint16_t sd_req_get_rca(SDState *s, SDRequest req)
  554. {
  555. switch (s->proto->cmd[req.cmd].type) {
  556. case sd_ac:
  557. case sd_adtc:
  558. return req.arg >> 16;
  559. case sd_spi:
  560. default:
  561. g_assert_not_reached();
  562. }
  563. }
  564. static bool sd_req_rca_same(SDState *s, SDRequest req)
  565. {
  566. return sd_req_get_rca(s, req) == s->rca;
  567. }
  568. /* Card Status register */
  569. FIELD(CSR, AKE_SEQ_ERROR, 3, 1)
  570. FIELD(CSR, APP_CMD, 5, 1)
  571. FIELD(CSR, FX_EVENT, 6, 1)
  572. FIELD(CSR, SWITCH_ERROR, 7, 1)
  573. FIELD(CSR, READY_FOR_DATA, 8, 1)
  574. FIELD(CSR, CURRENT_STATE, 9, 4)
  575. FIELD(CSR, ERASE_RESET, 13, 1)
  576. FIELD(CSR, CARD_ECC_DISABLED, 14, 1)
  577. FIELD(CSR, WP_ERASE_SKIP, 15, 1)
  578. FIELD(CSR, CSD_OVERWRITE, 16, 1)
  579. FIELD(CSR, DEFERRED_RESPONSE, 17, 1)
  580. FIELD(CSR, ERROR, 19, 1)
  581. FIELD(CSR, CC_ERROR, 20, 1)
  582. FIELD(CSR, CARD_ECC_FAILED, 21, 1)
  583. FIELD(CSR, ILLEGAL_COMMAND, 22, 1)
  584. FIELD(CSR, COM_CRC_ERROR, 23, 1)
  585. FIELD(CSR, LOCK_UNLOCK_FAILED, 24, 1)
  586. FIELD(CSR, CARD_IS_LOCKED, 25, 1)
  587. FIELD(CSR, WP_VIOLATION, 26, 1)
  588. FIELD(CSR, ERASE_PARAM, 27, 1)
  589. FIELD(CSR, ERASE_SEQ_ERROR, 28, 1)
  590. FIELD(CSR, BLOCK_LEN_ERROR, 29, 1)
  591. FIELD(CSR, ADDRESS_ERROR, 30, 1)
  592. FIELD(CSR, OUT_OF_RANGE, 31, 1)
  593. /* Card status bits, split by clear condition:
  594. * A : According to the card current state
  595. * B : Always related to the previous command
  596. * C : Cleared by read
  597. */
  598. #define CARD_STATUS_A (R_CSR_READY_FOR_DATA_MASK \
  599. | R_CSR_CARD_ECC_DISABLED_MASK \
  600. | R_CSR_CARD_IS_LOCKED_MASK)
  601. #define CARD_STATUS_B (R_CSR_CURRENT_STATE_MASK \
  602. | R_CSR_ILLEGAL_COMMAND_MASK \
  603. | R_CSR_COM_CRC_ERROR_MASK)
  604. #define CARD_STATUS_C (R_CSR_AKE_SEQ_ERROR_MASK \
  605. | R_CSR_APP_CMD_MASK \
  606. | R_CSR_ERASE_RESET_MASK \
  607. | R_CSR_WP_ERASE_SKIP_MASK \
  608. | R_CSR_CSD_OVERWRITE_MASK \
  609. | R_CSR_ERROR_MASK \
  610. | R_CSR_CC_ERROR_MASK \
  611. | R_CSR_CARD_ECC_FAILED_MASK \
  612. | R_CSR_LOCK_UNLOCK_FAILED_MASK \
  613. | R_CSR_WP_VIOLATION_MASK \
  614. | R_CSR_ERASE_PARAM_MASK \
  615. | R_CSR_ERASE_SEQ_ERROR_MASK \
  616. | R_CSR_BLOCK_LEN_ERROR_MASK \
  617. | R_CSR_ADDRESS_ERROR_MASK \
  618. | R_CSR_OUT_OF_RANGE_MASK)
  619. static void sd_set_cardstatus(SDState *sd)
  620. {
  621. sd->card_status = READY_FOR_DATA;
  622. }
  623. static void sd_set_sdstatus(SDState *sd)
  624. {
  625. memset(sd->sd_status, 0, 64);
  626. }
  627. static const uint8_t sd_tuning_block_pattern4[64] = {
  628. /*
  629. * See: Physical Layer Simplified Specification Version 3.01,
  630. * Table 4-2.
  631. */
  632. 0xff, 0x0f, 0xff, 0x00, 0x0f, 0xfc, 0xc3, 0xcc,
  633. 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
  634. 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
  635. 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
  636. 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
  637. 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
  638. 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
  639. 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde
  640. };
  641. static int sd_req_crc_validate(SDRequest *req)
  642. {
  643. uint8_t buffer[5];
  644. buffer[0] = 0x40 | req->cmd;
  645. stl_be_p(&buffer[1], req->arg);
  646. return 0;
  647. return sd_crc7(buffer, 5) != req->crc; /* TODO */
  648. }
  649. static void sd_response_r1_make(SDState *sd, uint8_t *response)
  650. {
  651. stl_be_p(response, sd->card_status);
  652. /* Clear the "clear on read" status bits */
  653. sd->card_status &= ~CARD_STATUS_C;
  654. }
  655. static void sd_response_r3_make(SDState *sd, uint8_t *response)
  656. {
  657. stl_be_p(response, sd->ocr & ACMD41_R3_MASK);
  658. }
  659. static void sd_response_r6_make(SDState *sd, uint8_t *response)
  660. {
  661. uint16_t status;
  662. status = ((sd->card_status >> 8) & 0xc000) |
  663. ((sd->card_status >> 6) & 0x2000) |
  664. (sd->card_status & 0x1fff);
  665. sd->card_status &= ~(CARD_STATUS_C & 0xc81fff);
  666. stw_be_p(response + 0, sd->rca);
  667. stw_be_p(response + 2, status);
  668. }
  669. static void sd_response_r7_make(SDState *sd, uint8_t *response)
  670. {
  671. stl_be_p(response, sd->vhs);
  672. }
  673. static uint32_t sd_blk_len(SDState *sd)
  674. {
  675. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  676. return 1 << HWBLOCK_SHIFT;
  677. }
  678. return sd->blk_len;
  679. }
  680. /*
  681. * This requires a disk image that has two boot partitions inserted at the
  682. * beginning of it. The size of the boot partitions is the "boot-size"
  683. * property.
  684. */
  685. static uint32_t sd_bootpart_offset(SDState *sd)
  686. {
  687. unsigned partition_access;
  688. if (!sd->boot_part_size || !sd_is_emmc(sd)) {
  689. return 0;
  690. }
  691. partition_access = sd->ext_csd[EXT_CSD_PART_CONFIG]
  692. & EXT_CSD_PART_CONFIG_ACC_MASK;
  693. switch (partition_access) {
  694. case EXT_CSD_PART_CONFIG_ACC_DEFAULT:
  695. return sd->boot_part_size * 2;
  696. case EXT_CSD_PART_CONFIG_ACC_BOOT0:
  697. return 0;
  698. case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1:
  699. return sd->boot_part_size * 1;
  700. default:
  701. g_assert_not_reached();
  702. }
  703. }
  704. static uint64_t sd_req_get_address(SDState *sd, SDRequest req)
  705. {
  706. uint64_t addr;
  707. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  708. addr = (uint64_t) req.arg << HWBLOCK_SHIFT;
  709. } else {
  710. addr = req.arg;
  711. }
  712. trace_sdcard_req_addr(req.arg, addr);
  713. return addr;
  714. }
  715. static inline uint64_t sd_addr_to_wpnum(uint64_t addr)
  716. {
  717. return addr >> (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT);
  718. }
  719. static void sd_reset(DeviceState *dev)
  720. {
  721. SDState *sd = SDMMC_COMMON(dev);
  722. SDCardClass *sc = SDMMC_COMMON_GET_CLASS(sd);
  723. uint64_t size;
  724. uint64_t sect;
  725. trace_sdcard_reset();
  726. if (sd->blk) {
  727. blk_get_geometry(sd->blk, &sect);
  728. } else {
  729. sect = 0;
  730. }
  731. size = sect << HWBLOCK_SHIFT;
  732. if (sd_is_emmc(sd)) {
  733. size -= sd->boot_part_size * 2;
  734. }
  735. sect = sd_addr_to_wpnum(size) + 1;
  736. sd->state = sd_idle_state;
  737. /* card registers */
  738. sd->rca = sd_is_emmc(sd) ? 0x0001 : 0x0000;
  739. sd->size = size;
  740. sd_set_ocr(sd);
  741. sd_set_scr(sd);
  742. sc->set_cid(sd);
  743. sc->set_csd(sd, size);
  744. sd_set_cardstatus(sd);
  745. sd_set_sdstatus(sd);
  746. g_free(sd->wp_group_bmap);
  747. sd->wp_switch = sd->blk ? !blk_is_writable(sd->blk) : false;
  748. sd->wp_group_bits = sect;
  749. sd->wp_group_bmap = bitmap_new(sd->wp_group_bits);
  750. memset(sd->function_group, 0, sizeof(sd->function_group));
  751. sd->erase_start = INVALID_ADDRESS;
  752. sd->erase_end = INVALID_ADDRESS;
  753. sd->blk_len = 0x200;
  754. sd->pwd_len = 0;
  755. sd->expecting_acmd = false;
  756. sd->dat_lines = 0xf;
  757. sd->cmd_line = true;
  758. sd->multi_blk_cnt = 0;
  759. }
  760. static bool sd_get_inserted(SDState *sd)
  761. {
  762. return sd->blk && blk_is_inserted(sd->blk);
  763. }
  764. static bool sd_get_readonly(SDState *sd)
  765. {
  766. return sd->wp_switch;
  767. }
  768. static void sd_cardchange(void *opaque, bool load, Error **errp)
  769. {
  770. SDState *sd = opaque;
  771. DeviceState *dev = DEVICE(sd);
  772. SDBus *sdbus;
  773. bool inserted = sd_get_inserted(sd);
  774. bool readonly = sd_get_readonly(sd);
  775. if (inserted) {
  776. trace_sdcard_inserted(readonly);
  777. sd_reset(dev);
  778. } else {
  779. trace_sdcard_ejected();
  780. }
  781. sdbus = SD_BUS(qdev_get_parent_bus(dev));
  782. sdbus_set_inserted(sdbus, inserted);
  783. if (inserted) {
  784. sdbus_set_readonly(sdbus, readonly);
  785. }
  786. }
  787. static const BlockDevOps sd_block_ops = {
  788. .change_media_cb = sd_cardchange,
  789. };
  790. static bool sd_ocr_vmstate_needed(void *opaque)
  791. {
  792. SDState *sd = opaque;
  793. /* Include the OCR state (and timer) if it is not yet powered up */
  794. return !FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP);
  795. }
  796. static const VMStateDescription sd_ocr_vmstate = {
  797. .name = "sd-card/ocr-state",
  798. .version_id = 1,
  799. .minimum_version_id = 1,
  800. .needed = sd_ocr_vmstate_needed,
  801. .fields = (const VMStateField[]) {
  802. VMSTATE_UINT32(ocr, SDState),
  803. VMSTATE_TIMER_PTR(ocr_power_timer, SDState),
  804. VMSTATE_END_OF_LIST()
  805. },
  806. };
  807. static bool vmstate_needed_for_emmc(void *opaque)
  808. {
  809. SDState *sd = opaque;
  810. return sd_is_emmc(sd);
  811. }
  812. static const VMStateDescription emmc_extcsd_vmstate = {
  813. .name = "sd-card/ext_csd_modes-state",
  814. .version_id = 1,
  815. .minimum_version_id = 1,
  816. .needed = vmstate_needed_for_emmc,
  817. .fields = (const VMStateField[]) {
  818. VMSTATE_UINT8_ARRAY(ext_csd_rw, SDState, 192),
  819. VMSTATE_END_OF_LIST()
  820. },
  821. };
  822. static int sd_vmstate_pre_load(void *opaque)
  823. {
  824. SDState *sd = opaque;
  825. /* If the OCR state is not included (prior versions, or not
  826. * needed), then the OCR must be set as powered up. If the OCR state
  827. * is included, this will be replaced by the state restore.
  828. */
  829. sd_ocr_powerup(sd);
  830. return 0;
  831. }
  832. static const VMStateDescription sd_vmstate = {
  833. .name = "sd-card",
  834. .version_id = 2,
  835. .minimum_version_id = 2,
  836. .pre_load = sd_vmstate_pre_load,
  837. .fields = (const VMStateField[]) {
  838. VMSTATE_UINT32(mode, SDState),
  839. VMSTATE_INT32(state, SDState),
  840. VMSTATE_UINT8_ARRAY(cid, SDState, 16),
  841. VMSTATE_UINT8_ARRAY(csd, SDState, 16),
  842. VMSTATE_UINT16(rca, SDState),
  843. VMSTATE_UINT32(card_status, SDState),
  844. VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
  845. VMSTATE_UINT32(vhs, SDState),
  846. VMSTATE_BITMAP(wp_group_bmap, SDState, 0, wp_group_bits),
  847. VMSTATE_UINT32(blk_len, SDState),
  848. VMSTATE_UINT32(multi_blk_cnt, SDState),
  849. VMSTATE_UINT32(erase_start, SDState),
  850. VMSTATE_UINT32(erase_end, SDState),
  851. VMSTATE_UINT8_ARRAY(pwd, SDState, 16),
  852. VMSTATE_UINT32(pwd_len, SDState),
  853. VMSTATE_UINT8_ARRAY(function_group, SDState, 6),
  854. VMSTATE_UINT8(current_cmd, SDState),
  855. VMSTATE_BOOL(expecting_acmd, SDState),
  856. VMSTATE_UINT32(blk_written, SDState),
  857. VMSTATE_UINT64(data_start, SDState),
  858. VMSTATE_UINT32(data_offset, SDState),
  859. VMSTATE_UINT8_ARRAY(data, SDState, 512),
  860. VMSTATE_UNUSED_V(1, 512),
  861. VMSTATE_UNUSED(1),
  862. VMSTATE_END_OF_LIST()
  863. },
  864. .subsections = (const VMStateDescription * const []) {
  865. &sd_ocr_vmstate,
  866. &emmc_extcsd_vmstate,
  867. NULL
  868. },
  869. };
  870. static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len)
  871. {
  872. trace_sdcard_read_block(addr, len);
  873. addr += sd_bootpart_offset(sd);
  874. if (!sd->blk || blk_pread(sd->blk, addr, len, sd->data, 0) < 0) {
  875. fprintf(stderr, "sd_blk_read: read error on host side\n");
  876. }
  877. }
  878. static void sd_blk_write(SDState *sd, uint64_t addr, uint32_t len)
  879. {
  880. trace_sdcard_write_block(addr, len);
  881. addr += sd_bootpart_offset(sd);
  882. if (!sd->blk || blk_pwrite(sd->blk, addr, len, sd->data, 0) < 0) {
  883. fprintf(stderr, "sd_blk_write: write error on host side\n");
  884. }
  885. }
  886. static void sd_erase(SDState *sd)
  887. {
  888. uint64_t erase_start = sd->erase_start;
  889. uint64_t erase_end = sd->erase_end;
  890. bool sdsc = true;
  891. uint64_t wpnum;
  892. uint64_t erase_addr;
  893. int erase_len = 1 << HWBLOCK_SHIFT;
  894. trace_sdcard_erase(sd->erase_start, sd->erase_end);
  895. if (sd->erase_start == INVALID_ADDRESS
  896. || sd->erase_end == INVALID_ADDRESS) {
  897. sd->card_status |= ERASE_SEQ_ERROR;
  898. sd->erase_start = INVALID_ADDRESS;
  899. sd->erase_end = INVALID_ADDRESS;
  900. return;
  901. }
  902. if (FIELD_EX32(sd->ocr, OCR, CARD_CAPACITY)) {
  903. /* High capacity memory card: erase units are 512 byte blocks */
  904. erase_start <<= HWBLOCK_SHIFT;
  905. erase_end <<= HWBLOCK_SHIFT;
  906. sdsc = false;
  907. }
  908. if (erase_start > sd->size || erase_end > sd->size) {
  909. sd->card_status |= OUT_OF_RANGE;
  910. sd->erase_start = INVALID_ADDRESS;
  911. sd->erase_end = INVALID_ADDRESS;
  912. return;
  913. }
  914. sd->erase_start = INVALID_ADDRESS;
  915. sd->erase_end = INVALID_ADDRESS;
  916. sd->csd[14] |= 0x40;
  917. memset(sd->data, 0xff, erase_len);
  918. for (erase_addr = erase_start; erase_addr <= erase_end;
  919. erase_addr += erase_len) {
  920. if (sdsc) {
  921. /* Only SDSC cards support write protect groups */
  922. wpnum = sd_addr_to_wpnum(erase_addr);
  923. assert(wpnum < sd->wp_group_bits);
  924. if (test_bit(wpnum, sd->wp_group_bmap)) {
  925. sd->card_status |= WP_ERASE_SKIP;
  926. continue;
  927. }
  928. }
  929. sd_blk_write(sd, erase_addr, erase_len);
  930. }
  931. }
  932. static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
  933. {
  934. uint32_t i, wpnum;
  935. uint32_t ret = 0;
  936. wpnum = sd_addr_to_wpnum(addr);
  937. for (i = 0; i < 32; i++, wpnum++, addr += WPGROUP_SIZE) {
  938. if (addr >= sd->size) {
  939. /*
  940. * If the addresses of the last groups are outside the valid range,
  941. * then the corresponding write protection bits shall be set to 0.
  942. */
  943. continue;
  944. }
  945. assert(wpnum < sd->wp_group_bits);
  946. if (test_bit(wpnum, sd->wp_group_bmap)) {
  947. ret |= (1 << i);
  948. }
  949. }
  950. return ret;
  951. }
  952. enum ExtCsdAccessMode {
  953. EXT_CSD_ACCESS_MODE_COMMAND_SET = 0,
  954. EXT_CSD_ACCESS_MODE_SET_BITS = 1,
  955. EXT_CSD_ACCESS_MODE_CLEAR_BITS = 2,
  956. EXT_CSD_ACCESS_MODE_WRITE_BYTE = 3
  957. };
  958. static void emmc_function_switch(SDState *sd, uint32_t arg)
  959. {
  960. uint8_t access = extract32(arg, 24, 2);
  961. uint8_t index = extract32(arg, 16, 8);
  962. uint8_t value = extract32(arg, 8, 8);
  963. uint8_t b = sd->ext_csd[index];
  964. trace_sdcard_switch(access, index, value, extract32(arg, 0, 2));
  965. if (index >= 192) {
  966. qemu_log_mask(LOG_GUEST_ERROR, "MMC switching illegal offset\n");
  967. sd->card_status |= R_CSR_SWITCH_ERROR_MASK;
  968. return;
  969. }
  970. switch (access) {
  971. case EXT_CSD_ACCESS_MODE_COMMAND_SET:
  972. qemu_log_mask(LOG_UNIMP, "MMC Command set switching not supported\n");
  973. return;
  974. case EXT_CSD_ACCESS_MODE_SET_BITS:
  975. b |= value;
  976. break;
  977. case EXT_CSD_ACCESS_MODE_CLEAR_BITS:
  978. b &= ~value;
  979. break;
  980. case EXT_CSD_ACCESS_MODE_WRITE_BYTE:
  981. b = value;
  982. break;
  983. }
  984. trace_sdcard_ext_csd_update(index, sd->ext_csd[index], b);
  985. sd->ext_csd[index] = b;
  986. }
  987. static void sd_function_switch(SDState *sd, uint32_t arg)
  988. {
  989. int i, mode, new_func;
  990. mode = !!(arg & 0x80000000);
  991. sd->data[0] = 0x00; /* Maximum current consumption */
  992. sd->data[1] = 0x01;
  993. sd->data[2] = 0x80; /* Supported group 6 functions */
  994. sd->data[3] = 0x01;
  995. sd->data[4] = 0x80; /* Supported group 5 functions */
  996. sd->data[5] = 0x01;
  997. sd->data[6] = 0x80; /* Supported group 4 functions */
  998. sd->data[7] = 0x01;
  999. sd->data[8] = 0x80; /* Supported group 3 functions */
  1000. sd->data[9] = 0x01;
  1001. sd->data[10] = 0x80; /* Supported group 2 functions */
  1002. sd->data[11] = 0x43;
  1003. sd->data[12] = 0x80; /* Supported group 1 functions */
  1004. sd->data[13] = 0x03;
  1005. memset(&sd->data[14], 0, 3);
  1006. for (i = 0; i < 6; i ++) {
  1007. new_func = (arg >> (i * 4)) & 0x0f;
  1008. if (mode && new_func != 0x0f)
  1009. sd->function_group[i] = new_func;
  1010. sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
  1011. }
  1012. memset(&sd->data[17], 0, 47);
  1013. }
  1014. static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
  1015. {
  1016. return test_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  1017. }
  1018. static void sd_lock_command(SDState *sd)
  1019. {
  1020. int erase, lock, clr_pwd, set_pwd, pwd_len;
  1021. erase = !!(sd->data[0] & 0x08);
  1022. lock = sd->data[0] & 0x04;
  1023. clr_pwd = sd->data[0] & 0x02;
  1024. set_pwd = sd->data[0] & 0x01;
  1025. if (sd->blk_len > 1)
  1026. pwd_len = sd->data[1];
  1027. else
  1028. pwd_len = 0;
  1029. if (lock) {
  1030. trace_sdcard_lock();
  1031. } else {
  1032. trace_sdcard_unlock();
  1033. }
  1034. if (erase) {
  1035. if (!(sd->card_status & CARD_IS_LOCKED) || sd->blk_len > 1 ||
  1036. set_pwd || clr_pwd || lock || sd->wp_switch ||
  1037. (sd->csd[14] & 0x20)) {
  1038. sd->card_status |= LOCK_UNLOCK_FAILED;
  1039. return;
  1040. }
  1041. bitmap_zero(sd->wp_group_bmap, sd->wp_group_bits);
  1042. sd->csd[14] &= ~0x10;
  1043. sd->card_status &= ~CARD_IS_LOCKED;
  1044. sd->pwd_len = 0;
  1045. /* Erasing the entire card here! */
  1046. fprintf(stderr, "SD: Card force-erased by CMD42\n");
  1047. return;
  1048. }
  1049. if (sd->blk_len < 2 + pwd_len ||
  1050. pwd_len <= sd->pwd_len ||
  1051. pwd_len > sd->pwd_len + 16) {
  1052. sd->card_status |= LOCK_UNLOCK_FAILED;
  1053. return;
  1054. }
  1055. if (sd->pwd_len && memcmp(sd->pwd, sd->data + 2, sd->pwd_len)) {
  1056. sd->card_status |= LOCK_UNLOCK_FAILED;
  1057. return;
  1058. }
  1059. pwd_len -= sd->pwd_len;
  1060. if ((pwd_len && !set_pwd) ||
  1061. (clr_pwd && (set_pwd || lock)) ||
  1062. (lock && !sd->pwd_len && !set_pwd) ||
  1063. (!set_pwd && !clr_pwd &&
  1064. (((sd->card_status & CARD_IS_LOCKED) && lock) ||
  1065. (!(sd->card_status & CARD_IS_LOCKED) && !lock)))) {
  1066. sd->card_status |= LOCK_UNLOCK_FAILED;
  1067. return;
  1068. }
  1069. if (set_pwd) {
  1070. memcpy(sd->pwd, sd->data + 2 + sd->pwd_len, pwd_len);
  1071. sd->pwd_len = pwd_len;
  1072. }
  1073. if (clr_pwd) {
  1074. sd->pwd_len = 0;
  1075. }
  1076. if (lock)
  1077. sd->card_status |= CARD_IS_LOCKED;
  1078. else
  1079. sd->card_status &= ~CARD_IS_LOCKED;
  1080. }
  1081. static bool address_in_range(SDState *sd, const char *desc,
  1082. uint64_t addr, uint32_t length)
  1083. {
  1084. if (addr + length > sd->size) {
  1085. qemu_log_mask(LOG_GUEST_ERROR,
  1086. "%s offset %"PRIu64" > card %"PRIu64" [%%%u]\n",
  1087. desc, addr, sd->size, length);
  1088. sd->card_status |= ADDRESS_ERROR;
  1089. return false;
  1090. }
  1091. return true;
  1092. }
  1093. static sd_rsp_type_t sd_invalid_state_for_cmd(SDState *sd, SDRequest req)
  1094. {
  1095. qemu_log_mask(LOG_GUEST_ERROR, "%s: CMD%i in a wrong state: %s (spec %s)\n",
  1096. sd->proto->name, req.cmd, sd_state_name(sd->state),
  1097. sd_version_str(sd->spec_version));
  1098. return sd_illegal;
  1099. }
  1100. static sd_rsp_type_t sd_invalid_mode_for_cmd(SDState *sd, SDRequest req)
  1101. {
  1102. qemu_log_mask(LOG_GUEST_ERROR, "%s: CMD%i in a wrong mode: %s (spec %s)\n",
  1103. sd->proto->name, req.cmd, sd_mode_name(sd->mode),
  1104. sd_version_str(sd->spec_version));
  1105. return sd_illegal;
  1106. }
  1107. static sd_rsp_type_t sd_cmd_illegal(SDState *sd, SDRequest req)
  1108. {
  1109. qemu_log_mask(LOG_GUEST_ERROR, "%s: Unknown CMD%i for spec %s\n",
  1110. sd->proto->name, req.cmd,
  1111. sd_version_str(sd->spec_version));
  1112. return sd_illegal;
  1113. }
  1114. /* Commands that are recognised but not yet implemented. */
  1115. static sd_rsp_type_t sd_cmd_unimplemented(SDState *sd, SDRequest req)
  1116. {
  1117. qemu_log_mask(LOG_UNIMP, "%s: CMD%i not implemented\n",
  1118. sd->proto->name, req.cmd);
  1119. return sd_illegal;
  1120. }
  1121. static sd_rsp_type_t sd_cmd_optional(SDState *sd, SDRequest req)
  1122. {
  1123. qemu_log_mask(LOG_UNIMP, "%s: Optional CMD%i not implemented\n",
  1124. sd->proto->name, req.cmd);
  1125. return sd_illegal;
  1126. }
  1127. /* Configure fields for following sd_generic_write_byte() calls */
  1128. static sd_rsp_type_t sd_cmd_to_receivingdata(SDState *sd, SDRequest req,
  1129. uint64_t start, size_t size)
  1130. {
  1131. if (sd->state != sd_transfer_state) {
  1132. return sd_invalid_state_for_cmd(sd, req);
  1133. }
  1134. sd->state = sd_receivingdata_state;
  1135. sd->data_start = start;
  1136. sd->data_offset = 0;
  1137. /* sd->data[] used as receive buffer */
  1138. sd->data_size = size ?: sizeof(sd->data);
  1139. return sd_r1;
  1140. }
  1141. /* Configure fields for following sd_generic_read_byte() calls */
  1142. static sd_rsp_type_t sd_cmd_to_sendingdata(SDState *sd, SDRequest req,
  1143. uint64_t start,
  1144. const void *data, size_t size)
  1145. {
  1146. if (sd->state != sd_transfer_state) {
  1147. sd_invalid_state_for_cmd(sd, req);
  1148. }
  1149. sd->state = sd_sendingdata_state;
  1150. sd->data_start = start;
  1151. sd->data_offset = 0;
  1152. if (data) {
  1153. assert(size > 0 && size <= sizeof(sd->data));
  1154. memcpy(sd->data, data, size);
  1155. }
  1156. if (size) {
  1157. sd->data_size = size;
  1158. }
  1159. return sd_r1;
  1160. }
  1161. /* CMD0 */
  1162. static sd_rsp_type_t sd_cmd_GO_IDLE_STATE(SDState *sd, SDRequest req)
  1163. {
  1164. if (sd->state == sd_sleep_state) {
  1165. switch (req.arg) {
  1166. case 0x00000000:
  1167. case 0xf0f0f0f0:
  1168. break;
  1169. default:
  1170. return sd_r0;
  1171. }
  1172. }
  1173. if (sd->state != sd_inactive_state) {
  1174. sd->state = sd_idle_state;
  1175. sd_reset(DEVICE(sd));
  1176. }
  1177. return sd_is_spi(sd) ? sd_r1 : sd_r0;
  1178. }
  1179. /* CMD1 */
  1180. static sd_rsp_type_t spi_cmd_SEND_OP_COND(SDState *sd, SDRequest req)
  1181. {
  1182. sd->state = sd_transfer_state;
  1183. return sd_r1;
  1184. }
  1185. /* CMD2 */
  1186. static sd_rsp_type_t sd_cmd_ALL_SEND_CID(SDState *sd, SDRequest req)
  1187. {
  1188. switch (sd->state) {
  1189. case sd_ready_state:
  1190. sd->state = sd_identification_state;
  1191. return sd_r2_i;
  1192. default:
  1193. return sd_invalid_state_for_cmd(sd, req);
  1194. }
  1195. }
  1196. /* CMD3 */
  1197. static sd_rsp_type_t sd_cmd_SEND_RELATIVE_ADDR(SDState *sd, SDRequest req)
  1198. {
  1199. uint16_t random_rca;
  1200. switch (sd->state) {
  1201. case sd_identification_state:
  1202. case sd_standby_state:
  1203. sd->state = sd_standby_state;
  1204. qemu_guest_getrandom_nofail(&random_rca, sizeof(random_rca));
  1205. sd_set_rca(sd, random_rca);
  1206. return sd_r6;
  1207. default:
  1208. return sd_invalid_state_for_cmd(sd, req);
  1209. }
  1210. }
  1211. static sd_rsp_type_t emmc_cmd_SET_RELATIVE_ADDR(SDState *sd, SDRequest req)
  1212. {
  1213. switch (sd->state) {
  1214. case sd_identification_state:
  1215. case sd_standby_state:
  1216. sd->state = sd_standby_state;
  1217. sd_set_rca(sd, req.arg >> 16);
  1218. return sd_r1;
  1219. default:
  1220. return sd_invalid_state_for_cmd(sd, req);
  1221. }
  1222. }
  1223. /* CMD5 */
  1224. static sd_rsp_type_t emmc_cmd_sleep_awake(SDState *sd, SDRequest req)
  1225. {
  1226. bool do_sleep = extract32(req.arg, 15, 1);
  1227. switch (sd->state) {
  1228. case sd_sleep_state:
  1229. if (!do_sleep) {
  1230. /* Awake */
  1231. sd->state = sd_standby_state;
  1232. }
  1233. return sd_r1b;
  1234. case sd_standby_state:
  1235. if (do_sleep) {
  1236. sd->state = sd_sleep_state;
  1237. }
  1238. return sd_r1b;
  1239. default:
  1240. return sd_invalid_state_for_cmd(sd, req);
  1241. }
  1242. }
  1243. /* CMD6 */
  1244. static sd_rsp_type_t sd_cmd_SWITCH_FUNCTION(SDState *sd, SDRequest req)
  1245. {
  1246. if (sd->mode != sd_data_transfer_mode) {
  1247. return sd_invalid_mode_for_cmd(sd, req);
  1248. }
  1249. if (sd->state != sd_transfer_state) {
  1250. return sd_invalid_state_for_cmd(sd, req);
  1251. }
  1252. sd_function_switch(sd, req.arg);
  1253. return sd_cmd_to_sendingdata(sd, req, 0, NULL, 64);
  1254. }
  1255. static sd_rsp_type_t emmc_cmd_SWITCH(SDState *sd, SDRequest req)
  1256. {
  1257. switch (sd->state) {
  1258. case sd_transfer_state:
  1259. sd->state = sd_programming_state;
  1260. emmc_function_switch(sd, req.arg);
  1261. sd->state = sd_transfer_state;
  1262. return sd_r1b;
  1263. default:
  1264. return sd_invalid_state_for_cmd(sd, req);
  1265. }
  1266. }
  1267. /* CMD7 */
  1268. static sd_rsp_type_t sd_cmd_DE_SELECT_CARD(SDState *sd, SDRequest req)
  1269. {
  1270. bool same_rca = sd_req_rca_same(sd, req);
  1271. switch (sd->state) {
  1272. case sd_standby_state:
  1273. if (!same_rca) {
  1274. return sd_r0;
  1275. }
  1276. sd->state = sd_transfer_state;
  1277. return sd_r1b;
  1278. case sd_transfer_state:
  1279. case sd_sendingdata_state:
  1280. if (same_rca) {
  1281. break;
  1282. }
  1283. sd->state = sd_standby_state;
  1284. return sd_r1b;
  1285. case sd_disconnect_state:
  1286. if (!same_rca) {
  1287. return sd_r0;
  1288. }
  1289. sd->state = sd_programming_state;
  1290. return sd_r1b;
  1291. case sd_programming_state:
  1292. if (same_rca) {
  1293. break;
  1294. }
  1295. sd->state = sd_disconnect_state;
  1296. return sd_r1b;
  1297. default:
  1298. break;
  1299. }
  1300. return sd_invalid_state_for_cmd(sd, req);
  1301. }
  1302. /* CMD8 */
  1303. static sd_rsp_type_t sd_cmd_SEND_IF_COND(SDState *sd, SDRequest req)
  1304. {
  1305. if (sd->spec_version < SD_PHY_SPECv2_00_VERS) {
  1306. return sd_cmd_illegal(sd, req);
  1307. }
  1308. if (sd->state != sd_idle_state) {
  1309. return sd_invalid_state_for_cmd(sd, req);
  1310. }
  1311. sd->vhs = 0;
  1312. /* No response if not exactly one VHS bit is set. */
  1313. if (!(req.arg >> 8) || (req.arg >> (ctz32(req.arg & ~0xff) + 1))) {
  1314. return sd_is_spi(sd) ? sd_r7 : sd_r0;
  1315. }
  1316. /* Accept. */
  1317. sd->vhs = req.arg;
  1318. return sd_r7;
  1319. }
  1320. /* CMD8 */
  1321. static sd_rsp_type_t emmc_cmd_SEND_EXT_CSD(SDState *sd, SDRequest req)
  1322. {
  1323. if (sd->state != sd_transfer_state) {
  1324. return sd_invalid_state_for_cmd(sd, req);
  1325. }
  1326. return sd_cmd_to_sendingdata(sd, req, sd_req_get_address(sd, req),
  1327. sd->ext_csd, sizeof(sd->ext_csd));
  1328. }
  1329. /* CMD9 */
  1330. static sd_rsp_type_t spi_cmd_SEND_CSD(SDState *sd, SDRequest req)
  1331. {
  1332. if (sd->state != sd_standby_state) {
  1333. return sd_invalid_state_for_cmd(sd, req);
  1334. }
  1335. return sd_cmd_to_sendingdata(sd, req, sd_req_get_address(sd, req),
  1336. sd->csd, 16);
  1337. }
  1338. static sd_rsp_type_t sd_cmd_SEND_CSD(SDState *sd, SDRequest req)
  1339. {
  1340. if (sd->state != sd_standby_state) {
  1341. return sd_invalid_state_for_cmd(sd, req);
  1342. }
  1343. return sd_req_rca_same(sd, req) ? sd_r2_s : sd_r0;
  1344. }
  1345. /* CMD10 */
  1346. static sd_rsp_type_t spi_cmd_SEND_CID(SDState *sd, SDRequest req)
  1347. {
  1348. if (sd->state != sd_standby_state) {
  1349. return sd_invalid_state_for_cmd(sd, req);
  1350. }
  1351. return sd_cmd_to_sendingdata(sd, req, sd_req_get_address(sd, req),
  1352. sd->cid, 16);
  1353. }
  1354. static sd_rsp_type_t sd_cmd_SEND_CID(SDState *sd, SDRequest req)
  1355. {
  1356. if (sd->state != sd_standby_state) {
  1357. return sd_invalid_state_for_cmd(sd, req);
  1358. }
  1359. return sd_req_rca_same(sd, req) ? sd_r2_i : sd_r0;
  1360. }
  1361. /* CMD12 */
  1362. static sd_rsp_type_t sd_cmd_STOP_TRANSMISSION(SDState *sd, SDRequest req)
  1363. {
  1364. switch (sd->state) {
  1365. case sd_sendingdata_state:
  1366. sd->state = sd_transfer_state;
  1367. return sd_r1b;
  1368. case sd_receivingdata_state:
  1369. sd->state = sd_programming_state;
  1370. /* Bzzzzzzztt .... Operation complete. */
  1371. sd->state = sd_transfer_state;
  1372. return sd_r1;
  1373. default:
  1374. return sd_invalid_state_for_cmd(sd, req);
  1375. }
  1376. }
  1377. /* CMD13 */
  1378. static sd_rsp_type_t sd_cmd_SEND_STATUS(SDState *sd, SDRequest req)
  1379. {
  1380. if (sd->mode != sd_data_transfer_mode) {
  1381. return sd_invalid_mode_for_cmd(sd, req);
  1382. }
  1383. switch (sd->state) {
  1384. case sd_standby_state:
  1385. case sd_transfer_state:
  1386. case sd_sendingdata_state:
  1387. case sd_receivingdata_state:
  1388. case sd_programming_state:
  1389. case sd_disconnect_state:
  1390. break;
  1391. default:
  1392. return sd_invalid_state_for_cmd(sd, req);
  1393. }
  1394. if (sd_is_spi(sd)) {
  1395. return sd_r2_s;
  1396. }
  1397. return sd_req_rca_same(sd, req) ? sd_r1 : sd_r0;
  1398. }
  1399. /* CMD15 */
  1400. static sd_rsp_type_t sd_cmd_GO_INACTIVE_STATE(SDState *sd, SDRequest req)
  1401. {
  1402. if (sd->mode != sd_data_transfer_mode) {
  1403. return sd_invalid_mode_for_cmd(sd, req);
  1404. }
  1405. switch (sd->state) {
  1406. case sd_standby_state:
  1407. case sd_transfer_state:
  1408. case sd_sendingdata_state:
  1409. case sd_receivingdata_state:
  1410. case sd_programming_state:
  1411. case sd_disconnect_state:
  1412. break;
  1413. default:
  1414. return sd_invalid_state_for_cmd(sd, req);
  1415. }
  1416. if (sd_req_rca_same(sd, req)) {
  1417. sd->state = sd_inactive_state;
  1418. }
  1419. return sd_r0;
  1420. }
  1421. /* CMD16 */
  1422. static sd_rsp_type_t sd_cmd_SET_BLOCKLEN(SDState *sd, SDRequest req)
  1423. {
  1424. if (sd->state != sd_transfer_state) {
  1425. return sd_invalid_state_for_cmd(sd, req);
  1426. }
  1427. if (req.arg > (1 << HWBLOCK_SHIFT)) {
  1428. sd->card_status |= BLOCK_LEN_ERROR;
  1429. } else {
  1430. trace_sdcard_set_blocklen(req.arg);
  1431. sd->blk_len = req.arg;
  1432. }
  1433. return sd_r1;
  1434. }
  1435. /* CMD17 */
  1436. static sd_rsp_type_t sd_cmd_READ_SINGLE_BLOCK(SDState *sd, SDRequest req)
  1437. {
  1438. uint64_t addr;
  1439. if (sd->state != sd_transfer_state) {
  1440. return sd_invalid_state_for_cmd(sd, req);
  1441. }
  1442. addr = sd_req_get_address(sd, req);
  1443. if (!address_in_range(sd, "READ_SINGLE_BLOCK", addr, sd->blk_len)) {
  1444. return sd_r1;
  1445. }
  1446. sd_blk_read(sd, addr, sd->blk_len);
  1447. return sd_cmd_to_sendingdata(sd, req, addr, NULL, sd->blk_len);
  1448. }
  1449. /* CMD19 */
  1450. static sd_rsp_type_t sd_cmd_SEND_TUNING_BLOCK(SDState *sd, SDRequest req)
  1451. {
  1452. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1453. return sd_cmd_illegal(sd, req);
  1454. }
  1455. return sd_cmd_to_sendingdata(sd, req, 0,
  1456. sd_tuning_block_pattern4,
  1457. sizeof(sd_tuning_block_pattern4));
  1458. }
  1459. /* CMD23 */
  1460. static sd_rsp_type_t sd_cmd_SET_BLOCK_COUNT(SDState *sd, SDRequest req)
  1461. {
  1462. if (sd->spec_version < SD_PHY_SPECv3_01_VERS) {
  1463. return sd_cmd_illegal(sd, req);
  1464. }
  1465. if (sd->state != sd_transfer_state) {
  1466. return sd_invalid_state_for_cmd(sd, req);
  1467. }
  1468. sd->multi_blk_cnt = req.arg;
  1469. if (sd_is_emmc(sd)) {
  1470. sd->multi_blk_cnt &= 0xffff;
  1471. }
  1472. trace_sdcard_set_block_count(sd->multi_blk_cnt);
  1473. return sd_r1;
  1474. }
  1475. /* CMD24 */
  1476. static sd_rsp_type_t sd_cmd_WRITE_SINGLE_BLOCK(SDState *sd, SDRequest req)
  1477. {
  1478. uint64_t addr;
  1479. if (sd->state != sd_transfer_state) {
  1480. return sd_invalid_state_for_cmd(sd, req);
  1481. }
  1482. addr = sd_req_get_address(sd, req);
  1483. if (!address_in_range(sd, "WRITE_SINGLE_BLOCK", addr, sd->blk_len)) {
  1484. return sd_r1;
  1485. }
  1486. if (sd->size <= SDSC_MAX_CAPACITY) {
  1487. if (sd_wp_addr(sd, addr)) {
  1488. sd->card_status |= WP_VIOLATION;
  1489. }
  1490. }
  1491. if (sd->csd[14] & 0x30) {
  1492. sd->card_status |= WP_VIOLATION;
  1493. }
  1494. sd->blk_written = 0;
  1495. return sd_cmd_to_receivingdata(sd, req, addr, sd->blk_len);
  1496. }
  1497. /* CMD26 */
  1498. static sd_rsp_type_t emmc_cmd_PROGRAM_CID(SDState *sd, SDRequest req)
  1499. {
  1500. return sd_cmd_to_receivingdata(sd, req, 0, sizeof(sd->cid));
  1501. }
  1502. /* CMD27 */
  1503. static sd_rsp_type_t sd_cmd_PROGRAM_CSD(SDState *sd, SDRequest req)
  1504. {
  1505. return sd_cmd_to_receivingdata(sd, req, 0, sizeof(sd->csd));
  1506. }
  1507. static sd_rsp_type_t sd_cmd_SET_CLR_WRITE_PROT(SDState *sd, SDRequest req,
  1508. bool is_write)
  1509. {
  1510. uint64_t addr;
  1511. if (sd->size > SDSC_MAX_CAPACITY) {
  1512. return sd_illegal;
  1513. }
  1514. if (sd->state != sd_transfer_state) {
  1515. return sd_invalid_state_for_cmd(sd, req);
  1516. }
  1517. addr = sd_req_get_address(sd, req);
  1518. if (!address_in_range(sd, is_write ? "SET_WRITE_PROT" : "CLR_WRITE_PROT",
  1519. addr, 1)) {
  1520. return sd_r1b;
  1521. }
  1522. sd->state = sd_programming_state;
  1523. if (is_write) {
  1524. set_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  1525. } else {
  1526. clear_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
  1527. }
  1528. /* Bzzzzzzztt .... Operation complete. */
  1529. sd->state = sd_transfer_state;
  1530. return sd_r1;
  1531. }
  1532. /* CMD28 */
  1533. static sd_rsp_type_t sd_cmd_SET_WRITE_PROT(SDState *sd, SDRequest req)
  1534. {
  1535. return sd_cmd_SET_CLR_WRITE_PROT(sd, req, true);
  1536. }
  1537. /* CMD29 */
  1538. static sd_rsp_type_t sd_cmd_CLR_WRITE_PROT(SDState *sd, SDRequest req)
  1539. {
  1540. return sd_cmd_SET_CLR_WRITE_PROT(sd, req, false);
  1541. }
  1542. /* CMD30 */
  1543. static sd_rsp_type_t sd_cmd_SEND_WRITE_PROT(SDState *sd, SDRequest req)
  1544. {
  1545. uint64_t addr;
  1546. uint32_t data;
  1547. if (sd->size > SDSC_MAX_CAPACITY) {
  1548. return sd_illegal;
  1549. }
  1550. if (sd->state != sd_transfer_state) {
  1551. return sd_invalid_state_for_cmd(sd, req);
  1552. }
  1553. addr = sd_req_get_address(sd, req);
  1554. if (!address_in_range(sd, "SEND_WRITE_PROT", addr, sd->blk_len)) {
  1555. return sd_r1;
  1556. }
  1557. data = sd_wpbits(sd, req.arg);
  1558. return sd_cmd_to_sendingdata(sd, req, addr, &data, sizeof(data));
  1559. }
  1560. /* CMD32 */
  1561. static sd_rsp_type_t sd_cmd_ERASE_WR_BLK_START(SDState *sd, SDRequest req)
  1562. {
  1563. if (sd->state != sd_transfer_state) {
  1564. return sd_invalid_state_for_cmd(sd, req);
  1565. }
  1566. sd->erase_start = req.arg;
  1567. return sd_r1;
  1568. }
  1569. /* CMD33 */
  1570. static sd_rsp_type_t sd_cmd_ERASE_WR_BLK_END(SDState *sd, SDRequest req)
  1571. {
  1572. if (sd->state != sd_transfer_state) {
  1573. return sd_invalid_state_for_cmd(sd, req);
  1574. }
  1575. sd->erase_end = req.arg;
  1576. return sd_r1;
  1577. }
  1578. /* CMD38 */
  1579. static sd_rsp_type_t sd_cmd_ERASE(SDState *sd, SDRequest req)
  1580. {
  1581. if (sd->state != sd_transfer_state) {
  1582. return sd_invalid_state_for_cmd(sd, req);
  1583. }
  1584. if (sd->csd[14] & 0x30) {
  1585. sd->card_status |= WP_VIOLATION;
  1586. return sd_r1b;
  1587. }
  1588. sd->state = sd_programming_state;
  1589. sd_erase(sd);
  1590. /* Bzzzzzzztt .... Operation complete. */
  1591. sd->state = sd_transfer_state;
  1592. return sd_r1b;
  1593. }
  1594. /* CMD42 */
  1595. static sd_rsp_type_t sd_cmd_LOCK_UNLOCK(SDState *sd, SDRequest req)
  1596. {
  1597. return sd_cmd_to_receivingdata(sd, req, 0, 0);
  1598. }
  1599. /* CMD55 */
  1600. static sd_rsp_type_t sd_cmd_APP_CMD(SDState *sd, SDRequest req)
  1601. {
  1602. switch (sd->state) {
  1603. case sd_ready_state:
  1604. case sd_identification_state:
  1605. case sd_inactive_state:
  1606. case sd_sleep_state:
  1607. return sd_invalid_state_for_cmd(sd, req);
  1608. case sd_idle_state:
  1609. if (!sd_is_spi(sd) && sd_req_get_rca(sd, req) != 0x0000) {
  1610. qemu_log_mask(LOG_GUEST_ERROR,
  1611. "SD: illegal RCA 0x%04x for APP_CMD\n", req.cmd);
  1612. }
  1613. /* fall-through */
  1614. default:
  1615. break;
  1616. }
  1617. if (!sd_is_spi(sd) && !sd_req_rca_same(sd, req)) {
  1618. return sd_r0;
  1619. }
  1620. sd->expecting_acmd = true;
  1621. sd->card_status |= APP_CMD;
  1622. return sd_r1;
  1623. }
  1624. /* CMD56 */
  1625. static sd_rsp_type_t sd_cmd_GEN_CMD(SDState *sd, SDRequest req)
  1626. {
  1627. if (sd->state != sd_transfer_state) {
  1628. return sd_invalid_state_for_cmd(sd, req);
  1629. }
  1630. /* Vendor specific command: our model is RAZ/WI */
  1631. if (req.arg & 1) {
  1632. memset(sd->data, 0, sizeof(sd->data));
  1633. return sd_cmd_to_sendingdata(sd, req, 0, NULL, 0);
  1634. } else {
  1635. return sd_cmd_to_receivingdata(sd, req, 0, 0);
  1636. }
  1637. }
  1638. /* CMD58 */
  1639. static sd_rsp_type_t spi_cmd_READ_OCR(SDState *sd, SDRequest req)
  1640. {
  1641. return sd_r3;
  1642. }
  1643. /* CMD59 */
  1644. static sd_rsp_type_t spi_cmd_CRC_ON_OFF(SDState *sd, SDRequest req)
  1645. {
  1646. return sd_r1;
  1647. }
  1648. /* ACMD6 */
  1649. static sd_rsp_type_t sd_acmd_SET_BUS_WIDTH(SDState *sd, SDRequest req)
  1650. {
  1651. if (sd->state != sd_transfer_state) {
  1652. return sd_invalid_state_for_cmd(sd, req);
  1653. }
  1654. sd->sd_status[0] &= 0x3f;
  1655. sd->sd_status[0] |= (req.arg & 0x03) << 6;
  1656. return sd_r1;
  1657. }
  1658. /* ACMD13 */
  1659. static sd_rsp_type_t sd_acmd_SD_STATUS(SDState *sd, SDRequest req)
  1660. {
  1661. return sd_cmd_to_sendingdata(sd, req, 0,
  1662. sd->sd_status, sizeof(sd->sd_status));
  1663. }
  1664. /* ACMD22 */
  1665. static sd_rsp_type_t sd_acmd_SEND_NUM_WR_BLOCKS(SDState *sd, SDRequest req)
  1666. {
  1667. return sd_cmd_to_sendingdata(sd, req, 0,
  1668. &sd->blk_written, sizeof(sd->blk_written));
  1669. }
  1670. /* ACMD23 */
  1671. static sd_rsp_type_t sd_acmd_SET_WR_BLK_ERASE_COUNT(SDState *sd, SDRequest req)
  1672. {
  1673. if (sd->state != sd_transfer_state) {
  1674. return sd_invalid_state_for_cmd(sd, req);
  1675. }
  1676. return sd_r1;
  1677. }
  1678. /* ACMD41 */
  1679. static sd_rsp_type_t sd_cmd_SEND_OP_COND(SDState *sd, SDRequest req)
  1680. {
  1681. if (sd->state != sd_idle_state) {
  1682. return sd_invalid_state_for_cmd(sd, req);
  1683. }
  1684. /*
  1685. * If it's the first ACMD41 since reset, we need to decide
  1686. * whether to power up. If this is not an enquiry ACMD41,
  1687. * we immediately report power on and proceed below to the
  1688. * ready state, but if it is, we set a timer to model a
  1689. * delay for power up. This works around a bug in EDK2
  1690. * UEFI, which sends an initial enquiry ACMD41, but
  1691. * assumes that the card is in ready state as soon as it
  1692. * sees the power up bit set.
  1693. */
  1694. if (!FIELD_EX32(sd->ocr, OCR, CARD_POWER_UP)) {
  1695. if ((req.arg & ACMD41_ENQUIRY_MASK) != 0) {
  1696. timer_del(sd->ocr_power_timer);
  1697. sd_ocr_powerup(sd);
  1698. } else {
  1699. trace_sdcard_inquiry_cmd41();
  1700. if (!timer_pending(sd->ocr_power_timer)) {
  1701. timer_mod_ns(sd->ocr_power_timer,
  1702. (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  1703. + OCR_POWER_DELAY_NS));
  1704. }
  1705. }
  1706. }
  1707. if (FIELD_EX32(sd->ocr & req.arg, OCR, VDD_VOLTAGE_WINDOW)) {
  1708. /*
  1709. * We accept any voltage. 10000 V is nothing.
  1710. *
  1711. * Once we're powered up, we advance straight to ready state
  1712. * unless it's an enquiry ACMD41 (bits 23:0 == 0).
  1713. */
  1714. sd->state = sd_ready_state;
  1715. }
  1716. return sd_r3;
  1717. }
  1718. /* ACMD42 */
  1719. static sd_rsp_type_t sd_acmd_SET_CLR_CARD_DETECT(SDState *sd, SDRequest req)
  1720. {
  1721. if (sd->state != sd_transfer_state) {
  1722. return sd_invalid_state_for_cmd(sd, req);
  1723. }
  1724. /* Bringing in the 50KOhm pull-up resistor... Done. */
  1725. return sd_r1;
  1726. }
  1727. /* ACMD51 */
  1728. static sd_rsp_type_t sd_acmd_SEND_SCR(SDState *sd, SDRequest req)
  1729. {
  1730. return sd_cmd_to_sendingdata(sd, req, 0, sd->scr, sizeof(sd->scr));
  1731. }
  1732. static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
  1733. {
  1734. uint64_t addr;
  1735. sd->last_cmd_name = sd_cmd_name(sd, req.cmd);
  1736. /* CMD55 precedes an ACMD, so we are not interested in tracing it.
  1737. * However there is no ACMD55, so we want to trace this particular case.
  1738. */
  1739. if (req.cmd != 55 || sd->expecting_acmd) {
  1740. trace_sdcard_normal_command(sd->proto->name,
  1741. sd->last_cmd_name, req.cmd,
  1742. req.arg, sd_state_name(sd->state));
  1743. }
  1744. /* Not interpreting this as an app command */
  1745. sd->card_status &= ~APP_CMD;
  1746. /* CMD23 (set block count) must be immediately followed by CMD18 or CMD25
  1747. * if not, its effects are cancelled */
  1748. if (sd->multi_blk_cnt != 0 && !(req.cmd == 18 || req.cmd == 25)) {
  1749. sd->multi_blk_cnt = 0;
  1750. }
  1751. if (sd->proto->cmd[req.cmd].class == 6 && FIELD_EX32(sd->ocr, OCR,
  1752. CARD_CAPACITY)) {
  1753. /* Only Standard Capacity cards support class 6 commands */
  1754. return sd_illegal;
  1755. }
  1756. if (sd->proto->cmd[req.cmd].handler) {
  1757. return sd->proto->cmd[req.cmd].handler(sd, req);
  1758. }
  1759. switch (req.cmd) {
  1760. /* Block read commands (Class 2) */
  1761. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  1762. addr = sd_req_get_address(sd, req);
  1763. switch (sd->state) {
  1764. case sd_transfer_state:
  1765. if (!address_in_range(sd, "READ_BLOCK", addr, sd->blk_len)) {
  1766. return sd_r1;
  1767. }
  1768. sd->state = sd_sendingdata_state;
  1769. sd->data_start = addr;
  1770. sd->data_offset = 0;
  1771. return sd_r1;
  1772. default:
  1773. break;
  1774. }
  1775. break;
  1776. /* Block write commands (Class 4) */
  1777. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  1778. addr = sd_req_get_address(sd, req);
  1779. switch (sd->state) {
  1780. case sd_transfer_state:
  1781. if (!address_in_range(sd, "WRITE_BLOCK", addr, sd->blk_len)) {
  1782. return sd_r1;
  1783. }
  1784. sd->state = sd_receivingdata_state;
  1785. sd->data_start = addr;
  1786. sd->data_offset = 0;
  1787. sd->blk_written = 0;
  1788. if (sd->size <= SDSC_MAX_CAPACITY) {
  1789. if (sd_wp_addr(sd, sd->data_start)) {
  1790. sd->card_status |= WP_VIOLATION;
  1791. }
  1792. }
  1793. if (sd->csd[14] & 0x30) {
  1794. sd->card_status |= WP_VIOLATION;
  1795. }
  1796. return sd_r1;
  1797. default:
  1798. break;
  1799. }
  1800. break;
  1801. default:
  1802. qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
  1803. return sd_illegal;
  1804. }
  1805. return sd_invalid_state_for_cmd(sd, req);
  1806. }
  1807. static sd_rsp_type_t sd_app_command(SDState *sd,
  1808. SDRequest req)
  1809. {
  1810. sd->last_cmd_name = sd_acmd_name(sd, req.cmd);
  1811. trace_sdcard_app_command(sd->proto->name, sd->last_cmd_name,
  1812. req.cmd, req.arg, sd_state_name(sd->state));
  1813. sd->card_status |= APP_CMD;
  1814. if (sd->proto->acmd[req.cmd].handler) {
  1815. return sd->proto->acmd[req.cmd].handler(sd, req);
  1816. }
  1817. switch (req.cmd) {
  1818. case 18: /* Reserved for SD security applications */
  1819. case 25:
  1820. case 26:
  1821. case 38:
  1822. case 43 ... 49:
  1823. /* Refer to the "SD Specifications Part3 Security Specification" for
  1824. * information about the SD Security Features.
  1825. */
  1826. qemu_log_mask(LOG_UNIMP, "SD: CMD%i Security not implemented\n",
  1827. req.cmd);
  1828. return sd_illegal;
  1829. default:
  1830. /* Fall back to standard commands. */
  1831. return sd_normal_command(sd, req);
  1832. }
  1833. qemu_log_mask(LOG_GUEST_ERROR, "SD: ACMD%i in a wrong state\n", req.cmd);
  1834. return sd_illegal;
  1835. }
  1836. static bool cmd_valid_while_locked(SDState *sd, unsigned cmd)
  1837. {
  1838. unsigned cmd_class;
  1839. /* Valid commands in locked state:
  1840. * basic class (0)
  1841. * lock card class (7)
  1842. * CMD16
  1843. * implicitly, the ACMD prefix CMD55
  1844. * ACMD41 and ACMD42
  1845. * Anything else provokes an "illegal command" response.
  1846. */
  1847. if (sd->expecting_acmd) {
  1848. return cmd == 41 || cmd == 42;
  1849. }
  1850. if (cmd == 16 || cmd == 55) {
  1851. return true;
  1852. }
  1853. if (!sd->proto->cmd[cmd].handler) {
  1854. return false;
  1855. }
  1856. cmd_class = sd->proto->cmd[cmd].class;
  1857. return cmd_class == 0 || cmd_class == 7;
  1858. }
  1859. static int sd_do_command(SDState *sd, SDRequest *req,
  1860. uint8_t *response) {
  1861. int last_state;
  1862. sd_rsp_type_t rtype;
  1863. int rsplen;
  1864. if (!sd->blk || !blk_is_inserted(sd->blk)) {
  1865. return 0;
  1866. }
  1867. if (sd->state == sd_inactive_state) {
  1868. rtype = sd_illegal;
  1869. goto send_response;
  1870. }
  1871. if (sd_req_crc_validate(req)) {
  1872. sd->card_status |= COM_CRC_ERROR;
  1873. rtype = sd_illegal;
  1874. goto send_response;
  1875. }
  1876. if (req->cmd >= SDMMC_CMD_MAX) {
  1877. qemu_log_mask(LOG_GUEST_ERROR, "SD: incorrect command 0x%02x\n",
  1878. req->cmd);
  1879. req->cmd &= 0x3f;
  1880. }
  1881. if (sd->state == sd_sleep_state && req->cmd) {
  1882. qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is sleeping\n");
  1883. rtype = sd_r0;
  1884. goto send_response;
  1885. }
  1886. if (sd->card_status & CARD_IS_LOCKED) {
  1887. if (!cmd_valid_while_locked(sd, req->cmd)) {
  1888. sd->card_status |= ILLEGAL_COMMAND;
  1889. sd->expecting_acmd = false;
  1890. qemu_log_mask(LOG_GUEST_ERROR, "SD: Card is locked\n");
  1891. rtype = sd_illegal;
  1892. goto send_response;
  1893. }
  1894. }
  1895. last_state = sd->state;
  1896. sd_set_mode(sd);
  1897. if (sd->expecting_acmd) {
  1898. sd->expecting_acmd = false;
  1899. rtype = sd_app_command(sd, *req);
  1900. } else {
  1901. rtype = sd_normal_command(sd, *req);
  1902. }
  1903. if (rtype == sd_illegal) {
  1904. sd->card_status |= ILLEGAL_COMMAND;
  1905. } else {
  1906. /* Valid command, we can update the 'state before command' bits.
  1907. * (Do this now so they appear in r1 responses.)
  1908. */
  1909. sd->card_status = FIELD_DP32(sd->card_status, CSR,
  1910. CURRENT_STATE, last_state);
  1911. }
  1912. send_response:
  1913. switch (rtype) {
  1914. case sd_r1:
  1915. case sd_r1b:
  1916. sd_response_r1_make(sd, response);
  1917. rsplen = 4;
  1918. break;
  1919. case sd_r2_i:
  1920. memcpy(response, sd->cid, sizeof(sd->cid));
  1921. rsplen = 16;
  1922. break;
  1923. case sd_r2_s:
  1924. memcpy(response, sd->csd, sizeof(sd->csd));
  1925. rsplen = 16;
  1926. break;
  1927. case sd_r3:
  1928. sd_response_r3_make(sd, response);
  1929. rsplen = 4;
  1930. break;
  1931. case sd_r6:
  1932. sd_response_r6_make(sd, response);
  1933. rsplen = 4;
  1934. break;
  1935. case sd_r7:
  1936. sd_response_r7_make(sd, response);
  1937. rsplen = 4;
  1938. break;
  1939. case sd_r0:
  1940. /*
  1941. * Invalid state transition, reset implementation
  1942. * fields to avoid OOB abuse.
  1943. */
  1944. sd->data_start = 0;
  1945. sd->data_offset = 0;
  1946. /* fall-through */
  1947. case sd_illegal:
  1948. rsplen = 0;
  1949. break;
  1950. default:
  1951. g_assert_not_reached();
  1952. }
  1953. trace_sdcard_response(sd_response_name(rtype), rsplen);
  1954. if (rtype != sd_illegal) {
  1955. /* Clear the "clear on valid command" status bits now we've
  1956. * sent any response
  1957. */
  1958. sd->card_status &= ~CARD_STATUS_B;
  1959. }
  1960. #ifdef DEBUG_SD
  1961. qemu_hexdump(stderr, "Response", response, rsplen);
  1962. #endif
  1963. sd->current_cmd = rtype == sd_illegal ? 0 : req->cmd;
  1964. return rsplen;
  1965. }
  1966. /* Return true if buffer is consumed. Configured by sd_cmd_to_receivingdata() */
  1967. static bool sd_generic_write_byte(SDState *sd, uint8_t value)
  1968. {
  1969. sd->data[sd->data_offset] = value;
  1970. if (++sd->data_offset >= sd->data_size) {
  1971. sd->state = sd_transfer_state;
  1972. return true;
  1973. }
  1974. return false;
  1975. }
  1976. /* Return true when buffer is consumed. Configured by sd_cmd_to_sendingdata() */
  1977. static bool sd_generic_read_byte(SDState *sd, uint8_t *value)
  1978. {
  1979. *value = sd->data[sd->data_offset];
  1980. if (++sd->data_offset >= sd->data_size) {
  1981. sd->state = sd_transfer_state;
  1982. return true;
  1983. }
  1984. return false;
  1985. }
  1986. static void sd_write_byte(SDState *sd, uint8_t value)
  1987. {
  1988. int i;
  1989. if (!sd->blk || !blk_is_inserted(sd->blk)) {
  1990. return;
  1991. }
  1992. if (sd->state != sd_receivingdata_state) {
  1993. qemu_log_mask(LOG_GUEST_ERROR,
  1994. "%s: not in Receiving-Data state\n", __func__);
  1995. return;
  1996. }
  1997. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION))
  1998. return;
  1999. trace_sdcard_write_data(sd->proto->name,
  2000. sd->last_cmd_name,
  2001. sd->current_cmd, sd->data_offset, value);
  2002. switch (sd->current_cmd) {
  2003. case 24: /* CMD24: WRITE_SINGLE_BLOCK */
  2004. if (sd_generic_write_byte(sd, value)) {
  2005. /* TODO: Check CRC before committing */
  2006. sd->state = sd_programming_state;
  2007. sd_blk_write(sd, sd->data_start, sd->data_offset);
  2008. sd->blk_written ++;
  2009. sd->csd[14] |= 0x40;
  2010. /* Bzzzzzzztt .... Operation complete. */
  2011. sd->state = sd_transfer_state;
  2012. }
  2013. break;
  2014. case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
  2015. if (sd->data_offset == 0) {
  2016. /* Start of the block - let's check the address is valid */
  2017. if (!address_in_range(sd, "WRITE_MULTIPLE_BLOCK",
  2018. sd->data_start, sd->blk_len)) {
  2019. break;
  2020. }
  2021. if (sd->size <= SDSC_MAX_CAPACITY) {
  2022. if (sd_wp_addr(sd, sd->data_start)) {
  2023. sd->card_status |= WP_VIOLATION;
  2024. break;
  2025. }
  2026. }
  2027. }
  2028. sd->data[sd->data_offset++] = value;
  2029. if (sd->data_offset >= sd->blk_len) {
  2030. /* TODO: Check CRC before committing */
  2031. sd->state = sd_programming_state;
  2032. sd_blk_write(sd, sd->data_start, sd->data_offset);
  2033. sd->blk_written++;
  2034. sd->data_start += sd->blk_len;
  2035. sd->data_offset = 0;
  2036. sd->csd[14] |= 0x40;
  2037. /* Bzzzzzzztt .... Operation complete. */
  2038. if (sd->multi_blk_cnt != 0) {
  2039. if (--sd->multi_blk_cnt == 0) {
  2040. /* Stop! */
  2041. sd->state = sd_transfer_state;
  2042. break;
  2043. }
  2044. }
  2045. sd->state = sd_receivingdata_state;
  2046. }
  2047. break;
  2048. case 26: /* CMD26: PROGRAM_CID */
  2049. if (sd_generic_write_byte(sd, value)) {
  2050. /* TODO: Check CRC before committing */
  2051. sd->state = sd_programming_state;
  2052. for (i = 0; i < sizeof(sd->cid); i ++)
  2053. if ((sd->cid[i] | 0x00) != sd->data[i])
  2054. sd->card_status |= CID_CSD_OVERWRITE;
  2055. if (!(sd->card_status & CID_CSD_OVERWRITE))
  2056. for (i = 0; i < sizeof(sd->cid); i ++) {
  2057. sd->cid[i] |= 0x00;
  2058. sd->cid[i] &= sd->data[i];
  2059. }
  2060. /* Bzzzzzzztt .... Operation complete. */
  2061. sd->state = sd_transfer_state;
  2062. }
  2063. break;
  2064. case 27: /* CMD27: PROGRAM_CSD */
  2065. if (sd_generic_write_byte(sd, value)) {
  2066. /* TODO: Check CRC before committing */
  2067. sd->state = sd_programming_state;
  2068. for (i = 0; i < sizeof(sd->csd); i ++)
  2069. if ((sd->csd[i] | sd_csd_rw_mask[i]) !=
  2070. (sd->data[i] | sd_csd_rw_mask[i]))
  2071. sd->card_status |= CID_CSD_OVERWRITE;
  2072. /* Copy flag (OTP) & Permanent write protect */
  2073. if (sd->csd[14] & ~sd->data[14] & 0x60)
  2074. sd->card_status |= CID_CSD_OVERWRITE;
  2075. if (!(sd->card_status & CID_CSD_OVERWRITE))
  2076. for (i = 0; i < sizeof(sd->csd); i ++) {
  2077. sd->csd[i] |= sd_csd_rw_mask[i];
  2078. sd->csd[i] &= sd->data[i];
  2079. }
  2080. /* Bzzzzzzztt .... Operation complete. */
  2081. sd->state = sd_transfer_state;
  2082. }
  2083. break;
  2084. case 42: /* CMD42: LOCK_UNLOCK */
  2085. if (sd_generic_write_byte(sd, value)) {
  2086. /* TODO: Check CRC before committing */
  2087. sd->state = sd_programming_state;
  2088. sd_lock_command(sd);
  2089. /* Bzzzzzzztt .... Operation complete. */
  2090. sd->state = sd_transfer_state;
  2091. }
  2092. break;
  2093. case 56: /* CMD56: GEN_CMD */
  2094. sd_generic_write_byte(sd, value);
  2095. break;
  2096. default:
  2097. g_assert_not_reached();
  2098. }
  2099. }
  2100. static uint8_t sd_read_byte(SDState *sd)
  2101. {
  2102. /* TODO: Append CRCs */
  2103. const uint8_t dummy_byte = 0x00;
  2104. uint8_t ret;
  2105. uint32_t io_len;
  2106. if (!sd->blk || !blk_is_inserted(sd->blk)) {
  2107. return dummy_byte;
  2108. }
  2109. if (sd->state != sd_sendingdata_state) {
  2110. qemu_log_mask(LOG_GUEST_ERROR,
  2111. "%s: not in Sending-Data state\n", __func__);
  2112. return dummy_byte;
  2113. }
  2114. if (sd->card_status & (ADDRESS_ERROR | WP_VIOLATION)) {
  2115. return dummy_byte;
  2116. }
  2117. io_len = sd_blk_len(sd);
  2118. trace_sdcard_read_data(sd->proto->name,
  2119. sd->last_cmd_name, sd->current_cmd,
  2120. sd->data_offset, sd->data_size, io_len);
  2121. switch (sd->current_cmd) {
  2122. case 6: /* CMD6: SWITCH_FUNCTION */
  2123. case 8: /* CMD8: SEND_EXT_CSD */
  2124. case 9: /* CMD9: SEND_CSD */
  2125. case 10: /* CMD10: SEND_CID */
  2126. case 13: /* ACMD13: SD_STATUS */
  2127. case 17: /* CMD17: READ_SINGLE_BLOCK */
  2128. case 19: /* CMD19: SEND_TUNING_BLOCK (SD) */
  2129. case 22: /* ACMD22: SEND_NUM_WR_BLOCKS */
  2130. case 30: /* CMD30: SEND_WRITE_PROT */
  2131. case 51: /* ACMD51: SEND_SCR */
  2132. case 56: /* CMD56: GEN_CMD */
  2133. sd_generic_read_byte(sd, &ret);
  2134. break;
  2135. case 18: /* CMD18: READ_MULTIPLE_BLOCK */
  2136. if (sd->data_offset == 0) {
  2137. if (!address_in_range(sd, "READ_MULTIPLE_BLOCK",
  2138. sd->data_start, io_len)) {
  2139. return dummy_byte;
  2140. }
  2141. sd_blk_read(sd, sd->data_start, io_len);
  2142. }
  2143. ret = sd->data[sd->data_offset ++];
  2144. if (sd->data_offset >= io_len) {
  2145. sd->data_start += io_len;
  2146. sd->data_offset = 0;
  2147. if (sd->multi_blk_cnt != 0) {
  2148. if (--sd->multi_blk_cnt == 0) {
  2149. /* Stop! */
  2150. sd->state = sd_transfer_state;
  2151. break;
  2152. }
  2153. }
  2154. }
  2155. break;
  2156. default:
  2157. qemu_log_mask(LOG_GUEST_ERROR, "%s: DAT read illegal for command %s\n",
  2158. __func__, sd->last_cmd_name);
  2159. return dummy_byte;
  2160. }
  2161. return ret;
  2162. }
  2163. static bool sd_receive_ready(SDState *sd)
  2164. {
  2165. return sd->state == sd_receivingdata_state;
  2166. }
  2167. static bool sd_data_ready(SDState *sd)
  2168. {
  2169. return sd->state == sd_sendingdata_state;
  2170. }
  2171. static const SDProto sd_proto_spi = {
  2172. .name = "SPI",
  2173. .cmd = {
  2174. [0] = {0, sd_spi, "GO_IDLE_STATE", sd_cmd_GO_IDLE_STATE},
  2175. [1] = {0, sd_spi, "SEND_OP_COND", spi_cmd_SEND_OP_COND},
  2176. [5] = {9, sd_spi, "IO_SEND_OP_COND", sd_cmd_optional},
  2177. [6] = {10, sd_spi, "SWITCH_FUNCTION", sd_cmd_SWITCH_FUNCTION},
  2178. [8] = {0, sd_spi, "SEND_IF_COND", sd_cmd_SEND_IF_COND},
  2179. [9] = {0, sd_spi, "SEND_CSD", spi_cmd_SEND_CSD},
  2180. [10] = {0, sd_spi, "SEND_CID", spi_cmd_SEND_CID},
  2181. [12] = {0, sd_spi, "STOP_TRANSMISSION", sd_cmd_STOP_TRANSMISSION},
  2182. [13] = {0, sd_spi, "SEND_STATUS", sd_cmd_SEND_STATUS},
  2183. [16] = {2, sd_spi, "SET_BLOCKLEN", sd_cmd_SET_BLOCKLEN},
  2184. [17] = {2, sd_spi, "READ_SINGLE_BLOCK", sd_cmd_READ_SINGLE_BLOCK},
  2185. [24] = {4, sd_spi, "WRITE_SINGLE_BLOCK", sd_cmd_WRITE_SINGLE_BLOCK},
  2186. [27] = {4, sd_spi, "PROGRAM_CSD", sd_cmd_PROGRAM_CSD},
  2187. [28] = {6, sd_spi, "SET_WRITE_PROT", sd_cmd_SET_WRITE_PROT},
  2188. [29] = {6, sd_spi, "CLR_WRITE_PROT", sd_cmd_CLR_WRITE_PROT},
  2189. [30] = {6, sd_spi, "SEND_WRITE_PROT", sd_cmd_SEND_WRITE_PROT},
  2190. [32] = {5, sd_spi, "ERASE_WR_BLK_START", sd_cmd_ERASE_WR_BLK_START},
  2191. [33] = {5, sd_spi, "ERASE_WR_BLK_END", sd_cmd_ERASE_WR_BLK_END},
  2192. [34] = {10, sd_spi, "READ_SEC_CMD", sd_cmd_optional},
  2193. [35] = {10, sd_spi, "WRITE_SEC_CMD", sd_cmd_optional},
  2194. [36] = {10, sd_spi, "SEND_PSI", sd_cmd_optional},
  2195. [37] = {10, sd_spi, "CONTROL_ASSD_SYSTEM", sd_cmd_optional},
  2196. [38] = {5, sd_spi, "ERASE", sd_cmd_ERASE},
  2197. [42] = {7, sd_spi, "LOCK_UNLOCK", sd_cmd_LOCK_UNLOCK},
  2198. [50] = {10, sd_spi, "DIRECT_SECURE_READ", sd_cmd_optional},
  2199. [52] = {9, sd_spi, "IO_RW_DIRECT", sd_cmd_optional},
  2200. [53] = {9, sd_spi, "IO_RW_EXTENDED", sd_cmd_optional},
  2201. [55] = {8, sd_spi, "APP_CMD", sd_cmd_APP_CMD},
  2202. [56] = {8, sd_spi, "GEN_CMD", sd_cmd_GEN_CMD},
  2203. [57] = {10, sd_spi, "DIRECT_SECURE_WRITE", sd_cmd_optional},
  2204. [58] = {0, sd_spi, "READ_OCR", spi_cmd_READ_OCR},
  2205. [59] = {0, sd_spi, "CRC_ON_OFF", spi_cmd_CRC_ON_OFF},
  2206. },
  2207. .acmd = {
  2208. [13] = {8, sd_spi, "SD_STATUS", sd_acmd_SD_STATUS},
  2209. [22] = {8, sd_spi, "SEND_NUM_WR_BLOCKS", sd_acmd_SEND_NUM_WR_BLOCKS},
  2210. [23] = {8, sd_spi, "SET_WR_BLK_ERASE_COUNT", sd_acmd_SET_WR_BLK_ERASE_COUNT},
  2211. [41] = {8, sd_spi, "SEND_OP_COND", spi_cmd_SEND_OP_COND},
  2212. [42] = {8, sd_spi, "SET_CLR_CARD_DETECT", sd_acmd_SET_CLR_CARD_DETECT},
  2213. [51] = {8, sd_spi, "SEND_SCR", sd_acmd_SEND_SCR},
  2214. },
  2215. };
  2216. static const SDProto sd_proto_sd = {
  2217. .name = "SD",
  2218. .cmd = {
  2219. [0] = {0, sd_bc, "GO_IDLE_STATE", sd_cmd_GO_IDLE_STATE},
  2220. [2] = {0, sd_bcr, "ALL_SEND_CID", sd_cmd_ALL_SEND_CID},
  2221. [3] = {0, sd_bcr, "SEND_RELATIVE_ADDR", sd_cmd_SEND_RELATIVE_ADDR},
  2222. [4] = {0, sd_bc, "SEND_DSR", sd_cmd_unimplemented},
  2223. [5] = {9, sd_bc, "IO_SEND_OP_COND", sd_cmd_optional},
  2224. [6] = {10, sd_adtc, "SWITCH_FUNCTION", sd_cmd_SWITCH_FUNCTION},
  2225. [7] = {0, sd_ac, "(DE)SELECT_CARD", sd_cmd_DE_SELECT_CARD},
  2226. [8] = {0, sd_bcr, "SEND_IF_COND", sd_cmd_SEND_IF_COND},
  2227. [9] = {0, sd_ac, "SEND_CSD", sd_cmd_SEND_CSD},
  2228. [10] = {0, sd_ac, "SEND_CID", sd_cmd_SEND_CID},
  2229. [11] = {0, sd_ac, "VOLTAGE_SWITCH", sd_cmd_optional},
  2230. [12] = {0, sd_ac, "STOP_TRANSMISSION", sd_cmd_STOP_TRANSMISSION},
  2231. [13] = {0, sd_ac, "SEND_STATUS", sd_cmd_SEND_STATUS},
  2232. [15] = {0, sd_ac, "GO_INACTIVE_STATE", sd_cmd_GO_INACTIVE_STATE},
  2233. [16] = {2, sd_ac, "SET_BLOCKLEN", sd_cmd_SET_BLOCKLEN},
  2234. [17] = {2, sd_adtc, "READ_SINGLE_BLOCK", sd_cmd_READ_SINGLE_BLOCK},
  2235. [19] = {2, sd_adtc, "SEND_TUNING_BLOCK", sd_cmd_SEND_TUNING_BLOCK},
  2236. [20] = {2, sd_ac, "SPEED_CLASS_CONTROL", sd_cmd_optional},
  2237. [23] = {2, sd_ac, "SET_BLOCK_COUNT", sd_cmd_SET_BLOCK_COUNT},
  2238. [24] = {4, sd_adtc, "WRITE_SINGLE_BLOCK", sd_cmd_WRITE_SINGLE_BLOCK},
  2239. [27] = {4, sd_adtc, "PROGRAM_CSD", sd_cmd_PROGRAM_CSD},
  2240. [28] = {6, sd_ac, "SET_WRITE_PROT", sd_cmd_SET_WRITE_PROT},
  2241. [29] = {6, sd_ac, "CLR_WRITE_PROT", sd_cmd_CLR_WRITE_PROT},
  2242. [30] = {6, sd_adtc, "SEND_WRITE_PROT", sd_cmd_SEND_WRITE_PROT},
  2243. [32] = {5, sd_ac, "ERASE_WR_BLK_START", sd_cmd_ERASE_WR_BLK_START},
  2244. [33] = {5, sd_ac, "ERASE_WR_BLK_END", sd_cmd_ERASE_WR_BLK_END},
  2245. [34] = {10, sd_adtc, "READ_SEC_CMD", sd_cmd_optional},
  2246. [35] = {10, sd_adtc, "WRITE_SEC_CMD", sd_cmd_optional},
  2247. [36] = {10, sd_adtc, "SEND_PSI", sd_cmd_optional},
  2248. [37] = {10, sd_ac, "CONTROL_ASSD_SYSTEM", sd_cmd_optional},
  2249. [38] = {5, sd_ac, "ERASE", sd_cmd_ERASE},
  2250. [42] = {7, sd_adtc, "LOCK_UNLOCK", sd_cmd_LOCK_UNLOCK},
  2251. [43] = {1, sd_ac, "Q_MANAGEMENT", sd_cmd_optional},
  2252. [44] = {1, sd_ac, "Q_TASK_INFO_A", sd_cmd_optional},
  2253. [45] = {1, sd_ac, "Q_TASK_INFO_B", sd_cmd_optional},
  2254. [46] = {1, sd_adtc, "Q_RD_TASK", sd_cmd_optional},
  2255. [47] = {1, sd_adtc, "Q_WR_TASK", sd_cmd_optional},
  2256. [48] = {1, sd_adtc, "READ_EXTR_SINGLE", sd_cmd_optional},
  2257. [49] = {1, sd_adtc, "WRITE_EXTR_SINGLE", sd_cmd_optional},
  2258. [50] = {10, sd_adtc, "DIRECT_SECURE_READ", sd_cmd_optional},
  2259. [52] = {9, sd_bc, "IO_RW_DIRECT", sd_cmd_optional},
  2260. [53] = {9, sd_bc, "IO_RW_EXTENDED", sd_cmd_optional},
  2261. [55] = {8, sd_ac, "APP_CMD", sd_cmd_APP_CMD},
  2262. [56] = {8, sd_adtc, "GEN_CMD", sd_cmd_GEN_CMD},
  2263. [57] = {10, sd_adtc, "DIRECT_SECURE_WRITE", sd_cmd_optional},
  2264. [58] = {11, sd_adtc, "READ_EXTR_MULTI", sd_cmd_optional},
  2265. [59] = {11, sd_adtc, "WRITE_EXTR_MULTI", sd_cmd_optional},
  2266. },
  2267. .acmd = {
  2268. [6] = {8, sd_ac, "SET_BUS_WIDTH", sd_acmd_SET_BUS_WIDTH},
  2269. [13] = {8, sd_adtc, "SD_STATUS", sd_acmd_SD_STATUS},
  2270. [22] = {8, sd_adtc, "SEND_NUM_WR_BLOCKS", sd_acmd_SEND_NUM_WR_BLOCKS},
  2271. [23] = {8, sd_ac, "SET_WR_BLK_ERASE_COUNT", sd_acmd_SET_WR_BLK_ERASE_COUNT},
  2272. [41] = {8, sd_bcr, "SEND_OP_COND", sd_cmd_SEND_OP_COND},
  2273. [42] = {8, sd_ac, "SET_CLR_CARD_DETECT", sd_acmd_SET_CLR_CARD_DETECT},
  2274. [51] = {8, sd_adtc, "SEND_SCR", sd_acmd_SEND_SCR},
  2275. },
  2276. };
  2277. static const SDProto sd_proto_emmc = {
  2278. /* Only v4.3 is supported */
  2279. .name = "eMMC",
  2280. .cmd = {
  2281. [0] = {0, sd_bc, "GO_IDLE_STATE", sd_cmd_GO_IDLE_STATE},
  2282. [1] = {0, sd_bcr, "SEND_OP_COND", sd_cmd_SEND_OP_COND},
  2283. [2] = {0, sd_bcr, "ALL_SEND_CID", sd_cmd_ALL_SEND_CID},
  2284. [3] = {0, sd_ac, "SET_RELATIVE_ADDR", emmc_cmd_SET_RELATIVE_ADDR},
  2285. [4] = {0, sd_bc, "SEND_DSR", sd_cmd_unimplemented},
  2286. [5] = {0, sd_ac, "SLEEP/AWAKE", emmc_cmd_sleep_awake},
  2287. [6] = {10, sd_adtc, "SWITCH", emmc_cmd_SWITCH},
  2288. [7] = {0, sd_ac, "(DE)SELECT_CARD", sd_cmd_DE_SELECT_CARD},
  2289. [8] = {0, sd_adtc, "SEND_EXT_CSD", emmc_cmd_SEND_EXT_CSD},
  2290. [9] = {0, sd_ac, "SEND_CSD", sd_cmd_SEND_CSD},
  2291. [10] = {0, sd_ac, "SEND_CID", sd_cmd_SEND_CID},
  2292. [11] = {1, sd_adtc, "READ_DAT_UNTIL_STOP", sd_cmd_unimplemented},
  2293. [12] = {0, sd_ac, "STOP_TRANSMISSION", sd_cmd_STOP_TRANSMISSION},
  2294. [13] = {0, sd_ac, "SEND_STATUS", sd_cmd_SEND_STATUS},
  2295. [14] = {0, sd_adtc, "BUSTEST_R", sd_cmd_unimplemented},
  2296. [15] = {0, sd_ac, "GO_INACTIVE_STATE", sd_cmd_GO_INACTIVE_STATE},
  2297. [16] = {2, sd_ac, "SET_BLOCKLEN", sd_cmd_SET_BLOCKLEN},
  2298. [17] = {2, sd_adtc, "READ_SINGLE_BLOCK", sd_cmd_READ_SINGLE_BLOCK},
  2299. [19] = {0, sd_adtc, "BUSTEST_W", sd_cmd_unimplemented},
  2300. [20] = {3, sd_adtc, "WRITE_DAT_UNTIL_STOP", sd_cmd_unimplemented},
  2301. [23] = {2, sd_ac, "SET_BLOCK_COUNT", sd_cmd_SET_BLOCK_COUNT},
  2302. [24] = {4, sd_adtc, "WRITE_SINGLE_BLOCK", sd_cmd_WRITE_SINGLE_BLOCK},
  2303. [26] = {4, sd_adtc, "PROGRAM_CID", emmc_cmd_PROGRAM_CID},
  2304. [27] = {4, sd_adtc, "PROGRAM_CSD", sd_cmd_PROGRAM_CSD},
  2305. [28] = {6, sd_ac, "SET_WRITE_PROT", sd_cmd_SET_WRITE_PROT},
  2306. [29] = {6, sd_ac, "CLR_WRITE_PROT", sd_cmd_CLR_WRITE_PROT},
  2307. [30] = {6, sd_adtc, "SEND_WRITE_PROT", sd_cmd_SEND_WRITE_PROT},
  2308. [31] = {6, sd_adtc, "SEND_WRITE_PROT_TYPE", sd_cmd_unimplemented},
  2309. [35] = {5, sd_ac, "ERASE_WR_BLK_START", sd_cmd_ERASE_WR_BLK_START},
  2310. [36] = {5, sd_ac, "ERASE_WR_BLK_END", sd_cmd_ERASE_WR_BLK_END},
  2311. [38] = {5, sd_ac, "ERASE", sd_cmd_ERASE},
  2312. [39] = {9, sd_ac, "FAST_IO", sd_cmd_unimplemented},
  2313. [40] = {9, sd_bcr, "GO_IRQ_STATE", sd_cmd_unimplemented},
  2314. [42] = {7, sd_adtc, "LOCK_UNLOCK", sd_cmd_LOCK_UNLOCK},
  2315. [49] = {0, sd_adtc, "SET_TIME", sd_cmd_unimplemented},
  2316. [55] = {8, sd_ac, "APP_CMD", sd_cmd_APP_CMD},
  2317. [56] = {8, sd_adtc, "GEN_CMD", sd_cmd_GEN_CMD},
  2318. },
  2319. };
  2320. static void sd_instance_init(Object *obj)
  2321. {
  2322. SDState *sd = SDMMC_COMMON(obj);
  2323. SDCardClass *sc = SDMMC_COMMON_GET_CLASS(sd);
  2324. sd->proto = sc->proto;
  2325. sd->last_cmd_name = "UNSET";
  2326. sd->ocr_power_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sd_ocr_powerup, sd);
  2327. }
  2328. static void sd_instance_finalize(Object *obj)
  2329. {
  2330. SDState *sd = SDMMC_COMMON(obj);
  2331. timer_free(sd->ocr_power_timer);
  2332. }
  2333. static void sd_realize(DeviceState *dev, Error **errp)
  2334. {
  2335. SDState *sd = SDMMC_COMMON(dev);
  2336. int ret;
  2337. switch (sd->spec_version) {
  2338. case SD_PHY_SPECv1_10_VERS
  2339. ... SD_PHY_SPECv3_01_VERS:
  2340. break;
  2341. default:
  2342. error_setg(errp, "Invalid SD card Spec version: %u", sd->spec_version);
  2343. return;
  2344. }
  2345. if (sd->blk) {
  2346. int64_t blk_size;
  2347. if (!blk_supports_write_perm(sd->blk)) {
  2348. error_setg(errp, "Cannot use read-only drive as SD card");
  2349. return;
  2350. }
  2351. blk_size = blk_getlength(sd->blk);
  2352. if (blk_size > 0 && !is_power_of_2(blk_size)) {
  2353. int64_t blk_size_aligned = pow2ceil(blk_size);
  2354. char *blk_size_str;
  2355. blk_size_str = size_to_str(blk_size);
  2356. error_setg(errp, "Invalid SD card size: %s", blk_size_str);
  2357. g_free(blk_size_str);
  2358. blk_size_str = size_to_str(blk_size_aligned);
  2359. error_append_hint(errp,
  2360. "SD card size has to be a power of 2, e.g. %s.\n"
  2361. "You can resize disk images with"
  2362. " 'qemu-img resize <imagefile> <new-size>'\n"
  2363. "(note that this will lose data if you make the"
  2364. " image smaller than it currently is).\n",
  2365. blk_size_str);
  2366. g_free(blk_size_str);
  2367. return;
  2368. }
  2369. ret = blk_set_perm(sd->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
  2370. BLK_PERM_ALL, errp);
  2371. if (ret < 0) {
  2372. return;
  2373. }
  2374. blk_set_dev_ops(sd->blk, &sd_block_ops, sd);
  2375. }
  2376. }
  2377. static void emmc_realize(DeviceState *dev, Error **errp)
  2378. {
  2379. SDState *sd = SDMMC_COMMON(dev);
  2380. sd->spec_version = SD_PHY_SPECv3_01_VERS; /* Actually v4.3 */
  2381. sd_realize(dev, errp);
  2382. }
  2383. static const Property sdmmc_common_properties[] = {
  2384. DEFINE_PROP_DRIVE("drive", SDState, blk),
  2385. };
  2386. static const Property sd_properties[] = {
  2387. DEFINE_PROP_UINT8("spec_version", SDState,
  2388. spec_version, SD_PHY_SPECv3_01_VERS),
  2389. };
  2390. static const Property emmc_properties[] = {
  2391. DEFINE_PROP_UINT64("boot-partition-size", SDState, boot_part_size, 0),
  2392. DEFINE_PROP_UINT8("boot-config", SDState, boot_config, 0x0),
  2393. };
  2394. static void sdmmc_common_class_init(ObjectClass *klass, void *data)
  2395. {
  2396. DeviceClass *dc = DEVICE_CLASS(klass);
  2397. SDCardClass *sc = SDMMC_COMMON_CLASS(klass);
  2398. device_class_set_props(dc, sdmmc_common_properties);
  2399. dc->vmsd = &sd_vmstate;
  2400. device_class_set_legacy_reset(dc, sd_reset);
  2401. dc->bus_type = TYPE_SD_BUS;
  2402. set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
  2403. sc->set_voltage = sd_set_voltage;
  2404. sc->get_dat_lines = sd_get_dat_lines;
  2405. sc->get_cmd_line = sd_get_cmd_line;
  2406. sc->do_command = sd_do_command;
  2407. sc->write_byte = sd_write_byte;
  2408. sc->read_byte = sd_read_byte;
  2409. sc->receive_ready = sd_receive_ready;
  2410. sc->data_ready = sd_data_ready;
  2411. sc->get_inserted = sd_get_inserted;
  2412. sc->get_readonly = sd_get_readonly;
  2413. }
  2414. static void sd_class_init(ObjectClass *klass, void *data)
  2415. {
  2416. DeviceClass *dc = DEVICE_CLASS(klass);
  2417. SDCardClass *sc = SDMMC_COMMON_CLASS(klass);
  2418. dc->realize = sd_realize;
  2419. device_class_set_props(dc, sd_properties);
  2420. sc->set_cid = sd_set_cid;
  2421. sc->set_csd = sd_set_csd;
  2422. sc->proto = &sd_proto_sd;
  2423. }
  2424. /*
  2425. * We do not model the chip select pin, so allow the board to select
  2426. * whether card should be in SSI or MMC/SD mode. It is also up to the
  2427. * board to ensure that ssi transfers only occur when the chip select
  2428. * is asserted.
  2429. */
  2430. static void sd_spi_class_init(ObjectClass *klass, void *data)
  2431. {
  2432. DeviceClass *dc = DEVICE_CLASS(klass);
  2433. SDCardClass *sc = SDMMC_COMMON_CLASS(klass);
  2434. dc->desc = "SD SPI";
  2435. sc->proto = &sd_proto_spi;
  2436. }
  2437. static void emmc_class_init(ObjectClass *klass, void *data)
  2438. {
  2439. DeviceClass *dc = DEVICE_CLASS(klass);
  2440. SDCardClass *sc = SDMMC_COMMON_CLASS(klass);
  2441. dc->desc = "eMMC";
  2442. dc->realize = emmc_realize;
  2443. device_class_set_props(dc, emmc_properties);
  2444. /* Reason: Soldered on board */
  2445. dc->user_creatable = false;
  2446. sc->proto = &sd_proto_emmc;
  2447. sc->set_cid = emmc_set_cid;
  2448. sc->set_csd = emmc_set_csd;
  2449. }
  2450. static const TypeInfo sd_types[] = {
  2451. {
  2452. .name = TYPE_SDMMC_COMMON,
  2453. .parent = TYPE_DEVICE,
  2454. .abstract = true,
  2455. .instance_size = sizeof(SDState),
  2456. .class_size = sizeof(SDCardClass),
  2457. .class_init = sdmmc_common_class_init,
  2458. .instance_init = sd_instance_init,
  2459. .instance_finalize = sd_instance_finalize,
  2460. },
  2461. {
  2462. .name = TYPE_SD_CARD,
  2463. .parent = TYPE_SDMMC_COMMON,
  2464. .class_init = sd_class_init,
  2465. },
  2466. {
  2467. .name = TYPE_SD_CARD_SPI,
  2468. .parent = TYPE_SD_CARD,
  2469. .class_init = sd_spi_class_init,
  2470. },
  2471. {
  2472. .name = TYPE_EMMC,
  2473. .parent = TYPE_SDMMC_COMMON,
  2474. .class_init = emmc_class_init,
  2475. },
  2476. };
  2477. DEFINE_TYPES(sd_types)