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spapr_vio.c 20 KB

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  1. /*
  2. * QEMU sPAPR VIO code
  3. *
  4. * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
  5. * Based on the s390 virtio bus code:
  6. * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
  7. *
  8. * This library is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU Lesser General Public
  10. * License as published by the Free Software Foundation; either
  11. * version 2.1 of the License, or (at your option) any later version.
  12. *
  13. * This library is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * Lesser General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU Lesser General Public
  19. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include "qemu/osdep.h"
  22. #include "qemu/error-report.h"
  23. #include "qapi/error.h"
  24. #include "qapi/visitor.h"
  25. #include "qemu/log.h"
  26. #include "hw/loader.h"
  27. #include "elf.h"
  28. #include "hw/sysbus.h"
  29. #include "system/kvm.h"
  30. #include "system/device_tree.h"
  31. #include "kvm_ppc.h"
  32. #include "migration/vmstate.h"
  33. #include "hw/ppc/spapr.h"
  34. #include "hw/ppc/spapr_vio.h"
  35. #include "hw/ppc/fdt.h"
  36. #include "trace.h"
  37. #include <libfdt.h>
  38. #define SPAPR_VIO_REG_BASE 0x71000000
  39. static char *spapr_vio_get_dev_name(DeviceState *qdev)
  40. {
  41. SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
  42. SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  43. /* Device tree style name device@reg */
  44. return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
  45. }
  46. static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
  47. {
  48. BusClass *k = BUS_CLASS(klass);
  49. k->get_dev_path = spapr_vio_get_dev_name;
  50. k->get_fw_dev_path = spapr_vio_get_dev_name;
  51. }
  52. static const TypeInfo spapr_vio_bus_info = {
  53. .name = TYPE_SPAPR_VIO_BUS,
  54. .parent = TYPE_BUS,
  55. .class_init = spapr_vio_bus_class_init,
  56. .instance_size = sizeof(SpaprVioBus),
  57. };
  58. SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg)
  59. {
  60. BusChild *kid;
  61. SpaprVioDevice *dev = NULL;
  62. QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
  63. dev = (SpaprVioDevice *)kid->child;
  64. if (dev->reg == reg) {
  65. return dev;
  66. }
  67. }
  68. return NULL;
  69. }
  70. static int vio_make_devnode(SpaprVioDevice *dev,
  71. void *fdt)
  72. {
  73. SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  74. int vdevice_off, node_off, ret;
  75. char *dt_name;
  76. const char *dt_compatible;
  77. vdevice_off = fdt_path_offset(fdt, "/vdevice");
  78. if (vdevice_off < 0) {
  79. return vdevice_off;
  80. }
  81. dt_name = spapr_vio_get_dev_name(DEVICE(dev));
  82. node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
  83. g_free(dt_name);
  84. if (node_off < 0) {
  85. return node_off;
  86. }
  87. ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
  88. if (ret < 0) {
  89. return ret;
  90. }
  91. if (pc->dt_type) {
  92. ret = fdt_setprop_string(fdt, node_off, "device_type",
  93. pc->dt_type);
  94. if (ret < 0) {
  95. return ret;
  96. }
  97. }
  98. if (pc->get_dt_compatible) {
  99. dt_compatible = pc->get_dt_compatible(dev);
  100. } else {
  101. dt_compatible = pc->dt_compatible;
  102. }
  103. if (dt_compatible) {
  104. ret = fdt_setprop_string(fdt, node_off, "compatible",
  105. dt_compatible);
  106. if (ret < 0) {
  107. return ret;
  108. }
  109. }
  110. if (dev->irq) {
  111. uint32_t ints_prop[2];
  112. spapr_dt_irq(ints_prop, dev->irq, false);
  113. ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
  114. sizeof(ints_prop));
  115. if (ret < 0) {
  116. return ret;
  117. }
  118. }
  119. ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
  120. if (ret < 0) {
  121. return ret;
  122. }
  123. if (pc->devnode) {
  124. ret = (pc->devnode)(dev, fdt, node_off);
  125. if (ret < 0) {
  126. return ret;
  127. }
  128. }
  129. return node_off;
  130. }
  131. /*
  132. * CRQ handling
  133. */
  134. static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
  135. target_ulong opcode, target_ulong *args)
  136. {
  137. target_ulong reg = args[0];
  138. target_ulong queue_addr = args[1];
  139. target_ulong queue_len = args[2];
  140. SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  141. if (!dev) {
  142. hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
  143. return H_PARAMETER;
  144. }
  145. /* We can't grok a queue size bigger than 256M for now */
  146. if (queue_len < 0x1000 || queue_len > 0x10000000) {
  147. hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
  148. ")\n", queue_len);
  149. return H_PARAMETER;
  150. }
  151. /* Check queue alignment */
  152. if (queue_addr & 0xfff) {
  153. hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
  154. return H_PARAMETER;
  155. }
  156. /* Check if device supports CRQs */
  157. if (!dev->crq.SendFunc) {
  158. hcall_dprintf("Device does not support CRQ\n");
  159. return H_NOT_FOUND;
  160. }
  161. /* Already a queue ? */
  162. if (dev->crq.qsize) {
  163. hcall_dprintf("CRQ already registered\n");
  164. return H_RESOURCE;
  165. }
  166. dev->crq.qladdr = queue_addr;
  167. dev->crq.qsize = queue_len;
  168. dev->crq.qnext = 0;
  169. trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
  170. return H_SUCCESS;
  171. }
  172. static target_ulong free_crq(SpaprVioDevice *dev)
  173. {
  174. dev->crq.qladdr = 0;
  175. dev->crq.qsize = 0;
  176. dev->crq.qnext = 0;
  177. trace_spapr_vio_free_crq(dev->reg);
  178. return H_SUCCESS;
  179. }
  180. static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
  181. target_ulong opcode, target_ulong *args)
  182. {
  183. target_ulong reg = args[0];
  184. SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  185. if (!dev) {
  186. hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
  187. return H_PARAMETER;
  188. }
  189. return free_crq(dev);
  190. }
  191. static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
  192. target_ulong opcode, target_ulong *args)
  193. {
  194. target_ulong reg = args[0];
  195. target_ulong msg_hi = args[1];
  196. target_ulong msg_lo = args[2];
  197. SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  198. uint64_t crq_mangle[2];
  199. if (!dev) {
  200. hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
  201. return H_PARAMETER;
  202. }
  203. crq_mangle[0] = cpu_to_be64(msg_hi);
  204. crq_mangle[1] = cpu_to_be64(msg_lo);
  205. if (dev->crq.SendFunc) {
  206. return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
  207. }
  208. return H_HARDWARE;
  209. }
  210. static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
  211. target_ulong opcode, target_ulong *args)
  212. {
  213. target_ulong reg = args[0];
  214. SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  215. if (!dev) {
  216. hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
  217. return H_PARAMETER;
  218. }
  219. return 0;
  220. }
  221. /* Returns negative error, 0 success, or positive: queue full */
  222. int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq)
  223. {
  224. int rc;
  225. uint8_t byte;
  226. if (!dev->crq.qsize) {
  227. error_report("spapr_vio_send_creq on uninitialized queue");
  228. return -1;
  229. }
  230. /* Maybe do a fast path for KVM just writing to the pages */
  231. rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
  232. if (rc) {
  233. return rc;
  234. }
  235. if (byte != 0) {
  236. return 1;
  237. }
  238. rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
  239. &crq[8], 8);
  240. if (rc) {
  241. return rc;
  242. }
  243. kvmppc_eieio();
  244. rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
  245. if (rc) {
  246. return rc;
  247. }
  248. dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
  249. if (dev->signal_state & 1) {
  250. spapr_vio_irq_pulse(dev);
  251. }
  252. return 0;
  253. }
  254. /* "quiesce" handling */
  255. static void spapr_vio_quiesce_one(SpaprVioDevice *dev)
  256. {
  257. if (dev->tcet) {
  258. device_cold_reset(DEVICE(dev->tcet));
  259. }
  260. free_crq(dev);
  261. }
  262. void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass)
  263. {
  264. if (!dev->tcet) {
  265. return;
  266. }
  267. memory_region_set_enabled(&dev->mrbypass, bypass);
  268. memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
  269. dev->tcet->bypass = bypass;
  270. }
  271. static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr,
  272. uint32_t token,
  273. uint32_t nargs, target_ulong args,
  274. uint32_t nret, target_ulong rets)
  275. {
  276. SpaprVioBus *bus = spapr->vio_bus;
  277. SpaprVioDevice *dev;
  278. uint32_t unit, enable;
  279. if (nargs != 2) {
  280. rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  281. return;
  282. }
  283. unit = rtas_ld(args, 0);
  284. enable = rtas_ld(args, 1);
  285. dev = spapr_vio_find_by_reg(bus, unit);
  286. if (!dev) {
  287. rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  288. return;
  289. }
  290. if (!dev->tcet) {
  291. rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  292. return;
  293. }
  294. spapr_vio_set_bypass(dev, !!enable);
  295. rtas_st(rets, 0, RTAS_OUT_SUCCESS);
  296. }
  297. static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr,
  298. uint32_t token,
  299. uint32_t nargs, target_ulong args,
  300. uint32_t nret, target_ulong rets)
  301. {
  302. SpaprVioBus *bus = spapr->vio_bus;
  303. BusChild *kid;
  304. SpaprVioDevice *dev = NULL;
  305. if (nargs != 0) {
  306. rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
  307. return;
  308. }
  309. QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
  310. dev = (SpaprVioDevice *)kid->child;
  311. spapr_vio_quiesce_one(dev);
  312. }
  313. rtas_st(rets, 0, RTAS_OUT_SUCCESS);
  314. }
  315. static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev)
  316. {
  317. SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
  318. BusChild *kid;
  319. SpaprVioDevice *other;
  320. /*
  321. * Check for a device other than the given one which is already
  322. * using the requested address. We have to open code this because
  323. * the given dev might already be in the list.
  324. */
  325. QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
  326. other = VIO_SPAPR_DEVICE(kid->child);
  327. if (other != dev && other->reg == dev->reg) {
  328. return other;
  329. }
  330. }
  331. return 0;
  332. }
  333. static void spapr_vio_busdev_reset(DeviceState *qdev)
  334. {
  335. SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
  336. SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  337. /* Shut down the request queue and TCEs if necessary */
  338. spapr_vio_quiesce_one(dev);
  339. dev->signal_state = 0;
  340. spapr_vio_set_bypass(dev, false);
  341. if (pc->reset) {
  342. pc->reset(dev);
  343. }
  344. }
  345. /*
  346. * The register property of a VIO device is defined in libvirt using
  347. * 0x1000 as a base register number plus a 0x1000 increment. For the
  348. * VIO tty device, the base number is changed to 0x30000000. QEMU uses
  349. * a base register number of 0x71000000 and then a simple increment.
  350. *
  351. * The formula below tries to compute a unique index number from the
  352. * register value that will be used to define the IRQ number of the
  353. * VIO device.
  354. *
  355. * A maximum of 256 VIO devices is covered. Collisions are possible
  356. * but they will be detected when the IRQ is claimed.
  357. */
  358. static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
  359. {
  360. uint32_t irq;
  361. if (reg >= SPAPR_VIO_REG_BASE) {
  362. /*
  363. * VIO device register values when allocated by QEMU. For
  364. * these, we simply mask the high bits to fit the overall
  365. * range: [0x00 - 0xff].
  366. *
  367. * The nvram VIO device (reg=0x71000000) is a static device of
  368. * the pseries machine and so is always allocated by QEMU. Its
  369. * IRQ number is 0x0.
  370. */
  371. irq = reg & 0xff;
  372. } else if (reg >= 0x30000000) {
  373. /*
  374. * VIO tty devices register values, when allocated by libvirt,
  375. * are mapped in range [0xf0 - 0xff], gives us a maximum of 16
  376. * vtys.
  377. */
  378. irq = 0xf0 | ((reg >> 12) & 0xf);
  379. } else {
  380. /*
  381. * Other VIO devices register values, when allocated by
  382. * libvirt, should be mapped in range [0x00 - 0xef]. Conflicts
  383. * will be detected when IRQ is claimed.
  384. */
  385. irq = (reg >> 12) & 0xff;
  386. }
  387. return SPAPR_IRQ_VIO | irq;
  388. }
  389. static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
  390. {
  391. SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  392. SpaprVioDevice *dev = (SpaprVioDevice *)qdev;
  393. SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  394. char *id;
  395. if (dev->reg != -1) {
  396. /*
  397. * Explicitly assigned address, just verify that no-one else
  398. * is using it. other mechanism). We have to open code this
  399. * rather than using spapr_vio_find_by_reg() because sdev
  400. * itself is already in the list.
  401. */
  402. SpaprVioDevice *other = reg_conflict(dev);
  403. if (other) {
  404. error_setg(errp, "%s and %s devices conflict at address %#x",
  405. object_get_typename(OBJECT(qdev)),
  406. object_get_typename(OBJECT(&other->qdev)),
  407. dev->reg);
  408. return;
  409. }
  410. } else {
  411. /* Need to assign an address */
  412. SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
  413. do {
  414. dev->reg = bus->next_reg++;
  415. } while (reg_conflict(dev));
  416. }
  417. /* Don't overwrite ids assigned on the command line */
  418. if (!dev->qdev.id) {
  419. id = spapr_vio_get_dev_name(DEVICE(dev));
  420. dev->qdev.id = id;
  421. }
  422. dev->irq = spapr_vio_reg_to_irq(dev->reg);
  423. if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
  424. int irq = spapr_irq_findone(spapr, errp);
  425. if (irq < 0) {
  426. return;
  427. }
  428. dev->irq = irq;
  429. }
  430. if (spapr_irq_claim(spapr, dev->irq, false, errp) < 0) {
  431. return;
  432. }
  433. if (pc->rtce_window_size) {
  434. uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
  435. memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
  436. MACHINE(spapr)->ram_size);
  437. memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
  438. "iommu-spapr-bypass", get_system_memory(),
  439. 0, MACHINE(spapr)->ram_size);
  440. memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
  441. address_space_init(&dev->as, &dev->mrroot, qdev->id);
  442. dev->tcet = spapr_tce_new_table(qdev, liobn);
  443. spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
  444. pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
  445. dev->tcet->vdev = dev;
  446. memory_region_add_subregion_overlap(&dev->mrroot, 0,
  447. spapr_tce_get_iommu(dev->tcet), 2);
  448. }
  449. pc->realize(dev, errp);
  450. }
  451. static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr,
  452. target_ulong opcode,
  453. target_ulong *args)
  454. {
  455. target_ulong reg = args[0];
  456. target_ulong mode = args[1];
  457. SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
  458. SpaprVioDeviceClass *pc;
  459. if (!dev) {
  460. return H_PARAMETER;
  461. }
  462. pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  463. if (mode & ~pc->signal_mask) {
  464. return H_PARAMETER;
  465. }
  466. dev->signal_state = mode;
  467. return H_SUCCESS;
  468. }
  469. SpaprVioBus *spapr_vio_bus_init(void)
  470. {
  471. SpaprVioBus *bus;
  472. BusState *qbus;
  473. DeviceState *dev;
  474. /* Create bridge device */
  475. dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE);
  476. /* Create bus on bridge device */
  477. qbus = qbus_new(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
  478. bus = SPAPR_VIO_BUS(qbus);
  479. bus->next_reg = SPAPR_VIO_REG_BASE;
  480. sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  481. /* hcall-vio */
  482. spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
  483. /* hcall-crq */
  484. spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
  485. spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
  486. spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
  487. spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
  488. /* RTAS calls */
  489. spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
  490. rtas_set_tce_bypass);
  491. spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
  492. return bus;
  493. }
  494. static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
  495. {
  496. DeviceClass *dc = DEVICE_CLASS(klass);
  497. dc->fw_name = "vdevice";
  498. }
  499. static const TypeInfo spapr_vio_bridge_info = {
  500. .name = TYPE_SPAPR_VIO_BRIDGE,
  501. .parent = TYPE_SYS_BUS_DEVICE,
  502. .class_init = spapr_vio_bridge_class_init,
  503. };
  504. const VMStateDescription vmstate_spapr_vio = {
  505. .name = "spapr_vio",
  506. .version_id = 1,
  507. .minimum_version_id = 1,
  508. .fields = (const VMStateField[]) {
  509. /* Sanity check */
  510. VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL),
  511. VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL),
  512. /* General VIO device state */
  513. VMSTATE_UINT64(signal_state, SpaprVioDevice),
  514. VMSTATE_UINT64(crq.qladdr, SpaprVioDevice),
  515. VMSTATE_UINT32(crq.qsize, SpaprVioDevice),
  516. VMSTATE_UINT32(crq.qnext, SpaprVioDevice),
  517. VMSTATE_END_OF_LIST()
  518. },
  519. };
  520. static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
  521. {
  522. DeviceClass *k = DEVICE_CLASS(klass);
  523. k->realize = spapr_vio_busdev_realize;
  524. device_class_set_legacy_reset(k, spapr_vio_busdev_reset);
  525. k->bus_type = TYPE_SPAPR_VIO_BUS;
  526. }
  527. static const TypeInfo spapr_vio_type_info = {
  528. .name = TYPE_VIO_SPAPR_DEVICE,
  529. .parent = TYPE_DEVICE,
  530. .instance_size = sizeof(SpaprVioDevice),
  531. .abstract = true,
  532. .class_size = sizeof(SpaprVioDeviceClass),
  533. .class_init = vio_spapr_device_class_init,
  534. };
  535. static void spapr_vio_register_types(void)
  536. {
  537. type_register_static(&spapr_vio_bus_info);
  538. type_register_static(&spapr_vio_bridge_info);
  539. type_register_static(&spapr_vio_type_info);
  540. }
  541. type_init(spapr_vio_register_types)
  542. static int compare_reg(const void *p1, const void *p2)
  543. {
  544. SpaprVioDevice const *dev1, *dev2;
  545. dev1 = (SpaprVioDevice *)*(DeviceState **)p1;
  546. dev2 = (SpaprVioDevice *)*(DeviceState **)p2;
  547. if (dev1->reg < dev2->reg) {
  548. return -1;
  549. }
  550. if (dev1->reg == dev2->reg) {
  551. return 0;
  552. }
  553. /* dev1->reg > dev2->reg */
  554. return 1;
  555. }
  556. void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt)
  557. {
  558. DeviceState *qdev, **qdevs;
  559. BusChild *kid;
  560. int i, num, ret = 0;
  561. int node;
  562. _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
  563. _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
  564. _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
  565. _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
  566. _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
  567. _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
  568. _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
  569. /* Count qdevs on the bus list */
  570. num = 0;
  571. QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
  572. num++;
  573. }
  574. /* Copy out into an array of pointers */
  575. qdevs = g_new(DeviceState *, num);
  576. num = 0;
  577. QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
  578. qdevs[num++] = kid->child;
  579. }
  580. /* Sort the array */
  581. qsort(qdevs, num, sizeof(qdev), compare_reg);
  582. /* Hack alert. Give the devices to libfdt in reverse order, we happen
  583. * to know that will mean they are in forward order in the tree. */
  584. for (i = num - 1; i >= 0; i--) {
  585. SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]);
  586. SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
  587. ret = vio_make_devnode(dev, fdt);
  588. if (ret < 0) {
  589. error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
  590. vdc->dt_name, dev->reg);
  591. exit(1);
  592. }
  593. }
  594. g_free(qdevs);
  595. }
  596. gchar *spapr_vio_stdout_path(SpaprVioBus *bus)
  597. {
  598. SpaprVioDevice *dev;
  599. g_autofree char *name = NULL;
  600. dev = spapr_vty_get_default(bus);
  601. if (!dev) {
  602. return NULL;
  603. }
  604. name = spapr_vio_get_dev_name(DEVICE(dev));
  605. return g_strdup_printf("/vdevice/%s", name);
  606. }