npcm7xx_mc.c 2.3 KB

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  1. /*
  2. * Nuvoton NPCM7xx Memory Controller stub
  3. *
  4. * Copyright 2020 Google LLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14. * for more details.
  15. */
  16. #include "qemu/osdep.h"
  17. #include "hw/mem/npcm7xx_mc.h"
  18. #include "qapi/error.h"
  19. #include "qemu/log.h"
  20. #include "qemu/module.h"
  21. #include "qemu/units.h"
  22. #define NPCM7XX_MC_REGS_SIZE (4 * KiB)
  23. static uint64_t npcm7xx_mc_read(void *opaque, hwaddr addr, unsigned int size)
  24. {
  25. /*
  26. * If bits 8..11 @ offset 0 are not zero, the boot block thinks the memory
  27. * controller has already been initialized and will skip DDR training.
  28. */
  29. if (addr == 0) {
  30. return 0x100;
  31. }
  32. qemu_log_mask(LOG_UNIMP, "%s: mostly unimplemented\n", __func__);
  33. return 0;
  34. }
  35. static void npcm7xx_mc_write(void *opaque, hwaddr addr, uint64_t v,
  36. unsigned int size)
  37. {
  38. qemu_log_mask(LOG_UNIMP, "%s: mostly unimplemented\n", __func__);
  39. }
  40. static const MemoryRegionOps npcm7xx_mc_ops = {
  41. .read = npcm7xx_mc_read,
  42. .write = npcm7xx_mc_write,
  43. .endianness = DEVICE_LITTLE_ENDIAN,
  44. .valid = {
  45. .min_access_size = 4,
  46. .max_access_size = 4,
  47. .unaligned = false,
  48. },
  49. };
  50. static void npcm7xx_mc_realize(DeviceState *dev, Error **errp)
  51. {
  52. NPCM7xxMCState *s = NPCM7XX_MC(dev);
  53. memory_region_init_io(&s->mmio, OBJECT(s), &npcm7xx_mc_ops, s, "regs",
  54. NPCM7XX_MC_REGS_SIZE);
  55. sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio);
  56. }
  57. static void npcm7xx_mc_class_init(ObjectClass *klass, void *data)
  58. {
  59. DeviceClass *dc = DEVICE_CLASS(klass);
  60. dc->desc = "NPCM7xx Memory Controller stub";
  61. dc->realize = npcm7xx_mc_realize;
  62. }
  63. static const TypeInfo npcm7xx_mc_types[] = {
  64. {
  65. .name = TYPE_NPCM7XX_MC,
  66. .parent = TYPE_SYS_BUS_DEVICE,
  67. .instance_size = sizeof(NPCM7xxMCState),
  68. .class_init = npcm7xx_mc_class_init,
  69. },
  70. };
  71. DEFINE_TYPES(npcm7xx_mc_types);