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x86-cpu.c 2.8 KB

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  1. /*
  2. * Copyright (c) 2003-2004 Fabrice Bellard
  3. * Copyright (c) 2019, 2024 Red Hat, Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #include "qemu/osdep.h"
  24. #include "system/whpx.h"
  25. #include "system/cpu-timers.h"
  26. #include "trace.h"
  27. #include "hw/i386/x86.h"
  28. #include "target/i386/cpu.h"
  29. #include "hw/intc/i8259.h"
  30. #include "hw/irq.h"
  31. #include "system/kvm.h"
  32. /* TSC handling */
  33. uint64_t cpu_get_tsc(CPUX86State *env)
  34. {
  35. return cpus_get_elapsed_ticks();
  36. }
  37. /* IRQ handling */
  38. static void pic_irq_request(void *opaque, int irq, int level)
  39. {
  40. CPUState *cs = first_cpu;
  41. X86CPU *cpu = X86_CPU(cs);
  42. trace_x86_pic_interrupt(irq, level);
  43. if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() &&
  44. !whpx_apic_in_platform()) {
  45. CPU_FOREACH(cs) {
  46. cpu = X86_CPU(cs);
  47. if (apic_accept_pic_intr(cpu->apic_state)) {
  48. apic_deliver_pic_intr(cpu->apic_state, level);
  49. }
  50. }
  51. } else {
  52. if (level) {
  53. cpu_interrupt(cs, CPU_INTERRUPT_HARD);
  54. } else {
  55. cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
  56. }
  57. }
  58. }
  59. qemu_irq x86_allocate_cpu_irq(void)
  60. {
  61. return qemu_allocate_irq(pic_irq_request, NULL, 0);
  62. }
  63. int cpu_get_pic_interrupt(CPUX86State *env)
  64. {
  65. X86CPU *cpu = env_archcpu(env);
  66. int intno;
  67. if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) {
  68. intno = apic_get_interrupt(cpu->apic_state);
  69. if (intno >= 0) {
  70. return intno;
  71. }
  72. /* read the irq from the PIC */
  73. if (!apic_accept_pic_intr(cpu->apic_state)) {
  74. return -1;
  75. }
  76. }
  77. intno = pic_read_irq(isa_pic);
  78. return intno;
  79. }
  80. DeviceState *cpu_get_current_apic(void)
  81. {
  82. if (current_cpu) {
  83. X86CPU *cpu = X86_CPU(current_cpu);
  84. return cpu->apic_state;
  85. } else {
  86. return NULL;
  87. }
  88. }