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bcm2835_i2c.c 8.3 KB

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  1. /*
  2. * Broadcom Serial Controller (BSC)
  3. *
  4. * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
  5. *
  6. * SPDX-License-Identifier: MIT
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include "qemu/osdep.h"
  27. #include "qemu/log.h"
  28. #include "hw/i2c/bcm2835_i2c.h"
  29. #include "hw/irq.h"
  30. #include "migration/vmstate.h"
  31. static void bcm2835_i2c_update_interrupt(BCM2835I2CState *s)
  32. {
  33. int do_interrupt = 0;
  34. /* Interrupt on RXR (Needs reading) */
  35. if (s->c & BCM2835_I2C_C_INTR && s->s & BCM2835_I2C_S_RXR) {
  36. do_interrupt = 1;
  37. }
  38. /* Interrupt on TXW (Needs writing) */
  39. if (s->c & BCM2835_I2C_C_INTT && s->s & BCM2835_I2C_S_TXW) {
  40. do_interrupt = 1;
  41. }
  42. /* Interrupt on DONE (Transfer complete) */
  43. if (s->c & BCM2835_I2C_C_INTD && s->s & BCM2835_I2C_S_DONE) {
  44. do_interrupt = 1;
  45. }
  46. qemu_set_irq(s->irq, do_interrupt);
  47. }
  48. static void bcm2835_i2c_begin_transfer(BCM2835I2CState *s)
  49. {
  50. int direction = s->c & BCM2835_I2C_C_READ;
  51. if (i2c_start_transfer(s->bus, s->a, direction)) {
  52. s->s |= BCM2835_I2C_S_ERR;
  53. }
  54. s->s |= BCM2835_I2C_S_TA;
  55. if (direction) {
  56. s->s |= BCM2835_I2C_S_RXR | BCM2835_I2C_S_RXD;
  57. } else {
  58. s->s |= BCM2835_I2C_S_TXW;
  59. }
  60. }
  61. static void bcm2835_i2c_finish_transfer(BCM2835I2CState *s)
  62. {
  63. /*
  64. * STOP is sent when DLEN counts down to zero.
  65. *
  66. * https://github.com/torvalds/linux/blob/v6.7/drivers/i2c/busses/i2c-bcm2835.c#L223-L261
  67. * It is possible to initiate repeated starts on real hardware.
  68. * However, this requires sending another ST request before the bytes in
  69. * TX FIFO are shifted out.
  70. *
  71. * This is not emulated currently.
  72. */
  73. i2c_end_transfer(s->bus);
  74. s->s |= BCM2835_I2C_S_DONE;
  75. /* Ensure RXD is cleared, otherwise the driver registers an error */
  76. s->s &= ~(BCM2835_I2C_S_TA | BCM2835_I2C_S_RXR |
  77. BCM2835_I2C_S_TXW | BCM2835_I2C_S_RXD);
  78. }
  79. static uint64_t bcm2835_i2c_read(void *opaque, hwaddr addr, unsigned size)
  80. {
  81. BCM2835I2CState *s = opaque;
  82. uint32_t readval = 0;
  83. switch (addr) {
  84. case BCM2835_I2C_C:
  85. readval = s->c;
  86. break;
  87. case BCM2835_I2C_S:
  88. readval = s->s;
  89. break;
  90. case BCM2835_I2C_DLEN:
  91. readval = s->dlen;
  92. break;
  93. case BCM2835_I2C_A:
  94. readval = s->a;
  95. break;
  96. case BCM2835_I2C_FIFO:
  97. /* We receive I2C messages directly instead of using FIFOs */
  98. if (s->s & BCM2835_I2C_S_TA) {
  99. readval = i2c_recv(s->bus);
  100. s->dlen -= 1;
  101. if (s->dlen == 0) {
  102. bcm2835_i2c_finish_transfer(s);
  103. }
  104. }
  105. bcm2835_i2c_update_interrupt(s);
  106. break;
  107. case BCM2835_I2C_DIV:
  108. readval = s->div;
  109. break;
  110. case BCM2835_I2C_DEL:
  111. readval = s->del;
  112. break;
  113. case BCM2835_I2C_CLKT:
  114. readval = s->clkt;
  115. break;
  116. default:
  117. qemu_log_mask(LOG_GUEST_ERROR,
  118. "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr);
  119. }
  120. return readval;
  121. }
  122. static void bcm2835_i2c_write(void *opaque, hwaddr addr,
  123. uint64_t value, unsigned int size)
  124. {
  125. BCM2835I2CState *s = opaque;
  126. uint32_t writeval = value;
  127. switch (addr) {
  128. case BCM2835_I2C_C:
  129. /* ST is a one-shot operation; it must read back as 0 */
  130. s->c = writeval & ~BCM2835_I2C_C_ST;
  131. /* Start transfer */
  132. if (writeval & (BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN)) {
  133. bcm2835_i2c_begin_transfer(s);
  134. /*
  135. * Handle special case where transfer starts with zero data length.
  136. * Required for zero length i2c quick messages to work.
  137. */
  138. if (s->dlen == 0) {
  139. bcm2835_i2c_finish_transfer(s);
  140. }
  141. }
  142. bcm2835_i2c_update_interrupt(s);
  143. break;
  144. case BCM2835_I2C_S:
  145. if (writeval & BCM2835_I2C_S_DONE && s->s & BCM2835_I2C_S_DONE) {
  146. /* When DONE is cleared, DLEN should read last written value. */
  147. s->dlen = s->last_dlen;
  148. }
  149. /* Clear DONE, CLKT and ERR by writing 1 */
  150. s->s &= ~(writeval & (BCM2835_I2C_S_DONE |
  151. BCM2835_I2C_S_ERR | BCM2835_I2C_S_CLKT));
  152. break;
  153. case BCM2835_I2C_DLEN:
  154. s->dlen = writeval;
  155. s->last_dlen = writeval;
  156. break;
  157. case BCM2835_I2C_A:
  158. s->a = writeval;
  159. break;
  160. case BCM2835_I2C_FIFO:
  161. /* We send I2C messages directly instead of using FIFOs */
  162. if (s->s & BCM2835_I2C_S_TA) {
  163. if (s->s & BCM2835_I2C_S_TXD) {
  164. if (!i2c_send(s->bus, writeval & 0xff)) {
  165. s->dlen -= 1;
  166. } else {
  167. s->s |= BCM2835_I2C_S_ERR;
  168. }
  169. }
  170. if (s->dlen == 0) {
  171. bcm2835_i2c_finish_transfer(s);
  172. }
  173. }
  174. bcm2835_i2c_update_interrupt(s);
  175. break;
  176. case BCM2835_I2C_DIV:
  177. s->div = writeval;
  178. break;
  179. case BCM2835_I2C_DEL:
  180. s->del = writeval;
  181. break;
  182. case BCM2835_I2C_CLKT:
  183. s->clkt = writeval;
  184. break;
  185. default:
  186. qemu_log_mask(LOG_GUEST_ERROR,
  187. "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr);
  188. }
  189. }
  190. static const MemoryRegionOps bcm2835_i2c_ops = {
  191. .read = bcm2835_i2c_read,
  192. .write = bcm2835_i2c_write,
  193. .endianness = DEVICE_NATIVE_ENDIAN,
  194. .valid = {
  195. .min_access_size = 4,
  196. .max_access_size = 4,
  197. },
  198. };
  199. static void bcm2835_i2c_realize(DeviceState *dev, Error **errp)
  200. {
  201. BCM2835I2CState *s = BCM2835_I2C(dev);
  202. s->bus = i2c_init_bus(dev, NULL);
  203. memory_region_init_io(&s->iomem, OBJECT(dev), &bcm2835_i2c_ops, s,
  204. TYPE_BCM2835_I2C, 0x24);
  205. sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
  206. sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq);
  207. }
  208. static void bcm2835_i2c_reset(DeviceState *dev)
  209. {
  210. BCM2835I2CState *s = BCM2835_I2C(dev);
  211. /* Reset values according to BCM2835 Peripheral Documentation */
  212. s->c = 0x0;
  213. s->s = BCM2835_I2C_S_TXD | BCM2835_I2C_S_TXE;
  214. s->dlen = 0x0;
  215. s->a = 0x0;
  216. s->div = 0x5dc;
  217. s->del = 0x00300030;
  218. s->clkt = 0x40;
  219. }
  220. static const VMStateDescription vmstate_bcm2835_i2c = {
  221. .name = TYPE_BCM2835_I2C,
  222. .version_id = 1,
  223. .minimum_version_id = 1,
  224. .fields = (const VMStateField[]) {
  225. VMSTATE_UINT32(c, BCM2835I2CState),
  226. VMSTATE_UINT32(s, BCM2835I2CState),
  227. VMSTATE_UINT32(dlen, BCM2835I2CState),
  228. VMSTATE_UINT32(a, BCM2835I2CState),
  229. VMSTATE_UINT32(div, BCM2835I2CState),
  230. VMSTATE_UINT32(del, BCM2835I2CState),
  231. VMSTATE_UINT32(clkt, BCM2835I2CState),
  232. VMSTATE_UINT32(last_dlen, BCM2835I2CState),
  233. VMSTATE_END_OF_LIST()
  234. }
  235. };
  236. static void bcm2835_i2c_class_init(ObjectClass *klass, void *data)
  237. {
  238. DeviceClass *dc = DEVICE_CLASS(klass);
  239. device_class_set_legacy_reset(dc, bcm2835_i2c_reset);
  240. dc->realize = bcm2835_i2c_realize;
  241. dc->vmsd = &vmstate_bcm2835_i2c;
  242. }
  243. static const TypeInfo bcm2835_i2c_info = {
  244. .name = TYPE_BCM2835_I2C,
  245. .parent = TYPE_SYS_BUS_DEVICE,
  246. .instance_size = sizeof(BCM2835I2CState),
  247. .class_init = bcm2835_i2c_class_init,
  248. };
  249. static void bcm2835_i2c_register_types(void)
  250. {
  251. type_register_static(&bcm2835_i2c_info);
  252. }
  253. type_init(bcm2835_i2c_register_types)