pca9554.c 8.4 KB

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  1. /*
  2. * PCA9554 I/O port
  3. *
  4. * Copyright (c) 2023, IBM Corporation.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0-or-later
  7. */
  8. #include "qemu/osdep.h"
  9. #include "qemu/log.h"
  10. #include "qemu/module.h"
  11. #include "qemu/bitops.h"
  12. #include "hw/qdev-properties.h"
  13. #include "hw/gpio/pca9554.h"
  14. #include "hw/gpio/pca9554_regs.h"
  15. #include "hw/irq.h"
  16. #include "migration/vmstate.h"
  17. #include "qapi/error.h"
  18. #include "qapi/visitor.h"
  19. #include "trace.h"
  20. #include "qom/object.h"
  21. struct PCA9554Class {
  22. /*< private >*/
  23. I2CSlaveClass parent_class;
  24. /*< public >*/
  25. };
  26. typedef struct PCA9554Class PCA9554Class;
  27. DECLARE_CLASS_CHECKERS(PCA9554Class, PCA9554,
  28. TYPE_PCA9554)
  29. #define PCA9554_PIN_LOW 0x0
  30. #define PCA9554_PIN_HIZ 0x1
  31. static const char *pin_state[] = {"low", "high"};
  32. static void pca9554_update_pin_input(PCA9554State *s)
  33. {
  34. int i;
  35. uint8_t config = s->regs[PCA9554_CONFIG];
  36. uint8_t output = s->regs[PCA9554_OUTPUT];
  37. uint8_t internal_state = config | output;
  38. for (i = 0; i < PCA9554_PIN_COUNT; i++) {
  39. uint8_t bit_mask = 1 << i;
  40. uint8_t internal_pin_state = (internal_state >> i) & 0x1;
  41. uint8_t old_value = s->regs[PCA9554_INPUT] & bit_mask;
  42. uint8_t new_value;
  43. switch (internal_pin_state) {
  44. case PCA9554_PIN_LOW:
  45. s->regs[PCA9554_INPUT] &= ~bit_mask;
  46. break;
  47. case PCA9554_PIN_HIZ:
  48. /*
  49. * pullup sets it to a logical 1 unless
  50. * external device drives it low.
  51. */
  52. if (s->ext_state[i] == PCA9554_PIN_LOW) {
  53. s->regs[PCA9554_INPUT] &= ~bit_mask;
  54. } else {
  55. s->regs[PCA9554_INPUT] |= bit_mask;
  56. }
  57. break;
  58. default:
  59. break;
  60. }
  61. /* update irq state only if pin state changed */
  62. new_value = s->regs[PCA9554_INPUT] & bit_mask;
  63. if (new_value != old_value) {
  64. if (new_value) {
  65. /* changed from 0 to 1 */
  66. qemu_set_irq(s->gpio_out[i], 1);
  67. } else {
  68. /* changed from 1 to 0 */
  69. qemu_set_irq(s->gpio_out[i], 0);
  70. }
  71. }
  72. }
  73. }
  74. static uint8_t pca9554_read(PCA9554State *s, uint8_t reg)
  75. {
  76. switch (reg) {
  77. case PCA9554_INPUT:
  78. return s->regs[PCA9554_INPUT] ^ s->regs[PCA9554_POLARITY];
  79. case PCA9554_OUTPUT:
  80. case PCA9554_POLARITY:
  81. case PCA9554_CONFIG:
  82. return s->regs[reg];
  83. default:
  84. qemu_log_mask(LOG_GUEST_ERROR, "%s: unexpected read to register %d\n",
  85. __func__, reg);
  86. return 0xFF;
  87. }
  88. }
  89. static void pca9554_write(PCA9554State *s, uint8_t reg, uint8_t data)
  90. {
  91. switch (reg) {
  92. case PCA9554_OUTPUT:
  93. case PCA9554_CONFIG:
  94. s->regs[reg] = data;
  95. pca9554_update_pin_input(s);
  96. break;
  97. case PCA9554_POLARITY:
  98. s->regs[reg] = data;
  99. break;
  100. case PCA9554_INPUT:
  101. default:
  102. qemu_log_mask(LOG_GUEST_ERROR, "%s: unexpected write to register %d\n",
  103. __func__, reg);
  104. }
  105. }
  106. static uint8_t pca9554_recv(I2CSlave *i2c)
  107. {
  108. PCA9554State *s = PCA9554(i2c);
  109. uint8_t ret;
  110. ret = pca9554_read(s, s->pointer & 0x3);
  111. return ret;
  112. }
  113. static int pca9554_send(I2CSlave *i2c, uint8_t data)
  114. {
  115. PCA9554State *s = PCA9554(i2c);
  116. /* First byte sent by is the register address */
  117. if (s->len == 0) {
  118. s->pointer = data;
  119. s->len++;
  120. } else {
  121. pca9554_write(s, s->pointer & 0x3, data);
  122. }
  123. return 0;
  124. }
  125. static int pca9554_event(I2CSlave *i2c, enum i2c_event event)
  126. {
  127. PCA9554State *s = PCA9554(i2c);
  128. s->len = 0;
  129. return 0;
  130. }
  131. static void pca9554_get_pin(Object *obj, Visitor *v, const char *name,
  132. void *opaque, Error **errp)
  133. {
  134. PCA9554State *s = PCA9554(obj);
  135. int pin, rc;
  136. uint8_t state;
  137. rc = sscanf(name, "pin%2d", &pin);
  138. if (rc != 1) {
  139. error_setg(errp, "%s: error reading %s", __func__, name);
  140. return;
  141. }
  142. if (pin < 0 || pin >= PCA9554_PIN_COUNT) {
  143. error_setg(errp, "%s invalid pin %s", __func__, name);
  144. return;
  145. }
  146. state = pca9554_read(s, PCA9554_CONFIG);
  147. state |= pca9554_read(s, PCA9554_OUTPUT);
  148. state = (state >> pin) & 0x1;
  149. visit_type_str(v, name, (char **)&pin_state[state], errp);
  150. }
  151. static void pca9554_set_pin(Object *obj, Visitor *v, const char *name,
  152. void *opaque, Error **errp)
  153. {
  154. PCA9554State *s = PCA9554(obj);
  155. int pin, rc, val;
  156. uint8_t state, mask;
  157. char *state_str;
  158. if (!visit_type_str(v, name, &state_str, errp)) {
  159. return;
  160. }
  161. rc = sscanf(name, "pin%2d", &pin);
  162. if (rc != 1) {
  163. error_setg(errp, "%s: error reading %s", __func__, name);
  164. return;
  165. }
  166. if (pin < 0 || pin >= PCA9554_PIN_COUNT) {
  167. error_setg(errp, "%s invalid pin %s", __func__, name);
  168. return;
  169. }
  170. for (state = 0; state < ARRAY_SIZE(pin_state); state++) {
  171. if (!strcmp(state_str, pin_state[state])) {
  172. break;
  173. }
  174. }
  175. if (state >= ARRAY_SIZE(pin_state)) {
  176. error_setg(errp, "%s invalid pin state %s", __func__, state_str);
  177. return;
  178. }
  179. /* First, modify the output register bit */
  180. val = pca9554_read(s, PCA9554_OUTPUT);
  181. mask = 0x1 << pin;
  182. if (state == PCA9554_PIN_LOW) {
  183. val &= ~(mask);
  184. } else {
  185. val |= mask;
  186. }
  187. pca9554_write(s, PCA9554_OUTPUT, val);
  188. /* Then, clear the config register bit for output mode */
  189. val = pca9554_read(s, PCA9554_CONFIG);
  190. val &= ~mask;
  191. pca9554_write(s, PCA9554_CONFIG, val);
  192. }
  193. static const VMStateDescription pca9554_vmstate = {
  194. .name = "PCA9554",
  195. .version_id = 0,
  196. .minimum_version_id = 0,
  197. .fields = (VMStateField[]) {
  198. VMSTATE_UINT8(len, PCA9554State),
  199. VMSTATE_UINT8(pointer, PCA9554State),
  200. VMSTATE_UINT8_ARRAY(regs, PCA9554State, PCA9554_NR_REGS),
  201. VMSTATE_UINT8_ARRAY(ext_state, PCA9554State, PCA9554_PIN_COUNT),
  202. VMSTATE_I2C_SLAVE(i2c, PCA9554State),
  203. VMSTATE_END_OF_LIST()
  204. }
  205. };
  206. static void pca9554_reset(DeviceState *dev)
  207. {
  208. PCA9554State *s = PCA9554(dev);
  209. s->regs[PCA9554_INPUT] = 0xFF;
  210. s->regs[PCA9554_OUTPUT] = 0xFF;
  211. s->regs[PCA9554_POLARITY] = 0x0; /* No pins are inverted */
  212. s->regs[PCA9554_CONFIG] = 0xFF; /* All pins are inputs */
  213. memset(s->ext_state, PCA9554_PIN_HIZ, PCA9554_PIN_COUNT);
  214. pca9554_update_pin_input(s);
  215. s->pointer = 0x0;
  216. s->len = 0;
  217. }
  218. static void pca9554_initfn(Object *obj)
  219. {
  220. int pin;
  221. for (pin = 0; pin < PCA9554_PIN_COUNT; pin++) {
  222. char *name;
  223. name = g_strdup_printf("pin%d", pin);
  224. object_property_add(obj, name, "bool", pca9554_get_pin, pca9554_set_pin,
  225. NULL, NULL);
  226. g_free(name);
  227. }
  228. }
  229. static void pca9554_set_ext_state(PCA9554State *s, int pin, int level)
  230. {
  231. if (s->ext_state[pin] != level) {
  232. s->ext_state[pin] = level;
  233. pca9554_update_pin_input(s);
  234. }
  235. }
  236. static void pca9554_gpio_in_handler(void *opaque, int pin, int level)
  237. {
  238. PCA9554State *s = PCA9554(opaque);
  239. assert((pin >= 0) && (pin < PCA9554_PIN_COUNT));
  240. pca9554_set_ext_state(s, pin, level);
  241. }
  242. static void pca9554_realize(DeviceState *dev, Error **errp)
  243. {
  244. PCA9554State *s = PCA9554(dev);
  245. if (!s->description) {
  246. s->description = g_strdup("pca9554");
  247. }
  248. qdev_init_gpio_out(dev, s->gpio_out, PCA9554_PIN_COUNT);
  249. qdev_init_gpio_in(dev, pca9554_gpio_in_handler, PCA9554_PIN_COUNT);
  250. }
  251. static const Property pca9554_properties[] = {
  252. DEFINE_PROP_STRING("description", PCA9554State, description),
  253. };
  254. static void pca9554_class_init(ObjectClass *klass, void *data)
  255. {
  256. DeviceClass *dc = DEVICE_CLASS(klass);
  257. I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
  258. k->event = pca9554_event;
  259. k->recv = pca9554_recv;
  260. k->send = pca9554_send;
  261. dc->realize = pca9554_realize;
  262. device_class_set_legacy_reset(dc, pca9554_reset);
  263. dc->vmsd = &pca9554_vmstate;
  264. device_class_set_props(dc, pca9554_properties);
  265. }
  266. static const TypeInfo pca9554_info = {
  267. .name = TYPE_PCA9554,
  268. .parent = TYPE_I2C_SLAVE,
  269. .instance_init = pca9554_initfn,
  270. .instance_size = sizeof(PCA9554State),
  271. .class_init = pca9554_class_init,
  272. .class_size = sizeof(PCA9554Class),
  273. .abstract = false,
  274. };
  275. static void pca9554_register_types(void)
  276. {
  277. type_register_static(&pca9554_info);
  278. }
  279. type_init(pca9554_register_types)