target_arch_cpu.h 6.5 KB

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  1. /*
  2. * i386 cpu init and loop
  3. *
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef TARGET_ARCH_CPU_H
  19. #define TARGET_ARCH_CPU_H
  20. #include "target_arch.h"
  21. #include "signal-common.h"
  22. #define TARGET_DEFAULT_CPU_MODEL "qemu32"
  23. static inline void target_cpu_init(CPUX86State *env,
  24. struct target_pt_regs *regs)
  25. {
  26. uint64_t *gdt_table;
  27. env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
  28. env->hflags |= HF_PE_MASK | HF_CPL_MASK;
  29. if (env->features[FEAT_1_EDX] & CPUID_SSE) {
  30. env->cr[4] |= CR4_OSFXSR_MASK;
  31. env->hflags |= HF_OSFXSR_MASK;
  32. }
  33. /* flags setup : we activate the IRQs by default as in user mode */
  34. env->eflags |= IF_MASK;
  35. /* register setup */
  36. env->regs[R_EAX] = regs->eax;
  37. env->regs[R_EBX] = regs->ebx;
  38. env->regs[R_ECX] = regs->ecx;
  39. env->regs[R_EDX] = regs->edx;
  40. env->regs[R_ESI] = regs->esi;
  41. env->regs[R_EDI] = regs->edi;
  42. env->regs[R_EBP] = regs->ebp;
  43. env->regs[R_ESP] = regs->esp;
  44. env->eip = regs->eip;
  45. /* interrupt setup */
  46. env->idt.limit = 255;
  47. env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
  48. PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
  49. bsd_i386_set_idt_base(env->idt.base);
  50. bsd_i386_set_idt(0, 0);
  51. bsd_i386_set_idt(1, 0);
  52. bsd_i386_set_idt(2, 0);
  53. bsd_i386_set_idt(3, 3);
  54. bsd_i386_set_idt(4, 3);
  55. bsd_i386_set_idt(5, 0);
  56. bsd_i386_set_idt(6, 0);
  57. bsd_i386_set_idt(7, 0);
  58. bsd_i386_set_idt(8, 0);
  59. bsd_i386_set_idt(9, 0);
  60. bsd_i386_set_idt(10, 0);
  61. bsd_i386_set_idt(11, 0);
  62. bsd_i386_set_idt(12, 0);
  63. bsd_i386_set_idt(13, 0);
  64. bsd_i386_set_idt(14, 0);
  65. bsd_i386_set_idt(15, 0);
  66. bsd_i386_set_idt(16, 0);
  67. bsd_i386_set_idt(17, 0);
  68. bsd_i386_set_idt(18, 0);
  69. bsd_i386_set_idt(19, 0);
  70. bsd_i386_set_idt(0x80, 3);
  71. /* segment setup */
  72. env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
  73. PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
  74. env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
  75. gdt_table = g2h_untagged(env->gdt.base);
  76. bsd_i386_write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
  77. DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
  78. (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
  79. bsd_i386_write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
  80. DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
  81. (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
  82. cpu_x86_load_seg(env, R_CS, __USER_CS);
  83. cpu_x86_load_seg(env, R_SS, __USER_DS);
  84. cpu_x86_load_seg(env, R_DS, __USER_DS);
  85. cpu_x86_load_seg(env, R_ES, __USER_DS);
  86. cpu_x86_load_seg(env, R_FS, __USER_DS);
  87. cpu_x86_load_seg(env, R_GS, __USER_DS);
  88. /* This hack makes Wine work... */
  89. env->segs[R_FS].selector = 0;
  90. }
  91. static inline G_NORETURN void target_cpu_loop(CPUX86State *env)
  92. {
  93. CPUState *cs = env_cpu(env);
  94. int trapnr;
  95. abi_ulong pc;
  96. /* target_siginfo_t info; */
  97. for (;;) {
  98. cpu_exec_start(cs);
  99. trapnr = cpu_exec(cs);
  100. cpu_exec_end(cs);
  101. process_queued_cpu_work(cs);
  102. switch (trapnr) {
  103. case 0x80: {
  104. /* syscall from int $0x80 */
  105. abi_ulong params = (abi_ulong) env->regs[R_ESP] +
  106. sizeof(int32_t);
  107. int32_t syscall_nr = env->regs[R_EAX];
  108. int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
  109. if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
  110. get_user_s32(syscall_nr, params);
  111. params += sizeof(int32_t);
  112. } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
  113. get_user_s32(syscall_nr, params);
  114. params += sizeof(int64_t);
  115. }
  116. get_user_s32(arg1, params);
  117. params += sizeof(int32_t);
  118. get_user_s32(arg2, params);
  119. params += sizeof(int32_t);
  120. get_user_s32(arg3, params);
  121. params += sizeof(int32_t);
  122. get_user_s32(arg4, params);
  123. params += sizeof(int32_t);
  124. get_user_s32(arg5, params);
  125. params += sizeof(int32_t);
  126. get_user_s32(arg6, params);
  127. params += sizeof(int32_t);
  128. get_user_s32(arg7, params);
  129. params += sizeof(int32_t);
  130. get_user_s32(arg8, params);
  131. env->regs[R_EAX] = do_freebsd_syscall(env,
  132. syscall_nr,
  133. arg1,
  134. arg2,
  135. arg3,
  136. arg4,
  137. arg5,
  138. arg6,
  139. arg7,
  140. arg8);
  141. }
  142. if (((abi_ulong)env->regs[R_EAX]) >= (abi_ulong)(-515)) {
  143. env->regs[R_EAX] = -env->regs[R_EAX];
  144. env->eflags |= CC_C;
  145. } else {
  146. env->eflags &= ~CC_C;
  147. }
  148. break;
  149. case EXCP_SYSCALL:
  150. /* doesn't do anything */
  151. break;
  152. case EXCP_INTERRUPT:
  153. /* just indicate that signals should be handled asap */
  154. break;
  155. case EXCP_ATOMIC:
  156. cpu_exec_step_atomic(cs);
  157. break;
  158. default:
  159. pc = env->segs[R_CS].base + env->eip;
  160. fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - "
  161. "aborting\n", (long)pc, trapnr);
  162. abort();
  163. }
  164. process_pending_signals(env);
  165. }
  166. }
  167. static inline void target_cpu_clone_regs(CPUX86State *env, target_ulong newsp)
  168. {
  169. if (newsp) {
  170. env->regs[R_ESP] = newsp;
  171. }
  172. env->regs[R_EAX] = 0;
  173. }
  174. static inline void target_cpu_reset(CPUArchState *env)
  175. {
  176. cpu_reset(env_cpu(env));
  177. }
  178. #endif /* TARGET_ARCH_CPU_H */