smbios.c 47 KB

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  1. /*
  2. * SMBIOS Support
  3. *
  4. * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
  5. * Copyright (C) 2013 Red Hat, Inc.
  6. *
  7. * Authors:
  8. * Alex Williamson <alex.williamson@hp.com>
  9. * Markus Armbruster <armbru@redhat.com>
  10. *
  11. * This work is licensed under the terms of the GNU GPL, version 2. See
  12. * the COPYING file in the top-level directory.
  13. *
  14. * Contributions after 2012-01-13 are licensed under the terms of the
  15. * GNU GPL, version 2 or (at your option) any later version.
  16. */
  17. #include "qemu/osdep.h"
  18. #include "qemu/units.h"
  19. #include "qapi/error.h"
  20. #include "qemu/config-file.h"
  21. #include "qemu/error-report.h"
  22. #include "qemu/module.h"
  23. #include "qemu/option.h"
  24. #include "sysemu/sysemu.h"
  25. #include "qemu/uuid.h"
  26. #include "hw/firmware/smbios.h"
  27. #include "hw/loader.h"
  28. #include "hw/boards.h"
  29. #include "hw/pci/pci_bus.h"
  30. #include "hw/pci/pci_device.h"
  31. #include "smbios_build.h"
  32. /* legacy structures and constants for <= 2.0 machines */
  33. struct smbios_header {
  34. uint16_t length;
  35. uint8_t type;
  36. } QEMU_PACKED;
  37. struct smbios_field {
  38. struct smbios_header header;
  39. uint8_t type;
  40. uint16_t offset;
  41. uint8_t data[];
  42. } QEMU_PACKED;
  43. struct smbios_table {
  44. struct smbios_header header;
  45. uint8_t data[];
  46. } QEMU_PACKED;
  47. #define SMBIOS_FIELD_ENTRY 0
  48. #define SMBIOS_TABLE_ENTRY 1
  49. static uint8_t *smbios_entries;
  50. static size_t smbios_entries_len;
  51. static bool smbios_legacy = true;
  52. static bool smbios_uuid_encoded = true;
  53. /* end: legacy structures & constants for <= 2.0 machines */
  54. uint8_t *smbios_tables;
  55. size_t smbios_tables_len;
  56. unsigned smbios_table_max;
  57. unsigned smbios_table_cnt;
  58. static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
  59. static SmbiosEntryPoint ep;
  60. static int smbios_type4_count = 0;
  61. static bool smbios_immutable;
  62. static bool smbios_have_defaults;
  63. static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets;
  64. static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1);
  65. static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1);
  66. static struct {
  67. const char *vendor, *version, *date;
  68. bool have_major_minor, uefi;
  69. uint8_t major, minor;
  70. } type0;
  71. static struct {
  72. const char *manufacturer, *product, *version, *serial, *sku, *family;
  73. /* uuid is in qemu_uuid */
  74. } type1;
  75. static struct {
  76. const char *manufacturer, *product, *version, *serial, *asset, *location;
  77. } type2;
  78. static struct {
  79. const char *manufacturer, *version, *serial, *asset, *sku;
  80. } type3;
  81. /*
  82. * SVVP requires max_speed and current_speed to be set and not being
  83. * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the
  84. * default value to 2000MHz as we did before.
  85. */
  86. #define DEFAULT_CPU_SPEED 2000
  87. static struct {
  88. const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part;
  89. uint64_t max_speed;
  90. uint64_t current_speed;
  91. uint64_t processor_id;
  92. } type4 = {
  93. .max_speed = DEFAULT_CPU_SPEED,
  94. .current_speed = DEFAULT_CPU_SPEED,
  95. .processor_id = 0,
  96. };
  97. struct type8_instance {
  98. const char *internal_reference, *external_reference;
  99. uint8_t connector_type, port_type;
  100. QTAILQ_ENTRY(type8_instance) next;
  101. };
  102. static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8);
  103. static struct {
  104. size_t nvalues;
  105. char **values;
  106. } type11;
  107. static struct {
  108. const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part;
  109. uint16_t speed;
  110. } type17;
  111. static QEnumLookup type41_kind_lookup = {
  112. .array = (const char *const[]) {
  113. "other",
  114. "unknown",
  115. "video",
  116. "scsi",
  117. "ethernet",
  118. "tokenring",
  119. "sound",
  120. "pata",
  121. "sata",
  122. "sas",
  123. },
  124. .size = 10
  125. };
  126. struct type41_instance {
  127. const char *designation, *pcidev;
  128. uint8_t instance, kind;
  129. QTAILQ_ENTRY(type41_instance) next;
  130. };
  131. static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41);
  132. static QemuOptsList qemu_smbios_opts = {
  133. .name = "smbios",
  134. .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head),
  135. .desc = {
  136. /*
  137. * no elements => accept any params
  138. * validation will happen later
  139. */
  140. { /* end of list */ }
  141. }
  142. };
  143. static const QemuOptDesc qemu_smbios_file_opts[] = {
  144. {
  145. .name = "file",
  146. .type = QEMU_OPT_STRING,
  147. .help = "binary file containing an SMBIOS element",
  148. },
  149. { /* end of list */ }
  150. };
  151. static const QemuOptDesc qemu_smbios_type0_opts[] = {
  152. {
  153. .name = "type",
  154. .type = QEMU_OPT_NUMBER,
  155. .help = "SMBIOS element type",
  156. },{
  157. .name = "vendor",
  158. .type = QEMU_OPT_STRING,
  159. .help = "vendor name",
  160. },{
  161. .name = "version",
  162. .type = QEMU_OPT_STRING,
  163. .help = "version number",
  164. },{
  165. .name = "date",
  166. .type = QEMU_OPT_STRING,
  167. .help = "release date",
  168. },{
  169. .name = "release",
  170. .type = QEMU_OPT_STRING,
  171. .help = "revision number",
  172. },{
  173. .name = "uefi",
  174. .type = QEMU_OPT_BOOL,
  175. .help = "uefi support",
  176. },
  177. { /* end of list */ }
  178. };
  179. static const QemuOptDesc qemu_smbios_type1_opts[] = {
  180. {
  181. .name = "type",
  182. .type = QEMU_OPT_NUMBER,
  183. .help = "SMBIOS element type",
  184. },{
  185. .name = "manufacturer",
  186. .type = QEMU_OPT_STRING,
  187. .help = "manufacturer name",
  188. },{
  189. .name = "product",
  190. .type = QEMU_OPT_STRING,
  191. .help = "product name",
  192. },{
  193. .name = "version",
  194. .type = QEMU_OPT_STRING,
  195. .help = "version number",
  196. },{
  197. .name = "serial",
  198. .type = QEMU_OPT_STRING,
  199. .help = "serial number",
  200. },{
  201. .name = "uuid",
  202. .type = QEMU_OPT_STRING,
  203. .help = "UUID",
  204. },{
  205. .name = "sku",
  206. .type = QEMU_OPT_STRING,
  207. .help = "SKU number",
  208. },{
  209. .name = "family",
  210. .type = QEMU_OPT_STRING,
  211. .help = "family name",
  212. },
  213. { /* end of list */ }
  214. };
  215. static const QemuOptDesc qemu_smbios_type2_opts[] = {
  216. {
  217. .name = "type",
  218. .type = QEMU_OPT_NUMBER,
  219. .help = "SMBIOS element type",
  220. },{
  221. .name = "manufacturer",
  222. .type = QEMU_OPT_STRING,
  223. .help = "manufacturer name",
  224. },{
  225. .name = "product",
  226. .type = QEMU_OPT_STRING,
  227. .help = "product name",
  228. },{
  229. .name = "version",
  230. .type = QEMU_OPT_STRING,
  231. .help = "version number",
  232. },{
  233. .name = "serial",
  234. .type = QEMU_OPT_STRING,
  235. .help = "serial number",
  236. },{
  237. .name = "asset",
  238. .type = QEMU_OPT_STRING,
  239. .help = "asset tag number",
  240. },{
  241. .name = "location",
  242. .type = QEMU_OPT_STRING,
  243. .help = "location in chassis",
  244. },
  245. { /* end of list */ }
  246. };
  247. static const QemuOptDesc qemu_smbios_type3_opts[] = {
  248. {
  249. .name = "type",
  250. .type = QEMU_OPT_NUMBER,
  251. .help = "SMBIOS element type",
  252. },{
  253. .name = "manufacturer",
  254. .type = QEMU_OPT_STRING,
  255. .help = "manufacturer name",
  256. },{
  257. .name = "version",
  258. .type = QEMU_OPT_STRING,
  259. .help = "version number",
  260. },{
  261. .name = "serial",
  262. .type = QEMU_OPT_STRING,
  263. .help = "serial number",
  264. },{
  265. .name = "asset",
  266. .type = QEMU_OPT_STRING,
  267. .help = "asset tag number",
  268. },{
  269. .name = "sku",
  270. .type = QEMU_OPT_STRING,
  271. .help = "SKU number",
  272. },
  273. { /* end of list */ }
  274. };
  275. static const QemuOptDesc qemu_smbios_type4_opts[] = {
  276. {
  277. .name = "type",
  278. .type = QEMU_OPT_NUMBER,
  279. .help = "SMBIOS element type",
  280. },{
  281. .name = "sock_pfx",
  282. .type = QEMU_OPT_STRING,
  283. .help = "socket designation string prefix",
  284. },{
  285. .name = "manufacturer",
  286. .type = QEMU_OPT_STRING,
  287. .help = "manufacturer name",
  288. },{
  289. .name = "version",
  290. .type = QEMU_OPT_STRING,
  291. .help = "version number",
  292. },{
  293. .name = "max-speed",
  294. .type = QEMU_OPT_NUMBER,
  295. .help = "max speed in MHz",
  296. },{
  297. .name = "current-speed",
  298. .type = QEMU_OPT_NUMBER,
  299. .help = "speed at system boot in MHz",
  300. },{
  301. .name = "serial",
  302. .type = QEMU_OPT_STRING,
  303. .help = "serial number",
  304. },{
  305. .name = "asset",
  306. .type = QEMU_OPT_STRING,
  307. .help = "asset tag number",
  308. },{
  309. .name = "part",
  310. .type = QEMU_OPT_STRING,
  311. .help = "part number",
  312. }, {
  313. .name = "processor-id",
  314. .type = QEMU_OPT_NUMBER,
  315. .help = "processor id",
  316. },
  317. { /* end of list */ }
  318. };
  319. static const QemuOptDesc qemu_smbios_type8_opts[] = {
  320. {
  321. .name = "internal_reference",
  322. .type = QEMU_OPT_STRING,
  323. .help = "internal reference designator",
  324. },
  325. {
  326. .name = "external_reference",
  327. .type = QEMU_OPT_STRING,
  328. .help = "external reference designator",
  329. },
  330. {
  331. .name = "connector_type",
  332. .type = QEMU_OPT_NUMBER,
  333. .help = "connector type",
  334. },
  335. {
  336. .name = "port_type",
  337. .type = QEMU_OPT_NUMBER,
  338. .help = "port type",
  339. },
  340. };
  341. static const QemuOptDesc qemu_smbios_type11_opts[] = {
  342. {
  343. .name = "value",
  344. .type = QEMU_OPT_STRING,
  345. .help = "OEM string data",
  346. },
  347. {
  348. .name = "path",
  349. .type = QEMU_OPT_STRING,
  350. .help = "OEM string data from file",
  351. },
  352. };
  353. static const QemuOptDesc qemu_smbios_type17_opts[] = {
  354. {
  355. .name = "type",
  356. .type = QEMU_OPT_NUMBER,
  357. .help = "SMBIOS element type",
  358. },{
  359. .name = "loc_pfx",
  360. .type = QEMU_OPT_STRING,
  361. .help = "device locator string prefix",
  362. },{
  363. .name = "bank",
  364. .type = QEMU_OPT_STRING,
  365. .help = "bank locator string",
  366. },{
  367. .name = "manufacturer",
  368. .type = QEMU_OPT_STRING,
  369. .help = "manufacturer name",
  370. },{
  371. .name = "serial",
  372. .type = QEMU_OPT_STRING,
  373. .help = "serial number",
  374. },{
  375. .name = "asset",
  376. .type = QEMU_OPT_STRING,
  377. .help = "asset tag number",
  378. },{
  379. .name = "part",
  380. .type = QEMU_OPT_STRING,
  381. .help = "part number",
  382. },{
  383. .name = "speed",
  384. .type = QEMU_OPT_NUMBER,
  385. .help = "maximum capable speed",
  386. },
  387. { /* end of list */ }
  388. };
  389. static const QemuOptDesc qemu_smbios_type41_opts[] = {
  390. {
  391. .name = "type",
  392. .type = QEMU_OPT_NUMBER,
  393. .help = "SMBIOS element type",
  394. },{
  395. .name = "designation",
  396. .type = QEMU_OPT_STRING,
  397. .help = "reference designation string",
  398. },{
  399. .name = "kind",
  400. .type = QEMU_OPT_STRING,
  401. .help = "device type",
  402. .def_value_str = "other",
  403. },{
  404. .name = "instance",
  405. .type = QEMU_OPT_NUMBER,
  406. .help = "device type instance",
  407. },{
  408. .name = "pcidev",
  409. .type = QEMU_OPT_STRING,
  410. .help = "PCI device",
  411. },
  412. { /* end of list */ }
  413. };
  414. static void smbios_register_config(void)
  415. {
  416. qemu_add_opts(&qemu_smbios_opts);
  417. }
  418. opts_init(smbios_register_config);
  419. /*
  420. * The SMBIOS 2.1 "structure table length" field in the
  421. * entry point uses a 16-bit integer, so we're limited
  422. * in total table size
  423. */
  424. #define SMBIOS_21_MAX_TABLES_LEN 0xffff
  425. static void smbios_validate_table(MachineState *ms)
  426. {
  427. uint32_t expect_t4_count = smbios_legacy ?
  428. ms->smp.cpus : smbios_smp_sockets;
  429. if (smbios_type4_count && smbios_type4_count != expect_t4_count) {
  430. error_report("Expected %d SMBIOS Type 4 tables, got %d instead",
  431. expect_t4_count, smbios_type4_count);
  432. exit(1);
  433. }
  434. if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 &&
  435. smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) {
  436. error_report("SMBIOS 2.1 table length %zu exceeds %d",
  437. smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN);
  438. exit(1);
  439. }
  440. }
  441. /* legacy setup functions for <= 2.0 machines */
  442. static void smbios_add_field(int type, int offset, const void *data, size_t len)
  443. {
  444. struct smbios_field *field;
  445. if (!smbios_entries) {
  446. smbios_entries_len = sizeof(uint16_t);
  447. smbios_entries = g_malloc0(smbios_entries_len);
  448. }
  449. smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
  450. sizeof(*field) + len);
  451. field = (struct smbios_field *)(smbios_entries + smbios_entries_len);
  452. field->header.type = SMBIOS_FIELD_ENTRY;
  453. field->header.length = cpu_to_le16(sizeof(*field) + len);
  454. field->type = type;
  455. field->offset = cpu_to_le16(offset);
  456. memcpy(field->data, data, len);
  457. smbios_entries_len += sizeof(*field) + len;
  458. (*(uint16_t *)smbios_entries) =
  459. cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
  460. }
  461. static void smbios_maybe_add_str(int type, int offset, const char *data)
  462. {
  463. if (data) {
  464. smbios_add_field(type, offset, data, strlen(data) + 1);
  465. }
  466. }
  467. static void smbios_build_type_0_fields(void)
  468. {
  469. smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str),
  470. type0.vendor);
  471. smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str),
  472. type0.version);
  473. smbios_maybe_add_str(0, offsetof(struct smbios_type_0,
  474. bios_release_date_str),
  475. type0.date);
  476. if (type0.have_major_minor) {
  477. smbios_add_field(0, offsetof(struct smbios_type_0,
  478. system_bios_major_release),
  479. &type0.major, 1);
  480. smbios_add_field(0, offsetof(struct smbios_type_0,
  481. system_bios_minor_release),
  482. &type0.minor, 1);
  483. }
  484. }
  485. static void smbios_build_type_1_fields(void)
  486. {
  487. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str),
  488. type1.manufacturer);
  489. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str),
  490. type1.product);
  491. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str),
  492. type1.version);
  493. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str),
  494. type1.serial);
  495. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str),
  496. type1.sku);
  497. smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str),
  498. type1.family);
  499. if (qemu_uuid_set) {
  500. /* We don't encode the UUID in the "wire format" here because this
  501. * function is for legacy mode and needs to keep the guest ABI, and
  502. * because we don't know what's the SMBIOS version advertised by the
  503. * BIOS.
  504. */
  505. smbios_add_field(1, offsetof(struct smbios_type_1, uuid),
  506. &qemu_uuid, 16);
  507. }
  508. }
  509. uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length)
  510. {
  511. if (!smbios_legacy) {
  512. *length = 0;
  513. return NULL;
  514. }
  515. if (!smbios_immutable) {
  516. smbios_build_type_0_fields();
  517. smbios_build_type_1_fields();
  518. smbios_validate_table(ms);
  519. smbios_immutable = true;
  520. }
  521. *length = smbios_entries_len;
  522. return smbios_entries;
  523. }
  524. /* end: legacy setup functions for <= 2.0 machines */
  525. bool smbios_skip_table(uint8_t type, bool required_table)
  526. {
  527. if (test_bit(type, have_binfile_bitmap)) {
  528. return true; /* user provided their own binary blob(s) */
  529. }
  530. if (test_bit(type, have_fields_bitmap)) {
  531. return false; /* user provided fields via command line */
  532. }
  533. if (smbios_have_defaults && required_table) {
  534. return false; /* we're building tables, and this one's required */
  535. }
  536. return true;
  537. }
  538. #define T0_BASE 0x000
  539. #define T1_BASE 0x100
  540. #define T2_BASE 0x200
  541. #define T3_BASE 0x300
  542. #define T4_BASE 0x400
  543. #define T11_BASE 0xe00
  544. #define T16_BASE 0x1000
  545. #define T17_BASE 0x1100
  546. #define T19_BASE 0x1300
  547. #define T32_BASE 0x2000
  548. #define T41_BASE 0x2900
  549. #define T127_BASE 0x7F00
  550. static void smbios_build_type_0_table(void)
  551. {
  552. SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */
  553. SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor);
  554. SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version);
  555. t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */
  556. SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date);
  557. t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */
  558. t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */
  559. t->bios_characteristics_extension_bytes[0] = 0;
  560. t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */
  561. if (type0.uefi) {
  562. t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */
  563. }
  564. if (type0.have_major_minor) {
  565. t->system_bios_major_release = type0.major;
  566. t->system_bios_minor_release = type0.minor;
  567. } else {
  568. t->system_bios_major_release = 0;
  569. t->system_bios_minor_release = 0;
  570. }
  571. /* hardcoded in SeaBIOS */
  572. t->embedded_controller_major_release = 0xFF;
  573. t->embedded_controller_minor_release = 0xFF;
  574. SMBIOS_BUILD_TABLE_POST;
  575. }
  576. /* Encode UUID from the big endian encoding described on RFC4122 to the wire
  577. * format specified by SMBIOS version 2.6.
  578. */
  579. static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in)
  580. {
  581. memcpy(uuid, in, 16);
  582. if (smbios_uuid_encoded) {
  583. uuid->time_low = bswap32(uuid->time_low);
  584. uuid->time_mid = bswap16(uuid->time_mid);
  585. uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version);
  586. }
  587. }
  588. static void smbios_build_type_1_table(void)
  589. {
  590. SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */
  591. SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer);
  592. SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product);
  593. SMBIOS_TABLE_SET_STR(1, version_str, type1.version);
  594. SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial);
  595. if (qemu_uuid_set) {
  596. smbios_encode_uuid(&t->uuid, &qemu_uuid);
  597. } else {
  598. memset(&t->uuid, 0, 16);
  599. }
  600. t->wake_up_type = 0x06; /* power switch */
  601. SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku);
  602. SMBIOS_TABLE_SET_STR(1, family_str, type1.family);
  603. SMBIOS_BUILD_TABLE_POST;
  604. }
  605. static void smbios_build_type_2_table(void)
  606. {
  607. SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */
  608. SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer);
  609. SMBIOS_TABLE_SET_STR(2, product_str, type2.product);
  610. SMBIOS_TABLE_SET_STR(2, version_str, type2.version);
  611. SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial);
  612. SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset);
  613. t->feature_flags = 0x01; /* Motherboard */
  614. SMBIOS_TABLE_SET_STR(2, location_str, type2.location);
  615. t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */
  616. t->board_type = 0x0A; /* Motherboard */
  617. t->contained_element_count = 0;
  618. SMBIOS_BUILD_TABLE_POST;
  619. }
  620. static void smbios_build_type_3_table(void)
  621. {
  622. SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */
  623. SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer);
  624. t->type = 0x01; /* Other */
  625. SMBIOS_TABLE_SET_STR(3, version_str, type3.version);
  626. SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial);
  627. SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset);
  628. t->boot_up_state = 0x03; /* Safe */
  629. t->power_supply_state = 0x03; /* Safe */
  630. t->thermal_state = 0x03; /* Safe */
  631. t->security_status = 0x02; /* Unknown */
  632. t->oem_defined = cpu_to_le32(0);
  633. t->height = 0;
  634. t->number_of_power_cords = 0;
  635. t->contained_element_count = 0;
  636. t->contained_element_record_length = 0;
  637. SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku);
  638. SMBIOS_BUILD_TABLE_POST;
  639. }
  640. static void smbios_build_type_4_table(MachineState *ms, unsigned instance)
  641. {
  642. char sock_str[128];
  643. size_t tbl_len = SMBIOS_TYPE_4_LEN_V28;
  644. if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) {
  645. tbl_len = SMBIOS_TYPE_4_LEN_V30;
  646. }
  647. SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance,
  648. true, tbl_len); /* required */
  649. snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance);
  650. SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str);
  651. t->processor_type = 0x03; /* CPU */
  652. t->processor_family = 0x01; /* Other */
  653. SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer);
  654. if (type4.processor_id == 0) {
  655. t->processor_id[0] = cpu_to_le32(smbios_cpuid_version);
  656. t->processor_id[1] = cpu_to_le32(smbios_cpuid_features);
  657. } else {
  658. t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id);
  659. t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32);
  660. }
  661. SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version);
  662. t->voltage = 0;
  663. t->external_clock = cpu_to_le16(0); /* Unknown */
  664. t->max_speed = cpu_to_le16(type4.max_speed);
  665. t->current_speed = cpu_to_le16(type4.current_speed);
  666. t->status = 0x41; /* Socket populated, CPU enabled */
  667. t->processor_upgrade = 0x01; /* Other */
  668. t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
  669. t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
  670. t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
  671. SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial);
  672. SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset);
  673. SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part);
  674. t->core_count = (ms->smp.cores > 255) ? 0xFF : ms->smp.cores;
  675. t->core_enabled = t->core_count;
  676. t->thread_count = (ms->smp.threads > 255) ? 0xFF : ms->smp.threads;
  677. t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */
  678. t->processor_family2 = cpu_to_le16(0x01); /* Other */
  679. if (tbl_len == SMBIOS_TYPE_4_LEN_V30) {
  680. t->core_count2 = t->core_enabled2 = cpu_to_le16(ms->smp.cores);
  681. t->thread_count2 = cpu_to_le16(ms->smp.threads);
  682. }
  683. SMBIOS_BUILD_TABLE_POST;
  684. smbios_type4_count++;
  685. }
  686. static void smbios_build_type_8_table(void)
  687. {
  688. unsigned instance = 0;
  689. struct type8_instance *t8;
  690. QTAILQ_FOREACH(t8, &type8, next) {
  691. SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true);
  692. SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference);
  693. SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference);
  694. /* most vendors seem to set this to None */
  695. t->internal_connector_type = 0x0;
  696. t->external_connector_type = t8->connector_type;
  697. t->port_type = t8->port_type;
  698. SMBIOS_BUILD_TABLE_POST;
  699. instance++;
  700. }
  701. }
  702. static void smbios_build_type_11_table(void)
  703. {
  704. char count_str[128];
  705. size_t i;
  706. if (type11.nvalues == 0) {
  707. return;
  708. }
  709. SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */
  710. snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues);
  711. t->count = type11.nvalues;
  712. for (i = 0; i < type11.nvalues; i++) {
  713. SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]);
  714. g_free(type11.values[i]);
  715. type11.values[i] = NULL;
  716. }
  717. SMBIOS_BUILD_TABLE_POST;
  718. }
  719. #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */
  720. static void smbios_build_type_16_table(unsigned dimm_cnt)
  721. {
  722. uint64_t size_kb;
  723. SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */
  724. t->location = 0x01; /* Other */
  725. t->use = 0x03; /* System memory */
  726. t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */
  727. size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB;
  728. if (size_kb < MAX_T16_STD_SZ) {
  729. t->maximum_capacity = cpu_to_le32(size_kb);
  730. t->extended_maximum_capacity = cpu_to_le64(0);
  731. } else {
  732. t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ);
  733. t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size);
  734. }
  735. t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
  736. t->number_of_memory_devices = cpu_to_le16(dimm_cnt);
  737. SMBIOS_BUILD_TABLE_POST;
  738. }
  739. #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */
  740. #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */
  741. static void smbios_build_type_17_table(unsigned instance, uint64_t size)
  742. {
  743. char loc_str[128];
  744. uint64_t size_mb;
  745. SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */
  746. t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */
  747. t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
  748. t->total_width = cpu_to_le16(0xFFFF); /* Unknown */
  749. t->data_width = cpu_to_le16(0xFFFF); /* Unknown */
  750. size_mb = QEMU_ALIGN_UP(size, MiB) / MiB;
  751. if (size_mb < MAX_T17_STD_SZ) {
  752. t->size = cpu_to_le16(size_mb);
  753. t->extended_size = cpu_to_le32(0);
  754. } else {
  755. assert(size_mb < MAX_T17_EXT_SZ);
  756. t->size = cpu_to_le16(MAX_T17_STD_SZ);
  757. t->extended_size = cpu_to_le32(size_mb);
  758. }
  759. t->form_factor = 0x09; /* DIMM */
  760. t->device_set = 0; /* Not in a set */
  761. snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance);
  762. SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str);
  763. SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank);
  764. t->memory_type = 0x07; /* RAM */
  765. t->type_detail = cpu_to_le16(0x02); /* Other */
  766. t->speed = cpu_to_le16(type17.speed);
  767. SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer);
  768. SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial);
  769. SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset);
  770. SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part);
  771. t->attributes = 0; /* Unknown */
  772. t->configured_clock_speed = t->speed; /* reuse value for max speed */
  773. t->minimum_voltage = cpu_to_le16(0); /* Unknown */
  774. t->maximum_voltage = cpu_to_le16(0); /* Unknown */
  775. t->configured_voltage = cpu_to_le16(0); /* Unknown */
  776. SMBIOS_BUILD_TABLE_POST;
  777. }
  778. static void smbios_build_type_19_table(unsigned instance, unsigned offset,
  779. uint64_t start, uint64_t size)
  780. {
  781. uint64_t end, start_kb, end_kb;
  782. SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance,
  783. true); /* required */
  784. end = start + size - 1;
  785. assert(end > start);
  786. start_kb = start / KiB;
  787. end_kb = end / KiB;
  788. if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) {
  789. t->starting_address = cpu_to_le32(start_kb);
  790. t->ending_address = cpu_to_le32(end_kb);
  791. t->extended_starting_address =
  792. t->extended_ending_address = cpu_to_le64(0);
  793. } else {
  794. t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX);
  795. t->extended_starting_address = cpu_to_le64(start);
  796. t->extended_ending_address = cpu_to_le64(end);
  797. }
  798. t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */
  799. t->partition_width = 1; /* One device per row */
  800. SMBIOS_BUILD_TABLE_POST;
  801. }
  802. static void smbios_build_type_32_table(void)
  803. {
  804. SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */
  805. memset(t->reserved, 0, 6);
  806. t->boot_status = 0; /* No errors detected */
  807. SMBIOS_BUILD_TABLE_POST;
  808. }
  809. static void smbios_build_type_41_table(Error **errp)
  810. {
  811. unsigned instance = 0;
  812. struct type41_instance *t41;
  813. QTAILQ_FOREACH(t41, &type41, next) {
  814. SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true);
  815. SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation);
  816. t->device_type = t41->kind;
  817. t->device_type_instance = t41->instance;
  818. t->segment_group_number = cpu_to_le16(0);
  819. t->bus_number = 0;
  820. t->device_number = 0;
  821. if (t41->pcidev) {
  822. PCIDevice *pdev = NULL;
  823. int rc = pci_qdev_find_device(t41->pcidev, &pdev);
  824. if (rc != 0) {
  825. error_setg(errp,
  826. "No PCI device %s for SMBIOS type 41 entry %s",
  827. t41->pcidev, t41->designation);
  828. return;
  829. }
  830. /*
  831. * We only handle the case were the device is attached to
  832. * the PCI root bus. The general case is more complex as
  833. * bridges are enumerated later and the table would need
  834. * to be updated at this moment.
  835. */
  836. if (!pci_bus_is_root(pci_get_bus(pdev))) {
  837. error_setg(errp,
  838. "Cannot create type 41 entry for PCI device %s: "
  839. "not attached to the root bus",
  840. t41->pcidev);
  841. return;
  842. }
  843. t->segment_group_number = cpu_to_le16(0);
  844. t->bus_number = pci_dev_bus_num(pdev);
  845. t->device_number = pdev->devfn;
  846. }
  847. SMBIOS_BUILD_TABLE_POST;
  848. instance++;
  849. }
  850. }
  851. static void smbios_build_type_127_table(void)
  852. {
  853. SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */
  854. SMBIOS_BUILD_TABLE_POST;
  855. }
  856. void smbios_set_cpuid(uint32_t version, uint32_t features)
  857. {
  858. smbios_cpuid_version = version;
  859. smbios_cpuid_features = features;
  860. }
  861. #define SMBIOS_SET_DEFAULT(field, value) \
  862. if (!field) { \
  863. field = value; \
  864. }
  865. void smbios_set_defaults(const char *manufacturer, const char *product,
  866. const char *version, bool legacy_mode,
  867. bool uuid_encoded, SmbiosEntryPointType ep_type)
  868. {
  869. smbios_have_defaults = true;
  870. smbios_legacy = legacy_mode;
  871. smbios_uuid_encoded = uuid_encoded;
  872. smbios_ep_type = ep_type;
  873. /* drop unwanted version of command-line file blob(s) */
  874. if (smbios_legacy) {
  875. g_free(smbios_tables);
  876. /* in legacy mode, also complain if fields were given for types > 1 */
  877. if (find_next_bit(have_fields_bitmap,
  878. SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) {
  879. error_report("can't process fields for smbios "
  880. "types > 1 on machine versions < 2.1!");
  881. exit(1);
  882. }
  883. } else {
  884. g_free(smbios_entries);
  885. }
  886. SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer);
  887. SMBIOS_SET_DEFAULT(type1.product, product);
  888. SMBIOS_SET_DEFAULT(type1.version, version);
  889. SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer);
  890. SMBIOS_SET_DEFAULT(type2.product, product);
  891. SMBIOS_SET_DEFAULT(type2.version, version);
  892. SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer);
  893. SMBIOS_SET_DEFAULT(type3.version, version);
  894. SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU");
  895. SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer);
  896. SMBIOS_SET_DEFAULT(type4.version, version);
  897. SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM");
  898. SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer);
  899. }
  900. static void smbios_entry_point_setup(void)
  901. {
  902. switch (smbios_ep_type) {
  903. case SMBIOS_ENTRY_POINT_TYPE_32:
  904. memcpy(ep.ep21.anchor_string, "_SM_", 4);
  905. memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5);
  906. ep.ep21.length = sizeof(struct smbios_21_entry_point);
  907. ep.ep21.entry_point_revision = 0; /* formatted_area reserved */
  908. memset(ep.ep21.formatted_area, 0, 5);
  909. /* compliant with smbios spec v2.8 */
  910. ep.ep21.smbios_major_version = 2;
  911. ep.ep21.smbios_minor_version = 8;
  912. ep.ep21.smbios_bcd_revision = 0x28;
  913. /* set during table construction, but BIOS may override: */
  914. ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len);
  915. ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max);
  916. ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt);
  917. /* BIOS must recalculate */
  918. ep.ep21.checksum = 0;
  919. ep.ep21.intermediate_checksum = 0;
  920. ep.ep21.structure_table_address = cpu_to_le32(0);
  921. break;
  922. case SMBIOS_ENTRY_POINT_TYPE_64:
  923. memcpy(ep.ep30.anchor_string, "_SM3_", 5);
  924. ep.ep30.length = sizeof(struct smbios_30_entry_point);
  925. ep.ep30.entry_point_revision = 1;
  926. ep.ep30.reserved = 0;
  927. /* compliant with smbios spec 3.0 */
  928. ep.ep30.smbios_major_version = 3;
  929. ep.ep30.smbios_minor_version = 0;
  930. ep.ep30.smbios_doc_rev = 0;
  931. /* set during table construct, but BIOS might override */
  932. ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len);
  933. /* BIOS must recalculate */
  934. ep.ep30.checksum = 0;
  935. ep.ep30.structure_table_address = cpu_to_le64(0);
  936. break;
  937. default:
  938. abort();
  939. break;
  940. }
  941. }
  942. void smbios_get_tables(MachineState *ms,
  943. const struct smbios_phys_mem_area *mem_array,
  944. const unsigned int mem_array_size,
  945. uint8_t **tables, size_t *tables_len,
  946. uint8_t **anchor, size_t *anchor_len,
  947. Error **errp)
  948. {
  949. unsigned i, dimm_cnt, offset;
  950. if (smbios_legacy) {
  951. *tables = *anchor = NULL;
  952. *tables_len = *anchor_len = 0;
  953. return;
  954. }
  955. if (!smbios_immutable) {
  956. smbios_build_type_0_table();
  957. smbios_build_type_1_table();
  958. smbios_build_type_2_table();
  959. smbios_build_type_3_table();
  960. smbios_smp_sockets = DIV_ROUND_UP(ms->smp.cpus,
  961. ms->smp.cores * ms->smp.threads);
  962. assert(smbios_smp_sockets >= 1);
  963. for (i = 0; i < smbios_smp_sockets; i++) {
  964. smbios_build_type_4_table(ms, i);
  965. }
  966. smbios_build_type_8_table();
  967. smbios_build_type_11_table();
  968. #define MAX_DIMM_SZ (16 * GiB)
  969. #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \
  970. : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1)
  971. dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ;
  972. /*
  973. * The offset determines if we need to keep additional space betweeen
  974. * table 17 and table 19 header handle numbers so that they do
  975. * not overlap. For example, for a VM with larger than 8 TB guest
  976. * memory and DIMM like chunks of 16 GiB, the default space between
  977. * the two tables (T19_BASE - T17_BASE = 512) is not enough.
  978. */
  979. offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \
  980. dimm_cnt - (T19_BASE - T17_BASE) : 0;
  981. smbios_build_type_16_table(dimm_cnt);
  982. for (i = 0; i < dimm_cnt; i++) {
  983. smbios_build_type_17_table(i, GET_DIMM_SZ);
  984. }
  985. for (i = 0; i < mem_array_size; i++) {
  986. smbios_build_type_19_table(i, offset, mem_array[i].address,
  987. mem_array[i].length);
  988. }
  989. /*
  990. * make sure 16 bit handle numbers in the headers of tables 19
  991. * and 32 do not overlap.
  992. */
  993. assert((mem_array_size + offset) < (T32_BASE - T19_BASE));
  994. smbios_build_type_32_table();
  995. smbios_build_type_38_table();
  996. smbios_build_type_41_table(errp);
  997. smbios_build_type_127_table();
  998. smbios_validate_table(ms);
  999. smbios_entry_point_setup();
  1000. smbios_immutable = true;
  1001. }
  1002. /* return tables blob and entry point (anchor), and their sizes */
  1003. *tables = smbios_tables;
  1004. *tables_len = smbios_tables_len;
  1005. *anchor = (uint8_t *)&ep;
  1006. /* calculate length based on anchor string */
  1007. if (!strncmp((char *)&ep, "_SM_", 4)) {
  1008. *anchor_len = sizeof(struct smbios_21_entry_point);
  1009. } else if (!strncmp((char *)&ep, "_SM3_", 5)) {
  1010. *anchor_len = sizeof(struct smbios_30_entry_point);
  1011. } else {
  1012. abort();
  1013. }
  1014. }
  1015. static void save_opt(const char **dest, QemuOpts *opts, const char *name)
  1016. {
  1017. const char *val = qemu_opt_get(opts, name);
  1018. if (val) {
  1019. *dest = val;
  1020. }
  1021. }
  1022. struct opt_list {
  1023. size_t *ndest;
  1024. char ***dest;
  1025. };
  1026. static int save_opt_one(void *opaque,
  1027. const char *name, const char *value,
  1028. Error **errp)
  1029. {
  1030. struct opt_list *opt = opaque;
  1031. if (g_str_equal(name, "path")) {
  1032. g_autoptr(GByteArray) data = g_byte_array_new();
  1033. g_autofree char *buf = g_new(char, 4096);
  1034. ssize_t ret;
  1035. int fd = qemu_open(value, O_RDONLY, errp);
  1036. if (fd < 0) {
  1037. return -1;
  1038. }
  1039. while (1) {
  1040. ret = read(fd, buf, 4096);
  1041. if (ret == 0) {
  1042. break;
  1043. }
  1044. if (ret < 0) {
  1045. error_setg(errp, "Unable to read from %s: %s",
  1046. value, strerror(errno));
  1047. qemu_close(fd);
  1048. return -1;
  1049. }
  1050. if (memchr(buf, '\0', ret)) {
  1051. error_setg(errp, "NUL in OEM strings value in %s", value);
  1052. qemu_close(fd);
  1053. return -1;
  1054. }
  1055. g_byte_array_append(data, (guint8 *)buf, ret);
  1056. }
  1057. qemu_close(fd);
  1058. *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
  1059. (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE);
  1060. (*opt->ndest)++;
  1061. data = NULL;
  1062. } else if (g_str_equal(name, "value")) {
  1063. *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
  1064. (*opt->dest)[*opt->ndest] = g_strdup(value);
  1065. (*opt->ndest)++;
  1066. } else if (!g_str_equal(name, "type")) {
  1067. error_setg(errp, "Unexpected option %s", name);
  1068. return -1;
  1069. }
  1070. return 0;
  1071. }
  1072. static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts,
  1073. Error **errp)
  1074. {
  1075. struct opt_list opt = {
  1076. ndest, dest,
  1077. };
  1078. if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) {
  1079. return false;
  1080. }
  1081. return true;
  1082. }
  1083. void smbios_entry_add(QemuOpts *opts, Error **errp)
  1084. {
  1085. const char *val;
  1086. assert(!smbios_immutable);
  1087. val = qemu_opt_get(opts, "file");
  1088. if (val) {
  1089. struct smbios_structure_header *header;
  1090. int size;
  1091. struct smbios_table *table; /* legacy mode only */
  1092. if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) {
  1093. return;
  1094. }
  1095. size = get_image_size(val);
  1096. if (size == -1 || size < sizeof(struct smbios_structure_header)) {
  1097. error_setg(errp, "Cannot read SMBIOS file %s", val);
  1098. return;
  1099. }
  1100. /*
  1101. * NOTE: standard double '\0' terminator expected, per smbios spec.
  1102. * (except in legacy mode, where the second '\0' is implicit and
  1103. * will be inserted by the BIOS).
  1104. */
  1105. smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size);
  1106. header = (struct smbios_structure_header *)(smbios_tables +
  1107. smbios_tables_len);
  1108. if (load_image_size(val, (uint8_t *)header, size) != size) {
  1109. error_setg(errp, "Failed to load SMBIOS file %s", val);
  1110. return;
  1111. }
  1112. if (header->type <= SMBIOS_MAX_TYPE) {
  1113. if (test_bit(header->type, have_fields_bitmap)) {
  1114. error_setg(errp,
  1115. "can't load type %d struct, fields already specified!",
  1116. header->type);
  1117. return;
  1118. }
  1119. set_bit(header->type, have_binfile_bitmap);
  1120. }
  1121. if (header->type == 4) {
  1122. smbios_type4_count++;
  1123. }
  1124. smbios_tables_len += size;
  1125. if (size > smbios_table_max) {
  1126. smbios_table_max = size;
  1127. }
  1128. smbios_table_cnt++;
  1129. /* add a copy of the newly loaded blob to legacy smbios_entries */
  1130. /* NOTE: This code runs before smbios_set_defaults(), so we don't
  1131. * yet know which mode (legacy vs. aggregate-table) will be
  1132. * required. We therefore add the binary blob to both legacy
  1133. * (smbios_entries) and aggregate (smbios_tables) tables, and
  1134. * delete the one we don't need from smbios_set_defaults(),
  1135. * once we know which machine version has been requested.
  1136. */
  1137. if (!smbios_entries) {
  1138. smbios_entries_len = sizeof(uint16_t);
  1139. smbios_entries = g_malloc0(smbios_entries_len);
  1140. }
  1141. smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
  1142. size + sizeof(*table));
  1143. table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
  1144. table->header.type = SMBIOS_TABLE_ENTRY;
  1145. table->header.length = cpu_to_le16(sizeof(*table) + size);
  1146. memcpy(table->data, header, size);
  1147. smbios_entries_len += sizeof(*table) + size;
  1148. (*(uint16_t *)smbios_entries) =
  1149. cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
  1150. /* end: add a copy of the newly loaded blob to legacy smbios_entries */
  1151. return;
  1152. }
  1153. val = qemu_opt_get(opts, "type");
  1154. if (val) {
  1155. unsigned long type = strtoul(val, NULL, 0);
  1156. if (type > SMBIOS_MAX_TYPE) {
  1157. error_setg(errp, "out of range!");
  1158. return;
  1159. }
  1160. if (test_bit(type, have_binfile_bitmap)) {
  1161. error_setg(errp, "can't add fields, binary file already loaded!");
  1162. return;
  1163. }
  1164. set_bit(type, have_fields_bitmap);
  1165. switch (type) {
  1166. case 0:
  1167. if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) {
  1168. return;
  1169. }
  1170. save_opt(&type0.vendor, opts, "vendor");
  1171. save_opt(&type0.version, opts, "version");
  1172. save_opt(&type0.date, opts, "date");
  1173. type0.uefi = qemu_opt_get_bool(opts, "uefi", false);
  1174. val = qemu_opt_get(opts, "release");
  1175. if (val) {
  1176. if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) {
  1177. error_setg(errp, "Invalid release");
  1178. return;
  1179. }
  1180. type0.have_major_minor = true;
  1181. }
  1182. return;
  1183. case 1:
  1184. if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) {
  1185. return;
  1186. }
  1187. save_opt(&type1.manufacturer, opts, "manufacturer");
  1188. save_opt(&type1.product, opts, "product");
  1189. save_opt(&type1.version, opts, "version");
  1190. save_opt(&type1.serial, opts, "serial");
  1191. save_opt(&type1.sku, opts, "sku");
  1192. save_opt(&type1.family, opts, "family");
  1193. val = qemu_opt_get(opts, "uuid");
  1194. if (val) {
  1195. if (qemu_uuid_parse(val, &qemu_uuid) != 0) {
  1196. error_setg(errp, "Invalid UUID");
  1197. return;
  1198. }
  1199. qemu_uuid_set = true;
  1200. }
  1201. return;
  1202. case 2:
  1203. if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) {
  1204. return;
  1205. }
  1206. save_opt(&type2.manufacturer, opts, "manufacturer");
  1207. save_opt(&type2.product, opts, "product");
  1208. save_opt(&type2.version, opts, "version");
  1209. save_opt(&type2.serial, opts, "serial");
  1210. save_opt(&type2.asset, opts, "asset");
  1211. save_opt(&type2.location, opts, "location");
  1212. return;
  1213. case 3:
  1214. if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) {
  1215. return;
  1216. }
  1217. save_opt(&type3.manufacturer, opts, "manufacturer");
  1218. save_opt(&type3.version, opts, "version");
  1219. save_opt(&type3.serial, opts, "serial");
  1220. save_opt(&type3.asset, opts, "asset");
  1221. save_opt(&type3.sku, opts, "sku");
  1222. return;
  1223. case 4:
  1224. if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) {
  1225. return;
  1226. }
  1227. save_opt(&type4.sock_pfx, opts, "sock_pfx");
  1228. save_opt(&type4.manufacturer, opts, "manufacturer");
  1229. save_opt(&type4.version, opts, "version");
  1230. save_opt(&type4.serial, opts, "serial");
  1231. save_opt(&type4.asset, opts, "asset");
  1232. save_opt(&type4.part, opts, "part");
  1233. /* If the value is 0, it will take the value from the CPU model. */
  1234. type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0);
  1235. type4.max_speed = qemu_opt_get_number(opts, "max-speed",
  1236. DEFAULT_CPU_SPEED);
  1237. type4.current_speed = qemu_opt_get_number(opts, "current-speed",
  1238. DEFAULT_CPU_SPEED);
  1239. if (type4.max_speed > UINT16_MAX ||
  1240. type4.current_speed > UINT16_MAX) {
  1241. error_setg(errp, "SMBIOS CPU speed is too large (> %d)",
  1242. UINT16_MAX);
  1243. }
  1244. return;
  1245. case 8:
  1246. if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) {
  1247. return;
  1248. }
  1249. struct type8_instance *t;
  1250. t = g_new0(struct type8_instance, 1);
  1251. save_opt(&t->internal_reference, opts, "internal_reference");
  1252. save_opt(&t->external_reference, opts, "external_reference");
  1253. t->connector_type = qemu_opt_get_number(opts, "connector_type", 0);
  1254. t->port_type = qemu_opt_get_number(opts, "port_type", 0);
  1255. QTAILQ_INSERT_TAIL(&type8, t, next);
  1256. return;
  1257. case 11:
  1258. if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) {
  1259. return;
  1260. }
  1261. if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) {
  1262. return;
  1263. }
  1264. return;
  1265. case 17:
  1266. if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) {
  1267. return;
  1268. }
  1269. save_opt(&type17.loc_pfx, opts, "loc_pfx");
  1270. save_opt(&type17.bank, opts, "bank");
  1271. save_opt(&type17.manufacturer, opts, "manufacturer");
  1272. save_opt(&type17.serial, opts, "serial");
  1273. save_opt(&type17.asset, opts, "asset");
  1274. save_opt(&type17.part, opts, "part");
  1275. type17.speed = qemu_opt_get_number(opts, "speed", 0);
  1276. return;
  1277. case 41: {
  1278. struct type41_instance *t;
  1279. Error *local_err = NULL;
  1280. if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) {
  1281. return;
  1282. }
  1283. t = g_new0(struct type41_instance, 1);
  1284. save_opt(&t->designation, opts, "designation");
  1285. t->kind = qapi_enum_parse(&type41_kind_lookup,
  1286. qemu_opt_get(opts, "kind"),
  1287. 0, &local_err) + 1;
  1288. t->kind |= 0x80; /* enabled */
  1289. if (local_err != NULL) {
  1290. error_propagate(errp, local_err);
  1291. g_free(t);
  1292. return;
  1293. }
  1294. t->instance = qemu_opt_get_number(opts, "instance", 1);
  1295. save_opt(&t->pcidev, opts, "pcidev");
  1296. QTAILQ_INSERT_TAIL(&type41, t, next);
  1297. return;
  1298. }
  1299. default:
  1300. error_setg(errp,
  1301. "Don't know how to build fields for SMBIOS type %ld",
  1302. type);
  1303. return;
  1304. }
  1305. }
  1306. error_setg(errp, "Must specify type= or file=");
  1307. }