m41t80.c 2.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120
  1. /*
  2. * M41T80 serial rtc emulation
  3. *
  4. * Copyright (c) 2018 BALATON Zoltan
  5. *
  6. * This work is licensed under the GNU GPL license version 2 or later.
  7. *
  8. */
  9. #include "qemu/osdep.h"
  10. #include "qemu/log.h"
  11. #include "qemu/module.h"
  12. #include "qemu/timer.h"
  13. #include "qemu/bcd.h"
  14. #include "hw/i2c/i2c.h"
  15. #include "qom/object.h"
  16. #include "sysemu/rtc.h"
  17. #define TYPE_M41T80 "m41t80"
  18. OBJECT_DECLARE_SIMPLE_TYPE(M41t80State, M41T80)
  19. struct M41t80State {
  20. I2CSlave parent_obj;
  21. int8_t addr;
  22. };
  23. static void m41t80_realize(DeviceState *dev, Error **errp)
  24. {
  25. M41t80State *s = M41T80(dev);
  26. s->addr = -1;
  27. }
  28. static int m41t80_send(I2CSlave *i2c, uint8_t data)
  29. {
  30. M41t80State *s = M41T80(i2c);
  31. if (s->addr < 0) {
  32. s->addr = data;
  33. } else {
  34. s->addr++;
  35. }
  36. return 0;
  37. }
  38. static uint8_t m41t80_recv(I2CSlave *i2c)
  39. {
  40. M41t80State *s = M41T80(i2c);
  41. struct tm now;
  42. int64_t rt;
  43. if (s->addr < 0) {
  44. s->addr = 0;
  45. }
  46. if (s->addr >= 1 && s->addr <= 7) {
  47. qemu_get_timedate(&now, -1);
  48. }
  49. switch (s->addr++) {
  50. case 0:
  51. rt = g_get_real_time();
  52. return to_bcd((rt % G_USEC_PER_SEC) / 10000);
  53. case 1:
  54. return to_bcd(now.tm_sec);
  55. case 2:
  56. return to_bcd(now.tm_min);
  57. case 3:
  58. return to_bcd(now.tm_hour);
  59. case 4:
  60. return to_bcd(now.tm_wday);
  61. case 5:
  62. return to_bcd(now.tm_mday);
  63. case 6:
  64. return to_bcd(now.tm_mon + 1);
  65. case 7:
  66. return to_bcd(now.tm_year % 100);
  67. case 8 ... 19:
  68. qemu_log_mask(LOG_UNIMP, "%s: unimplemented register: %d\n",
  69. __func__, s->addr - 1);
  70. return 0;
  71. default:
  72. qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid register: %d\n",
  73. __func__, s->addr - 1);
  74. return 0;
  75. }
  76. }
  77. static int m41t80_event(I2CSlave *i2c, enum i2c_event event)
  78. {
  79. M41t80State *s = M41T80(i2c);
  80. if (event == I2C_START_SEND) {
  81. s->addr = -1;
  82. }
  83. return 0;
  84. }
  85. static void m41t80_class_init(ObjectClass *klass, void *data)
  86. {
  87. DeviceClass *dc = DEVICE_CLASS(klass);
  88. I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
  89. dc->realize = m41t80_realize;
  90. sc->send = m41t80_send;
  91. sc->recv = m41t80_recv;
  92. sc->event = m41t80_event;
  93. }
  94. static const TypeInfo m41t80_info = {
  95. .name = TYPE_M41T80,
  96. .parent = TYPE_I2C_SLAVE,
  97. .instance_size = sizeof(M41t80State),
  98. .class_init = m41t80_class_init,
  99. };
  100. static void m41t80_register_types(void)
  101. {
  102. type_register_static(&m41t80_info);
  103. }
  104. type_init(m41t80_register_types)