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ls7a_rtc.c 12 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Loongarch LS7A Real Time Clock emulation
  4. *
  5. * Copyright (C) 2021 Loongson Technology Corporation Limited
  6. */
  7. #include "qemu/osdep.h"
  8. #include "hw/sysbus.h"
  9. #include "hw/irq.h"
  10. #include "include/hw/register.h"
  11. #include "qemu/timer.h"
  12. #include "sysemu/sysemu.h"
  13. #include "qemu/cutils.h"
  14. #include "qemu/log.h"
  15. #include "migration/vmstate.h"
  16. #include "hw/misc/unimp.h"
  17. #include "sysemu/rtc.h"
  18. #include "hw/registerfields.h"
  19. #define SYS_TOYTRIM 0x20
  20. #define SYS_TOYWRITE0 0x24
  21. #define SYS_TOYWRITE1 0x28
  22. #define SYS_TOYREAD0 0x2C
  23. #define SYS_TOYREAD1 0x30
  24. #define SYS_TOYMATCH0 0x34
  25. #define SYS_TOYMATCH1 0x38
  26. #define SYS_TOYMATCH2 0x3C
  27. #define SYS_RTCCTRL 0x40
  28. #define SYS_RTCTRIM 0x60
  29. #define SYS_RTCWRTIE0 0x64
  30. #define SYS_RTCREAD0 0x68
  31. #define SYS_RTCMATCH0 0x6C
  32. #define SYS_RTCMATCH1 0x70
  33. #define SYS_RTCMATCH2 0x74
  34. #define LS7A_RTC_FREQ 32768
  35. #define TIMER_NUMS 3
  36. /*
  37. * Shift bits and filed mask
  38. */
  39. FIELD(TOY, MON, 26, 6)
  40. FIELD(TOY, DAY, 21, 5)
  41. FIELD(TOY, HOUR, 16, 5)
  42. FIELD(TOY, MIN, 10, 6)
  43. FIELD(TOY, SEC, 4, 6)
  44. FIELD(TOY, MSEC, 0, 4)
  45. FIELD(TOY_MATCH, YEAR, 26, 6)
  46. FIELD(TOY_MATCH, MON, 22, 4)
  47. FIELD(TOY_MATCH, DAY, 17, 5)
  48. FIELD(TOY_MATCH, HOUR, 12, 5)
  49. FIELD(TOY_MATCH, MIN, 6, 6)
  50. FIELD(TOY_MATCH, SEC, 0, 6)
  51. FIELD(RTC_CTRL, RTCEN, 13, 1)
  52. FIELD(RTC_CTRL, TOYEN, 11, 1)
  53. FIELD(RTC_CTRL, EO, 8, 1)
  54. #define TYPE_LS7A_RTC "ls7a_rtc"
  55. OBJECT_DECLARE_SIMPLE_TYPE(LS7ARtcState, LS7A_RTC)
  56. struct LS7ARtcState {
  57. SysBusDevice parent_obj;
  58. MemoryRegion iomem;
  59. /*
  60. * Needed to preserve the tick_count across migration, even if the
  61. * absolute value of the rtc_clock is different on the source and
  62. * destination.
  63. */
  64. int64_t offset_toy;
  65. int64_t offset_rtc;
  66. int64_t data;
  67. int tidx;
  68. uint32_t toymatch[3];
  69. uint32_t toytrim;
  70. uint32_t cntrctl;
  71. uint32_t rtctrim;
  72. uint32_t rtccount;
  73. uint32_t rtcmatch[3];
  74. QEMUTimer *toy_timer[TIMER_NUMS];
  75. QEMUTimer *rtc_timer[TIMER_NUMS];
  76. qemu_irq irq;
  77. };
  78. /* switch nanoseconds time to rtc ticks */
  79. static uint64_t ls7a_rtc_ticks(void)
  80. {
  81. return qemu_clock_get_ns(rtc_clock) * LS7A_RTC_FREQ / NANOSECONDS_PER_SECOND;
  82. }
  83. /* switch rtc ticks to nanoseconds */
  84. static uint64_t ticks_to_ns(uint64_t ticks)
  85. {
  86. return ticks * NANOSECONDS_PER_SECOND / LS7A_RTC_FREQ;
  87. }
  88. static bool toy_enabled(LS7ARtcState *s)
  89. {
  90. return FIELD_EX32(s->cntrctl, RTC_CTRL, TOYEN) &&
  91. FIELD_EX32(s->cntrctl, RTC_CTRL, EO);
  92. }
  93. static bool rtc_enabled(LS7ARtcState *s)
  94. {
  95. return FIELD_EX32(s->cntrctl, RTC_CTRL, RTCEN) &&
  96. FIELD_EX32(s->cntrctl, RTC_CTRL, EO);
  97. }
  98. /* parse struct tm to toy value */
  99. static uint64_t toy_time_to_val_mon(const struct tm *tm)
  100. {
  101. uint64_t val = 0;
  102. val = FIELD_DP32(val, TOY, MON, tm->tm_mon + 1);
  103. val = FIELD_DP32(val, TOY, DAY, tm->tm_mday);
  104. val = FIELD_DP32(val, TOY, HOUR, tm->tm_hour);
  105. val = FIELD_DP32(val, TOY, MIN, tm->tm_min);
  106. val = FIELD_DP32(val, TOY, SEC, tm->tm_sec);
  107. return val;
  108. }
  109. static void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm)
  110. {
  111. qemu_get_timedate(tm, s->offset_toy);
  112. tm->tm_sec = FIELD_EX32(val, TOY_MATCH, SEC);
  113. tm->tm_min = FIELD_EX32(val, TOY_MATCH, MIN);
  114. tm->tm_hour = FIELD_EX32(val, TOY_MATCH, HOUR);
  115. tm->tm_mday = FIELD_EX32(val, TOY_MATCH, DAY);
  116. tm->tm_mon = FIELD_EX32(val, TOY_MATCH, MON) - 1;
  117. tm->tm_year += (FIELD_EX32(val, TOY_MATCH, YEAR) - (tm->tm_year & 0x3f));
  118. }
  119. static void toymatch_write(LS7ARtcState *s, uint64_t val, int num)
  120. {
  121. int64_t now, expire_time;
  122. struct tm tm = {};
  123. /* it do not support write when toy disabled */
  124. if (toy_enabled(s)) {
  125. s->toymatch[num] = val;
  126. /* calculate expire time */
  127. now = qemu_clock_get_ms(rtc_clock);
  128. toymatch_val_to_time(s, val, &tm);
  129. expire_time = now + (qemu_timedate_diff(&tm) - s->offset_toy) * 1000;
  130. timer_mod(s->toy_timer[num], expire_time);
  131. }
  132. }
  133. static void rtcmatch_write(LS7ARtcState *s, uint64_t val, int num)
  134. {
  135. uint64_t expire_ns;
  136. /* it do not support write when toy disabled */
  137. if (rtc_enabled(s)) {
  138. s->rtcmatch[num] = val;
  139. /* calculate expire time */
  140. expire_ns = ticks_to_ns(val) - ticks_to_ns(s->offset_rtc);
  141. timer_mod_ns(s->rtc_timer[num], expire_ns);
  142. }
  143. }
  144. static void ls7a_toy_stop(LS7ARtcState *s)
  145. {
  146. int i;
  147. /* delete timers, and when re-enabled, recalculate expire time */
  148. for (i = 0; i < TIMER_NUMS; i++) {
  149. timer_del(s->toy_timer[i]);
  150. }
  151. }
  152. static void ls7a_rtc_stop(LS7ARtcState *s)
  153. {
  154. int i;
  155. /* delete timers, and when re-enabled, recalculate expire time */
  156. for (i = 0; i < TIMER_NUMS; i++) {
  157. timer_del(s->rtc_timer[i]);
  158. }
  159. }
  160. static void ls7a_toy_start(LS7ARtcState *s)
  161. {
  162. int i;
  163. uint64_t expire_time, now;
  164. struct tm tm = {};
  165. now = qemu_clock_get_ms(rtc_clock);
  166. /* recalculate expire time and enable timer */
  167. for (i = 0; i < TIMER_NUMS; i++) {
  168. toymatch_val_to_time(s, s->toymatch[i], &tm);
  169. expire_time = now + (qemu_timedate_diff(&tm) - s->offset_toy) * 1000;
  170. timer_mod(s->toy_timer[i], expire_time);
  171. }
  172. }
  173. static void ls7a_rtc_start(LS7ARtcState *s)
  174. {
  175. int i;
  176. uint64_t expire_time;
  177. /* recalculate expire time and enable timer */
  178. for (i = 0; i < TIMER_NUMS; i++) {
  179. expire_time = ticks_to_ns(s->rtcmatch[i]) - ticks_to_ns(s->offset_rtc);
  180. timer_mod_ns(s->rtc_timer[i], expire_time);
  181. }
  182. }
  183. static uint64_t ls7a_rtc_read(void *opaque, hwaddr addr, unsigned size)
  184. {
  185. LS7ARtcState *s = LS7A_RTC(opaque);
  186. struct tm tm;
  187. int val = 0;
  188. switch (addr) {
  189. case SYS_TOYREAD0:
  190. if (toy_enabled(s)) {
  191. qemu_get_timedate(&tm, s->offset_toy);
  192. val = toy_time_to_val_mon(&tm);
  193. } else {
  194. /* return 0 when toy disabled */
  195. val = 0;
  196. }
  197. break;
  198. case SYS_TOYREAD1:
  199. if (toy_enabled(s)) {
  200. qemu_get_timedate(&tm, s->offset_toy);
  201. val = tm.tm_year;
  202. } else {
  203. /* return 0 when toy disabled */
  204. val = 0;
  205. }
  206. break;
  207. case SYS_TOYMATCH0:
  208. val = s->toymatch[0];
  209. break;
  210. case SYS_TOYMATCH1:
  211. val = s->toymatch[1];
  212. break;
  213. case SYS_TOYMATCH2:
  214. val = s->toymatch[2];
  215. break;
  216. case SYS_RTCCTRL:
  217. val = s->cntrctl;
  218. break;
  219. case SYS_RTCREAD0:
  220. if (rtc_enabled(s)) {
  221. val = ls7a_rtc_ticks() + s->offset_rtc;
  222. } else {
  223. /* return 0 when rtc disabled */
  224. val = 0;
  225. }
  226. break;
  227. case SYS_RTCMATCH0:
  228. val = s->rtcmatch[0];
  229. break;
  230. case SYS_RTCMATCH1:
  231. val = s->rtcmatch[1];
  232. break;
  233. case SYS_RTCMATCH2:
  234. val = s->rtcmatch[2];
  235. break;
  236. default:
  237. val = 0;
  238. break;
  239. }
  240. return val;
  241. }
  242. static void ls7a_rtc_write(void *opaque, hwaddr addr,
  243. uint64_t val, unsigned size)
  244. {
  245. int old_toyen, old_rtcen, new_toyen, new_rtcen;
  246. LS7ARtcState *s = LS7A_RTC(opaque);
  247. struct tm tm;
  248. switch (addr) {
  249. case SYS_TOYWRITE0:
  250. /* it do not support write when toy disabled */
  251. if (toy_enabled(s)) {
  252. qemu_get_timedate(&tm, s->offset_toy);
  253. tm.tm_sec = FIELD_EX32(val, TOY, SEC);
  254. tm.tm_min = FIELD_EX32(val, TOY, MIN);
  255. tm.tm_hour = FIELD_EX32(val, TOY, HOUR);
  256. tm.tm_mday = FIELD_EX32(val, TOY, DAY);
  257. tm.tm_mon = FIELD_EX32(val, TOY, MON) - 1;
  258. s->offset_toy = qemu_timedate_diff(&tm);
  259. }
  260. break;
  261. case SYS_TOYWRITE1:
  262. if (toy_enabled(s)) {
  263. qemu_get_timedate(&tm, s->offset_toy);
  264. tm.tm_year = val;
  265. s->offset_toy = qemu_timedate_diff(&tm);
  266. }
  267. break;
  268. case SYS_TOYMATCH0:
  269. toymatch_write(s, val, 0);
  270. break;
  271. case SYS_TOYMATCH1:
  272. toymatch_write(s, val, 1);
  273. break;
  274. case SYS_TOYMATCH2:
  275. toymatch_write(s, val, 2);
  276. break;
  277. case SYS_RTCCTRL:
  278. /* get old ctrl */
  279. old_toyen = toy_enabled(s);
  280. old_rtcen = rtc_enabled(s);
  281. s->cntrctl = val;
  282. /* get new ctrl */
  283. new_toyen = toy_enabled(s);
  284. new_rtcen = rtc_enabled(s);
  285. /*
  286. * we do not consider if EO changed, as it always set at most time.
  287. * toy or rtc enabled should start timer. otherwise, stop timer
  288. */
  289. if (old_toyen != new_toyen) {
  290. if (new_toyen) {
  291. ls7a_toy_start(s);
  292. } else {
  293. ls7a_toy_stop(s);
  294. }
  295. }
  296. if (old_rtcen != new_rtcen) {
  297. if (new_rtcen) {
  298. ls7a_rtc_start(s);
  299. } else {
  300. ls7a_rtc_stop(s);
  301. }
  302. }
  303. break;
  304. case SYS_RTCWRTIE0:
  305. if (rtc_enabled(s)) {
  306. s->offset_rtc = val - ls7a_rtc_ticks();
  307. }
  308. break;
  309. case SYS_RTCMATCH0:
  310. rtcmatch_write(s, val, 0);
  311. break;
  312. case SYS_RTCMATCH1:
  313. rtcmatch_write(s, val, 1);
  314. break;
  315. case SYS_RTCMATCH2:
  316. rtcmatch_write(s, val, 2);
  317. break;
  318. default:
  319. break;
  320. }
  321. }
  322. static const MemoryRegionOps ls7a_rtc_ops = {
  323. .read = ls7a_rtc_read,
  324. .write = ls7a_rtc_write,
  325. .endianness = DEVICE_LITTLE_ENDIAN,
  326. .valid = {
  327. .min_access_size = 4,
  328. .max_access_size = 4,
  329. },
  330. };
  331. static void toy_timer_cb(void *opaque)
  332. {
  333. LS7ARtcState *s = opaque;
  334. if (toy_enabled(s)) {
  335. qemu_irq_raise(s->irq);
  336. }
  337. }
  338. static void rtc_timer_cb(void *opaque)
  339. {
  340. LS7ARtcState *s = opaque;
  341. if (rtc_enabled(s)) {
  342. qemu_irq_raise(s->irq);
  343. }
  344. }
  345. static void ls7a_rtc_realize(DeviceState *dev, Error **errp)
  346. {
  347. int i;
  348. SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  349. LS7ARtcState *d = LS7A_RTC(sbd);
  350. memory_region_init_io(&d->iomem, NULL, &ls7a_rtc_ops,
  351. (void *)d, "ls7a_rtc", 0x100);
  352. sysbus_init_irq(sbd, &d->irq);
  353. sysbus_init_mmio(sbd, &d->iomem);
  354. for (i = 0; i < TIMER_NUMS; i++) {
  355. d->toymatch[i] = 0;
  356. d->rtcmatch[i] = 0;
  357. d->toy_timer[i] = timer_new_ms(rtc_clock, toy_timer_cb, d);
  358. d->rtc_timer[i] = timer_new_ms(rtc_clock, rtc_timer_cb, d);
  359. }
  360. d->offset_toy = 0;
  361. d->offset_rtc = 0;
  362. }
  363. /* delete timer and clear reg when reset */
  364. static void ls7a_rtc_reset(DeviceState *dev)
  365. {
  366. int i;
  367. SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  368. LS7ARtcState *d = LS7A_RTC(sbd);
  369. for (i = 0; i < TIMER_NUMS; i++) {
  370. if (toy_enabled(d)) {
  371. timer_del(d->toy_timer[i]);
  372. }
  373. if (rtc_enabled(d)) {
  374. timer_del(d->rtc_timer[i]);
  375. }
  376. d->toymatch[i] = 0;
  377. d->rtcmatch[i] = 0;
  378. }
  379. d->cntrctl = 0;
  380. }
  381. static int ls7a_rtc_pre_save(void *opaque)
  382. {
  383. LS7ARtcState *s = LS7A_RTC(opaque);
  384. ls7a_toy_stop(s);
  385. ls7a_rtc_stop(s);
  386. return 0;
  387. }
  388. static int ls7a_rtc_post_load(void *opaque, int version_id)
  389. {
  390. LS7ARtcState *s = LS7A_RTC(opaque);
  391. if (toy_enabled(s)) {
  392. ls7a_toy_start(s);
  393. }
  394. if (rtc_enabled(s)) {
  395. ls7a_rtc_start(s);
  396. }
  397. return 0;
  398. }
  399. static const VMStateDescription vmstate_ls7a_rtc = {
  400. .name = "ls7a_rtc",
  401. .version_id = 1,
  402. .minimum_version_id = 1,
  403. .pre_save = ls7a_rtc_pre_save,
  404. .post_load = ls7a_rtc_post_load,
  405. .fields = (VMStateField[]) {
  406. VMSTATE_INT64(offset_toy, LS7ARtcState),
  407. VMSTATE_INT64(offset_rtc, LS7ARtcState),
  408. VMSTATE_UINT32_ARRAY(toymatch, LS7ARtcState, TIMER_NUMS),
  409. VMSTATE_UINT32_ARRAY(rtcmatch, LS7ARtcState, TIMER_NUMS),
  410. VMSTATE_UINT32(cntrctl, LS7ARtcState),
  411. VMSTATE_END_OF_LIST()
  412. }
  413. };
  414. static void ls7a_rtc_class_init(ObjectClass *klass, void *data)
  415. {
  416. DeviceClass *dc = DEVICE_CLASS(klass);
  417. dc->vmsd = &vmstate_ls7a_rtc;
  418. dc->realize = ls7a_rtc_realize;
  419. dc->reset = ls7a_rtc_reset;
  420. dc->desc = "ls7a rtc";
  421. }
  422. static const TypeInfo ls7a_rtc_info = {
  423. .name = TYPE_LS7A_RTC,
  424. .parent = TYPE_SYS_BUS_DEVICE,
  425. .instance_size = sizeof(LS7ARtcState),
  426. .class_init = ls7a_rtc_class_init,
  427. };
  428. static void ls7a_rtc_register_types(void)
  429. {
  430. type_register_static(&ls7a_rtc_info);
  431. }
  432. type_init(ls7a_rtc_register_types)