pci-hmp-cmds.c 8.0 KB

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  1. /*
  2. * HMP commands related to PCI
  3. *
  4. * Copyright IBM, Corp. 2011
  5. *
  6. * Authors:
  7. * Anthony Liguori <aliguori@us.ibm.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "hw/pci/pci.h"
  17. #include "hw/pci/pci_device.h"
  18. #include "monitor/hmp.h"
  19. #include "monitor/monitor.h"
  20. #include "pci-internal.h"
  21. #include "qapi/error.h"
  22. #include "qapi/qmp/qdict.h"
  23. #include "qapi/qapi-commands-pci.h"
  24. #include "qemu/cutils.h"
  25. static void hmp_info_pci_device(Monitor *mon, const PciDeviceInfo *dev)
  26. {
  27. PciMemoryRegionList *region;
  28. monitor_printf(mon, " Bus %2" PRId64 ", ", dev->bus);
  29. monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n",
  30. dev->slot, dev->function);
  31. monitor_printf(mon, " ");
  32. if (dev->class_info->desc) {
  33. monitor_puts(mon, dev->class_info->desc);
  34. } else {
  35. monitor_printf(mon, "Class %04" PRId64, dev->class_info->q_class);
  36. }
  37. monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n",
  38. dev->id->vendor, dev->id->device);
  39. if (dev->id->has_subsystem_vendor && dev->id->has_subsystem) {
  40. monitor_printf(mon, " PCI subsystem %04" PRIx64 ":%04" PRIx64 "\n",
  41. dev->id->subsystem_vendor, dev->id->subsystem);
  42. }
  43. if (dev->has_irq) {
  44. monitor_printf(mon, " IRQ %" PRId64 ", pin %c\n",
  45. dev->irq, (char)('A' + dev->irq_pin - 1));
  46. }
  47. if (dev->pci_bridge) {
  48. monitor_printf(mon, " BUS %" PRId64 ".\n",
  49. dev->pci_bridge->bus->number);
  50. monitor_printf(mon, " secondary bus %" PRId64 ".\n",
  51. dev->pci_bridge->bus->secondary);
  52. monitor_printf(mon, " subordinate bus %" PRId64 ".\n",
  53. dev->pci_bridge->bus->subordinate);
  54. monitor_printf(mon, " IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
  55. dev->pci_bridge->bus->io_range->base,
  56. dev->pci_bridge->bus->io_range->limit);
  57. monitor_printf(mon,
  58. " memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
  59. dev->pci_bridge->bus->memory_range->base,
  60. dev->pci_bridge->bus->memory_range->limit);
  61. monitor_printf(mon, " prefetchable memory range "
  62. "[0x%08"PRIx64", 0x%08"PRIx64"]\n",
  63. dev->pci_bridge->bus->prefetchable_range->base,
  64. dev->pci_bridge->bus->prefetchable_range->limit);
  65. }
  66. for (region = dev->regions; region; region = region->next) {
  67. uint64_t addr, size;
  68. addr = region->value->address;
  69. size = region->value->size;
  70. monitor_printf(mon, " BAR%" PRId64 ": ", region->value->bar);
  71. if (!strcmp(region->value->type, "io")) {
  72. monitor_printf(mon, "I/O at 0x%04" PRIx64
  73. " [0x%04" PRIx64 "].\n",
  74. addr, addr + size - 1);
  75. } else {
  76. monitor_printf(mon, "%d bit%s memory at 0x%08" PRIx64
  77. " [0x%08" PRIx64 "].\n",
  78. region->value->mem_type_64 ? 64 : 32,
  79. region->value->prefetch ? " prefetchable" : "",
  80. addr, addr + size - 1);
  81. }
  82. }
  83. monitor_printf(mon, " id \"%s\"\n", dev->qdev_id);
  84. if (dev->pci_bridge) {
  85. if (dev->pci_bridge->has_devices) {
  86. PciDeviceInfoList *cdev;
  87. for (cdev = dev->pci_bridge->devices; cdev; cdev = cdev->next) {
  88. hmp_info_pci_device(mon, cdev->value);
  89. }
  90. }
  91. }
  92. }
  93. void hmp_info_pci(Monitor *mon, const QDict *qdict)
  94. {
  95. PciInfoList *info_list, *info;
  96. info_list = qmp_query_pci(&error_abort);
  97. for (info = info_list; info; info = info->next) {
  98. PciDeviceInfoList *dev;
  99. for (dev = info->value->devices; dev; dev = dev->next) {
  100. hmp_info_pci_device(mon, dev->value);
  101. }
  102. }
  103. qapi_free_PciInfoList(info_list);
  104. }
  105. void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
  106. {
  107. PCIDevice *d = (PCIDevice *)dev;
  108. int class = pci_get_word(d->config + PCI_CLASS_DEVICE);
  109. const pci_class_desc *desc = get_class_desc(class);
  110. char ctxt[64];
  111. PCIIORegion *r;
  112. int i;
  113. if (desc->desc) {
  114. snprintf(ctxt, sizeof(ctxt), "%s", desc->desc);
  115. } else {
  116. snprintf(ctxt, sizeof(ctxt), "Class %04x", class);
  117. }
  118. monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
  119. "pci id %04x:%04x (sub %04x:%04x)\n",
  120. indent, "", ctxt, pci_dev_bus_num(d),
  121. PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
  122. pci_get_word(d->config + PCI_VENDOR_ID),
  123. pci_get_word(d->config + PCI_DEVICE_ID),
  124. pci_get_word(d->config + PCI_SUBSYSTEM_VENDOR_ID),
  125. pci_get_word(d->config + PCI_SUBSYSTEM_ID));
  126. for (i = 0; i < PCI_NUM_REGIONS; i++) {
  127. r = &d->io_regions[i];
  128. if (!r->size) {
  129. continue;
  130. }
  131. monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS
  132. " [0x%"FMT_PCIBUS"]\n",
  133. indent, "",
  134. i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem",
  135. r->addr, r->addr + r->size - 1);
  136. }
  137. }
  138. void hmp_pcie_aer_inject_error(Monitor *mon, const QDict *qdict)
  139. {
  140. Error *err = NULL;
  141. const char *id = qdict_get_str(qdict, "id");
  142. const char *error_name;
  143. uint32_t error_status;
  144. unsigned int num;
  145. bool correctable;
  146. PCIDevice *dev;
  147. PCIEAERErr aer_err;
  148. int ret;
  149. ret = pci_qdev_find_device(id, &dev);
  150. if (ret == -ENODEV) {
  151. error_setg(&err, "device '%s' not found", id);
  152. goto out;
  153. }
  154. if (ret < 0 || !pci_is_express(dev)) {
  155. error_setg(&err, "device '%s' is not a PCIe device", id);
  156. goto out;
  157. }
  158. error_name = qdict_get_str(qdict, "error_status");
  159. if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) {
  160. if (qemu_strtoui(error_name, NULL, 0, &num) < 0) {
  161. error_setg(&err, "invalid error status value '%s'", error_name);
  162. goto out;
  163. }
  164. error_status = num;
  165. correctable = qdict_get_try_bool(qdict, "correctable", false);
  166. } else {
  167. if (qdict_haskey(qdict, "correctable")) {
  168. error_setg(&err, "-c is only valid with numeric error status");
  169. goto out;
  170. }
  171. }
  172. aer_err.status = error_status;
  173. aer_err.source_id = pci_requester_id(dev);
  174. aer_err.flags = 0;
  175. if (correctable) {
  176. aer_err.flags |= PCIE_AER_ERR_IS_CORRECTABLE;
  177. }
  178. if (qdict_get_try_bool(qdict, "advisory_non_fatal", false)) {
  179. aer_err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY;
  180. }
  181. if (qdict_haskey(qdict, "header0")) {
  182. aer_err.flags |= PCIE_AER_ERR_HEADER_VALID;
  183. }
  184. if (qdict_haskey(qdict, "prefix0")) {
  185. aer_err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT;
  186. }
  187. aer_err.header[0] = qdict_get_try_int(qdict, "header0", 0);
  188. aer_err.header[1] = qdict_get_try_int(qdict, "header1", 0);
  189. aer_err.header[2] = qdict_get_try_int(qdict, "header2", 0);
  190. aer_err.header[3] = qdict_get_try_int(qdict, "header3", 0);
  191. aer_err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0);
  192. aer_err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0);
  193. aer_err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0);
  194. aer_err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0);
  195. ret = pcie_aer_inject_error(dev, &aer_err);
  196. if (ret < 0) {
  197. error_setg_errno(&err, -ret, "failed to inject error");
  198. goto out;
  199. }
  200. monitor_printf(mon, "OK id: %s root bus: %s, bus: %x devfn: %x.%x\n",
  201. id, pci_root_bus_path(dev), pci_dev_bus_num(dev),
  202. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  203. out:
  204. hmp_handle_error(mon, err);
  205. }