xen-pvh-common.c 14 KB

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  1. /*
  2. * QEMU Xen PVH machine - common code.
  3. *
  4. * Copyright (c) 2024 Advanced Micro Devices, Inc.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0-or-later
  7. */
  8. #include "qemu/osdep.h"
  9. #include "qemu/error-report.h"
  10. #include "qapi/error.h"
  11. #include "qapi/visitor.h"
  12. #include "hw/boards.h"
  13. #include "hw/irq.h"
  14. #include "hw/sysbus.h"
  15. #include "system/system.h"
  16. #include "system/tpm.h"
  17. #include "system/tpm_backend.h"
  18. #include "hw/xen/xen-pvh-common.h"
  19. #include "trace.h"
  20. static const MemoryListener xen_memory_listener = {
  21. .region_add = xen_region_add,
  22. .region_del = xen_region_del,
  23. .log_start = NULL,
  24. .log_stop = NULL,
  25. .log_sync = NULL,
  26. .log_global_start = NULL,
  27. .log_global_stop = NULL,
  28. .priority = MEMORY_LISTENER_PRIORITY_ACCEL,
  29. };
  30. static void xen_pvh_init_ram(XenPVHMachineState *s,
  31. MemoryRegion *sysmem)
  32. {
  33. MachineState *ms = MACHINE(s);
  34. ram_addr_t block_len, ram_size[2];
  35. if (ms->ram_size <= s->cfg.ram_low.size) {
  36. ram_size[0] = ms->ram_size;
  37. ram_size[1] = 0;
  38. block_len = s->cfg.ram_low.base + ram_size[0];
  39. } else {
  40. ram_size[0] = s->cfg.ram_low.size;
  41. ram_size[1] = ms->ram_size - s->cfg.ram_low.size;
  42. block_len = s->cfg.ram_high.base + ram_size[1];
  43. }
  44. memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
  45. &error_fatal);
  46. memory_region_init_alias(&s->ram.low, NULL, "xen.ram.lo", &xen_memory,
  47. s->cfg.ram_low.base, ram_size[0]);
  48. memory_region_add_subregion(sysmem, s->cfg.ram_low.base, &s->ram.low);
  49. if (ram_size[1] > 0) {
  50. memory_region_init_alias(&s->ram.high, NULL, "xen.ram.hi", &xen_memory,
  51. s->cfg.ram_high.base, ram_size[1]);
  52. memory_region_add_subregion(sysmem, s->cfg.ram_high.base, &s->ram.high);
  53. }
  54. /* Setup support for grants. */
  55. memory_region_init_ram(&xen_grants, NULL, "xen.grants", block_len,
  56. &error_fatal);
  57. memory_region_add_subregion(sysmem, XEN_GRANT_ADDR_OFF, &xen_grants);
  58. }
  59. static void xen_set_irq(void *opaque, int irq, int level)
  60. {
  61. if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) {
  62. error_report("xendevicemodel_set_irq_level failed");
  63. }
  64. }
  65. static void xen_create_virtio_mmio_devices(XenPVHMachineState *s)
  66. {
  67. int i;
  68. /*
  69. * We create the transports in reverse order. Since qbus_realize()
  70. * prepends (not appends) new child buses, the decrementing loop below will
  71. * create a list of virtio-mmio buses with increasing base addresses.
  72. *
  73. * When a -device option is processed from the command line,
  74. * qbus_find_recursive() picks the next free virtio-mmio bus in forwards
  75. * order.
  76. *
  77. * This is what the Xen tools expect.
  78. */
  79. for (i = s->cfg.virtio_mmio_num - 1; i >= 0; i--) {
  80. hwaddr base = s->cfg.virtio_mmio.base + i * s->cfg.virtio_mmio.size;
  81. qemu_irq irq = qemu_allocate_irq(xen_set_irq, NULL,
  82. s->cfg.virtio_mmio_irq_base + i);
  83. sysbus_create_simple("virtio-mmio", base, irq);
  84. trace_xen_create_virtio_mmio_devices(i,
  85. s->cfg.virtio_mmio_irq_base + i,
  86. base);
  87. }
  88. }
  89. #ifdef CONFIG_TPM
  90. static void xen_enable_tpm(XenPVHMachineState *s)
  91. {
  92. Error *errp = NULL;
  93. DeviceState *dev;
  94. SysBusDevice *busdev;
  95. TPMBackend *be = qemu_find_tpm_be("tpm0");
  96. if (be == NULL) {
  97. error_report("Couldn't find tmp0 backend");
  98. return;
  99. }
  100. dev = qdev_new(TYPE_TPM_TIS_SYSBUS);
  101. object_property_set_link(OBJECT(dev), "tpmdev", OBJECT(be), &errp);
  102. object_property_set_str(OBJECT(dev), "tpmdev", be->id, &errp);
  103. busdev = SYS_BUS_DEVICE(dev);
  104. sysbus_realize_and_unref(busdev, &error_fatal);
  105. sysbus_mmio_map(busdev, 0, s->cfg.tpm.base);
  106. trace_xen_enable_tpm(s->cfg.tpm.base);
  107. }
  108. #endif
  109. /*
  110. * We use the GPEX PCIe controller with its internal INTX PCI interrupt
  111. * swizzling. This swizzling is emulated in QEMU and routes all INTX
  112. * interrupts from endpoints down to only 4 INTX interrupts.
  113. * See include/hw/pci/pci.h : pci_swizzle()
  114. */
  115. static inline void xenpvh_gpex_init(XenPVHMachineState *s,
  116. XenPVHMachineClass *xpc,
  117. MemoryRegion *sysmem)
  118. {
  119. MemoryRegion *ecam_reg;
  120. MemoryRegion *mmio_reg;
  121. DeviceState *dev;
  122. int i;
  123. object_initialize_child(OBJECT(s), "gpex", &s->pci.gpex,
  124. TYPE_GPEX_HOST);
  125. dev = DEVICE(&s->pci.gpex);
  126. sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  127. ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
  128. memory_region_add_subregion(sysmem, s->cfg.pci_ecam.base, ecam_reg);
  129. mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
  130. if (s->cfg.pci_mmio.size) {
  131. memory_region_init_alias(&s->pci.mmio_alias, OBJECT(dev), "pcie-mmio",
  132. mmio_reg,
  133. s->cfg.pci_mmio.base, s->cfg.pci_mmio.size);
  134. memory_region_add_subregion(sysmem, s->cfg.pci_mmio.base,
  135. &s->pci.mmio_alias);
  136. }
  137. if (s->cfg.pci_mmio_high.size) {
  138. memory_region_init_alias(&s->pci.mmio_high_alias, OBJECT(dev),
  139. "pcie-mmio-high",
  140. mmio_reg, s->cfg.pci_mmio_high.base, s->cfg.pci_mmio_high.size);
  141. memory_region_add_subregion(sysmem, s->cfg.pci_mmio_high.base,
  142. &s->pci.mmio_high_alias);
  143. }
  144. /*
  145. * PVH implementations with PCI enabled must provide set_pci_intx_irq()
  146. * and optionally an implementation of set_pci_link_route().
  147. */
  148. assert(xpc->set_pci_intx_irq);
  149. for (i = 0; i < PCI_NUM_PINS; i++) {
  150. qemu_irq irq = qemu_allocate_irq(xpc->set_pci_intx_irq, s, i);
  151. sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, irq);
  152. gpex_set_irq_num(GPEX_HOST(dev), i, s->cfg.pci_intx_irq_base + i);
  153. if (xpc->set_pci_link_route) {
  154. xpc->set_pci_link_route(i, s->cfg.pci_intx_irq_base + i);
  155. }
  156. }
  157. }
  158. static void xen_pvh_init(MachineState *ms)
  159. {
  160. XenPVHMachineState *s = XEN_PVH_MACHINE(ms);
  161. XenPVHMachineClass *xpc = XEN_PVH_MACHINE_GET_CLASS(s);
  162. MemoryRegion *sysmem = get_system_memory();
  163. if (ms->ram_size == 0) {
  164. warn_report("%s: ram size not specified. QEMU machine started"
  165. " without IOREQ (no emulated devices including virtio)",
  166. MACHINE_CLASS(object_get_class(OBJECT(ms)))->desc);
  167. return;
  168. }
  169. xen_pvh_init_ram(s, sysmem);
  170. xen_register_ioreq(&s->ioreq, ms->smp.max_cpus,
  171. xpc->handle_bufioreq,
  172. &xen_memory_listener);
  173. if (s->cfg.virtio_mmio_num) {
  174. xen_create_virtio_mmio_devices(s);
  175. }
  176. #ifdef CONFIG_TPM
  177. if (xpc->has_tpm) {
  178. if (s->cfg.tpm.base) {
  179. xen_enable_tpm(s);
  180. } else {
  181. warn_report("tpm-base-addr is not set. TPM will not be enabled");
  182. }
  183. }
  184. #endif
  185. /* Non-zero pci-ecam-size enables PCI. */
  186. if (s->cfg.pci_ecam.size) {
  187. if (s->cfg.pci_ecam.size != 256 * MiB) {
  188. error_report("pci-ecam-size only supports values 0 or 0x10000000");
  189. exit(EXIT_FAILURE);
  190. }
  191. if (!s->cfg.pci_intx_irq_base) {
  192. error_report("PCI enabled but pci-intx-irq-base not set");
  193. exit(EXIT_FAILURE);
  194. }
  195. xenpvh_gpex_init(s, xpc, sysmem);
  196. }
  197. /* Call the implementation specific init. */
  198. if (xpc->init) {
  199. xpc->init(ms);
  200. }
  201. }
  202. #define XEN_PVH_PROP_MEMMAP_SETTER(n, f) \
  203. static void xen_pvh_set_ ## n ## _ ## f(Object *obj, Visitor *v, \
  204. const char *name, void *opaque, \
  205. Error **errp) \
  206. { \
  207. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
  208. uint64_t value; \
  209. \
  210. if (!visit_type_size(v, name, &value, errp)) { \
  211. return; \
  212. } \
  213. xp->cfg.n.f = value; \
  214. }
  215. #define XEN_PVH_PROP_MEMMAP_GETTER(n, f) \
  216. static void xen_pvh_get_ ## n ## _ ## f(Object *obj, Visitor *v, \
  217. const char *name, void *opaque, \
  218. Error **errp) \
  219. { \
  220. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); \
  221. uint64_t value = xp->cfg.n.f; \
  222. \
  223. visit_type_uint64(v, name, &value, errp); \
  224. }
  225. #define XEN_PVH_PROP_MEMMAP_BASE(n) \
  226. XEN_PVH_PROP_MEMMAP_SETTER(n, base) \
  227. XEN_PVH_PROP_MEMMAP_GETTER(n, base) \
  228. #define XEN_PVH_PROP_MEMMAP_SIZE(n) \
  229. XEN_PVH_PROP_MEMMAP_SETTER(n, size) \
  230. XEN_PVH_PROP_MEMMAP_GETTER(n, size)
  231. #define XEN_PVH_PROP_MEMMAP(n) \
  232. XEN_PVH_PROP_MEMMAP_BASE(n) \
  233. XEN_PVH_PROP_MEMMAP_SIZE(n)
  234. XEN_PVH_PROP_MEMMAP(ram_low)
  235. XEN_PVH_PROP_MEMMAP(ram_high)
  236. /* TPM only has a base-addr option. */
  237. XEN_PVH_PROP_MEMMAP_BASE(tpm)
  238. XEN_PVH_PROP_MEMMAP(virtio_mmio)
  239. XEN_PVH_PROP_MEMMAP(pci_ecam)
  240. XEN_PVH_PROP_MEMMAP(pci_mmio)
  241. XEN_PVH_PROP_MEMMAP(pci_mmio_high)
  242. static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v,
  243. const char *name, void *opaque,
  244. Error **errp)
  245. {
  246. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
  247. uint32_t value;
  248. if (!visit_type_uint32(v, name, &value, errp)) {
  249. return;
  250. }
  251. xp->cfg.pci_intx_irq_base = value;
  252. }
  253. static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v,
  254. const char *name, void *opaque,
  255. Error **errp)
  256. {
  257. XenPVHMachineState *xp = XEN_PVH_MACHINE(obj);
  258. uint32_t value = xp->cfg.pci_intx_irq_base;
  259. visit_type_uint32(v, name, &value, errp);
  260. }
  261. void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc)
  262. {
  263. ObjectClass *oc = OBJECT_CLASS(xpc);
  264. MachineClass *mc = MACHINE_CLASS(xpc);
  265. #define OC_MEMMAP_PROP_BASE(c, prop_name, name) \
  266. do { \
  267. object_class_property_add(c, prop_name "-base", "uint64_t", \
  268. xen_pvh_get_ ## name ## _base, \
  269. xen_pvh_set_ ## name ## _base, NULL, NULL); \
  270. object_class_property_set_description(oc, prop_name "-base", \
  271. "Set base address for " prop_name); \
  272. } while (0)
  273. #define OC_MEMMAP_PROP_SIZE(c, prop_name, name) \
  274. do { \
  275. object_class_property_add(c, prop_name "-size", "uint64_t", \
  276. xen_pvh_get_ ## name ## _size, \
  277. xen_pvh_set_ ## name ## _size, NULL, NULL); \
  278. object_class_property_set_description(oc, prop_name "-size", \
  279. "Set memory range size for " prop_name); \
  280. } while (0)
  281. #define OC_MEMMAP_PROP(c, prop_name, name) \
  282. do { \
  283. OC_MEMMAP_PROP_BASE(c, prop_name, name); \
  284. OC_MEMMAP_PROP_SIZE(c, prop_name, name); \
  285. } while (0)
  286. /*
  287. * We provide memmap properties to allow Xen to move things to other
  288. * addresses for example when users need to accomodate the memory-map
  289. * for 1:1 mapped devices/memory.
  290. */
  291. OC_MEMMAP_PROP(oc, "ram-low", ram_low);
  292. OC_MEMMAP_PROP(oc, "ram-high", ram_high);
  293. if (xpc->has_virtio_mmio) {
  294. OC_MEMMAP_PROP(oc, "virtio-mmio", virtio_mmio);
  295. }
  296. if (xpc->has_pci) {
  297. OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam);
  298. OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio);
  299. OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high);
  300. object_class_property_add(oc, "pci-intx-irq-base", "uint32_t",
  301. xen_pvh_get_pci_intx_irq_base,
  302. xen_pvh_set_pci_intx_irq_base,
  303. NULL, NULL);
  304. object_class_property_set_description(oc, "pci-intx-irq-base",
  305. "Set PCI INTX interrupt base line.");
  306. }
  307. #ifdef CONFIG_TPM
  308. if (xpc->has_tpm) {
  309. object_class_property_add(oc, "tpm-base-addr", "uint64_t",
  310. xen_pvh_get_tpm_base,
  311. xen_pvh_set_tpm_base,
  312. NULL, NULL);
  313. object_class_property_set_description(oc, "tpm-base-addr",
  314. "Set Base address for TPM device.");
  315. machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
  316. }
  317. #endif
  318. }
  319. static void xen_pvh_class_init(ObjectClass *oc, void *data)
  320. {
  321. MachineClass *mc = MACHINE_CLASS(oc);
  322. mc->init = xen_pvh_init;
  323. mc->desc = "Xen PVH machine";
  324. mc->max_cpus = 1;
  325. mc->default_machine_opts = "accel=xen";
  326. /* Set to zero to make sure that the real ram size is passed. */
  327. mc->default_ram_size = 0;
  328. }
  329. static const TypeInfo xen_pvh_info = {
  330. .name = TYPE_XEN_PVH_MACHINE,
  331. .parent = TYPE_MACHINE,
  332. .abstract = true,
  333. .instance_size = sizeof(XenPVHMachineState),
  334. .class_size = sizeof(XenPVHMachineClass),
  335. .class_init = xen_pvh_class_init,
  336. };
  337. static void xen_pvh_register_types(void)
  338. {
  339. type_register_static(&xen_pvh_info);
  340. }
  341. type_init(xen_pvh_register_types);