ssd0323.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388
  1. /*
  2. * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
  3. *
  4. * Copyright (c) 2006-2007 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GPL.
  8. */
  9. /* The controller can support a variety of different displays, but we only
  10. implement one. Most of the commands relating to brightness and geometry
  11. setup are ignored. */
  12. #include "qemu/osdep.h"
  13. #include "hw/ssi/ssi.h"
  14. #include "migration/vmstate.h"
  15. #include "qemu/module.h"
  16. #include "ui/console.h"
  17. #include "qom/object.h"
  18. //#define DEBUG_SSD0323 1
  19. #ifdef DEBUG_SSD0323
  20. #define DPRINTF(fmt, ...) \
  21. do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
  22. #define BADF(fmt, ...) \
  23. do { \
  24. fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
  25. } while (0)
  26. #else
  27. #define DPRINTF(fmt, ...) do {} while(0)
  28. #define BADF(fmt, ...) \
  29. do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
  30. #endif
  31. /* Scaling factor for pixels. */
  32. #define MAGNIFY 4
  33. #define REMAP_SWAP_COLUMN 0x01
  34. #define REMAP_SWAP_NYBBLE 0x02
  35. #define REMAP_VERTICAL 0x04
  36. #define REMAP_SWAP_COM 0x10
  37. #define REMAP_SPLIT_COM 0x40
  38. enum ssd0323_mode
  39. {
  40. SSD0323_CMD,
  41. SSD0323_DATA
  42. };
  43. struct ssd0323_state {
  44. SSIPeripheral ssidev;
  45. QemuConsole *con;
  46. uint32_t cmd_len;
  47. int32_t cmd;
  48. int32_t cmd_data[8];
  49. int32_t row;
  50. int32_t row_start;
  51. int32_t row_end;
  52. int32_t col;
  53. int32_t col_start;
  54. int32_t col_end;
  55. int32_t redraw;
  56. int32_t remap;
  57. uint32_t mode;
  58. uint8_t framebuffer[128 * 80 / 2];
  59. };
  60. #define TYPE_SSD0323 "ssd0323"
  61. OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
  62. static uint32_t ssd0323_transfer(SSIPeripheral *dev, uint32_t data)
  63. {
  64. ssd0323_state *s = SSD0323(dev);
  65. switch (s->mode) {
  66. case SSD0323_DATA:
  67. DPRINTF("data 0x%02x\n", data);
  68. s->framebuffer[s->col + s->row * 64] = data;
  69. if (s->remap & REMAP_VERTICAL) {
  70. s->row++;
  71. if (s->row > s->row_end) {
  72. s->row = s->row_start;
  73. s->col++;
  74. }
  75. if (s->col > s->col_end) {
  76. s->col = s->col_start;
  77. }
  78. } else {
  79. s->col++;
  80. if (s->col > s->col_end) {
  81. s->row++;
  82. s->col = s->col_start;
  83. }
  84. if (s->row > s->row_end) {
  85. s->row = s->row_start;
  86. }
  87. }
  88. s->redraw = 1;
  89. break;
  90. case SSD0323_CMD:
  91. DPRINTF("cmd 0x%02x\n", data);
  92. if (s->cmd_len == 0) {
  93. s->cmd = data;
  94. } else {
  95. s->cmd_data[s->cmd_len - 1] = data;
  96. }
  97. s->cmd_len++;
  98. switch (s->cmd) {
  99. #define DATA(x) if (s->cmd_len <= (x)) return 0
  100. case 0x15: /* Set column. */
  101. DATA(2);
  102. s->col = s->col_start = s->cmd_data[0] % 64;
  103. s->col_end = s->cmd_data[1] % 64;
  104. break;
  105. case 0x75: /* Set row. */
  106. DATA(2);
  107. s->row = s->row_start = s->cmd_data[0] % 80;
  108. s->row_end = s->cmd_data[1] % 80;
  109. break;
  110. case 0x81: /* Set contrast */
  111. DATA(1);
  112. break;
  113. case 0x84: case 0x85: case 0x86: /* Max current. */
  114. DATA(0);
  115. break;
  116. case 0xa0: /* Set remapping. */
  117. /* FIXME: Implement this. */
  118. DATA(1);
  119. s->remap = s->cmd_data[0];
  120. break;
  121. case 0xa1: /* Set display start line. */
  122. case 0xa2: /* Set display offset. */
  123. /* FIXME: Implement these. */
  124. DATA(1);
  125. break;
  126. case 0xa4: /* Normal mode. */
  127. case 0xa5: /* All on. */
  128. case 0xa6: /* All off. */
  129. case 0xa7: /* Inverse. */
  130. /* FIXME: Implement these. */
  131. DATA(0);
  132. break;
  133. case 0xa8: /* Set multiplex ratio. */
  134. case 0xad: /* Set DC-DC converter. */
  135. DATA(1);
  136. /* Ignored. Don't care. */
  137. break;
  138. case 0xae: /* Display off. */
  139. case 0xaf: /* Display on. */
  140. DATA(0);
  141. /* TODO: Implement power control. */
  142. break;
  143. case 0xb1: /* Set phase length. */
  144. case 0xb2: /* Set row period. */
  145. case 0xb3: /* Set clock rate. */
  146. case 0xbc: /* Set precharge. */
  147. case 0xbe: /* Set VCOMH. */
  148. case 0xbf: /* Set segment low. */
  149. DATA(1);
  150. /* Ignored. Don't care. */
  151. break;
  152. case 0xb8: /* Set grey scale table. */
  153. /* FIXME: Implement this. */
  154. DATA(8);
  155. break;
  156. case 0xe3: /* NOP. */
  157. DATA(0);
  158. break;
  159. case 0xff: /* Nasty hack because we don't handle chip selects
  160. properly. */
  161. break;
  162. default:
  163. BADF("Unknown command: 0x%x\n", data);
  164. }
  165. s->cmd_len = 0;
  166. return 0;
  167. }
  168. return 0;
  169. }
  170. static void ssd0323_update_display(void *opaque)
  171. {
  172. ssd0323_state *s = (ssd0323_state *)opaque;
  173. DisplaySurface *surface = qemu_console_surface(s->con);
  174. uint8_t *dest;
  175. uint8_t *src;
  176. int x;
  177. int y;
  178. int i;
  179. int line;
  180. char *colors[16];
  181. char colortab[MAGNIFY * 64];
  182. char *p;
  183. int dest_width;
  184. if (!s->redraw)
  185. return;
  186. switch (surface_bits_per_pixel(surface)) {
  187. case 0:
  188. return;
  189. case 15:
  190. dest_width = 2;
  191. break;
  192. case 16:
  193. dest_width = 2;
  194. break;
  195. case 24:
  196. dest_width = 3;
  197. break;
  198. case 32:
  199. dest_width = 4;
  200. break;
  201. default:
  202. BADF("Bad color depth\n");
  203. return;
  204. }
  205. p = colortab;
  206. for (i = 0; i < 16; i++) {
  207. int n;
  208. colors[i] = p;
  209. switch (surface_bits_per_pixel(surface)) {
  210. case 15:
  211. n = i * 2 + (i >> 3);
  212. p[0] = n | (n << 5);
  213. p[1] = (n << 2) | (n >> 3);
  214. break;
  215. case 16:
  216. n = i * 2 + (i >> 3);
  217. p[0] = n | (n << 6) | ((n << 1) & 0x20);
  218. p[1] = (n << 3) | (n >> 2);
  219. break;
  220. case 24:
  221. case 32:
  222. n = (i << 4) | i;
  223. p[0] = p[1] = p[2] = n;
  224. break;
  225. default:
  226. BADF("Bad color depth\n");
  227. return;
  228. }
  229. p += dest_width;
  230. }
  231. /* TODO: Implement row/column remapping. */
  232. dest = surface_data(surface);
  233. for (y = 0; y < 64; y++) {
  234. line = y;
  235. src = s->framebuffer + 64 * line;
  236. for (x = 0; x < 64; x++) {
  237. int val;
  238. val = *src >> 4;
  239. for (i = 0; i < MAGNIFY; i++) {
  240. memcpy(dest, colors[val], dest_width);
  241. dest += dest_width;
  242. }
  243. val = *src & 0xf;
  244. for (i = 0; i < MAGNIFY; i++) {
  245. memcpy(dest, colors[val], dest_width);
  246. dest += dest_width;
  247. }
  248. src++;
  249. }
  250. for (i = 1; i < MAGNIFY; i++) {
  251. memcpy(dest, dest - dest_width * MAGNIFY * 128,
  252. dest_width * 128 * MAGNIFY);
  253. dest += dest_width * 128 * MAGNIFY;
  254. }
  255. }
  256. s->redraw = 0;
  257. dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
  258. }
  259. static void ssd0323_invalidate_display(void * opaque)
  260. {
  261. ssd0323_state *s = (ssd0323_state *)opaque;
  262. s->redraw = 1;
  263. }
  264. /* Command/data input. */
  265. static void ssd0323_cd(void *opaque, int n, int level)
  266. {
  267. ssd0323_state *s = (ssd0323_state *)opaque;
  268. DPRINTF("%s mode\n", level ? "Data" : "Command");
  269. s->mode = level ? SSD0323_DATA : SSD0323_CMD;
  270. }
  271. static int ssd0323_post_load(void *opaque, int version_id)
  272. {
  273. ssd0323_state *s = (ssd0323_state *)opaque;
  274. if (s->cmd_len > ARRAY_SIZE(s->cmd_data)) {
  275. return -EINVAL;
  276. }
  277. if (s->row < 0 || s->row >= 80) {
  278. return -EINVAL;
  279. }
  280. if (s->row_start < 0 || s->row_start >= 80) {
  281. return -EINVAL;
  282. }
  283. if (s->row_end < 0 || s->row_end >= 80) {
  284. return -EINVAL;
  285. }
  286. if (s->col < 0 || s->col >= 64) {
  287. return -EINVAL;
  288. }
  289. if (s->col_start < 0 || s->col_start >= 64) {
  290. return -EINVAL;
  291. }
  292. if (s->col_end < 0 || s->col_end >= 64) {
  293. return -EINVAL;
  294. }
  295. if (s->mode != SSD0323_CMD && s->mode != SSD0323_DATA) {
  296. return -EINVAL;
  297. }
  298. return 0;
  299. }
  300. static const VMStateDescription vmstate_ssd0323 = {
  301. .name = "ssd0323_oled",
  302. .version_id = 2,
  303. .minimum_version_id = 2,
  304. .post_load = ssd0323_post_load,
  305. .fields = (const VMStateField []) {
  306. VMSTATE_UINT32(cmd_len, ssd0323_state),
  307. VMSTATE_INT32(cmd, ssd0323_state),
  308. VMSTATE_INT32_ARRAY(cmd_data, ssd0323_state, 8),
  309. VMSTATE_INT32(row, ssd0323_state),
  310. VMSTATE_INT32(row_start, ssd0323_state),
  311. VMSTATE_INT32(row_end, ssd0323_state),
  312. VMSTATE_INT32(col, ssd0323_state),
  313. VMSTATE_INT32(col_start, ssd0323_state),
  314. VMSTATE_INT32(col_end, ssd0323_state),
  315. VMSTATE_INT32(redraw, ssd0323_state),
  316. VMSTATE_INT32(remap, ssd0323_state),
  317. VMSTATE_UINT32(mode, ssd0323_state),
  318. VMSTATE_BUFFER(framebuffer, ssd0323_state),
  319. VMSTATE_SSI_PERIPHERAL(ssidev, ssd0323_state),
  320. VMSTATE_END_OF_LIST()
  321. }
  322. };
  323. static const GraphicHwOps ssd0323_ops = {
  324. .invalidate = ssd0323_invalidate_display,
  325. .gfx_update = ssd0323_update_display,
  326. };
  327. static void ssd0323_realize(SSIPeripheral *d, Error **errp)
  328. {
  329. DeviceState *dev = DEVICE(d);
  330. ssd0323_state *s = SSD0323(d);
  331. s->col_end = 63;
  332. s->row_end = 79;
  333. s->con = graphic_console_init(dev, 0, &ssd0323_ops, s);
  334. qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
  335. qdev_init_gpio_in(dev, ssd0323_cd, 1);
  336. }
  337. static void ssd0323_class_init(ObjectClass *klass, void *data)
  338. {
  339. DeviceClass *dc = DEVICE_CLASS(klass);
  340. SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
  341. k->realize = ssd0323_realize;
  342. k->transfer = ssd0323_transfer;
  343. k->cs_polarity = SSI_CS_HIGH;
  344. dc->vmsd = &vmstate_ssd0323;
  345. set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
  346. }
  347. static const TypeInfo ssd0323_info = {
  348. .name = TYPE_SSD0323,
  349. .parent = TYPE_SSI_PERIPHERAL,
  350. .instance_size = sizeof(ssd0323_state),
  351. .class_init = ssd0323_class_init,
  352. };
  353. static void ssd03232_register_types(void)
  354. {
  355. type_register_static(&ssd0323_info);
  356. }
  357. type_init(ssd03232_register_types)