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cpu-target.c 13 KB

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  1. /*
  2. * Target-specific parts of the CPU object
  3. *
  4. * Copyright (c) 2003 Fabrice Bellard
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "qemu/osdep.h"
  20. #include "qapi/error.h"
  21. #include "exec/target_page.h"
  22. #include "exec/page-protection.h"
  23. #include "hw/qdev-core.h"
  24. #include "hw/qdev-properties.h"
  25. #include "qemu/error-report.h"
  26. #include "qemu/qemu-print.h"
  27. #include "migration/vmstate.h"
  28. #ifdef CONFIG_USER_ONLY
  29. #include "qemu.h"
  30. #include "user/page-protection.h"
  31. #else
  32. #include "hw/core/sysemu-cpu-ops.h"
  33. #include "exec/address-spaces.h"
  34. #include "exec/memory.h"
  35. #endif
  36. #include "system/cpus.h"
  37. #include "system/tcg.h"
  38. #include "exec/tswap.h"
  39. #include "exec/replay-core.h"
  40. #include "exec/cpu-common.h"
  41. #include "exec/exec-all.h"
  42. #include "exec/tb-flush.h"
  43. #include "exec/translation-block.h"
  44. #include "exec/log.h"
  45. #include "hw/core/accel-cpu.h"
  46. #include "trace/trace-root.h"
  47. #include "qemu/accel.h"
  48. #ifndef CONFIG_USER_ONLY
  49. static int cpu_common_post_load(void *opaque, int version_id)
  50. {
  51. CPUState *cpu = opaque;
  52. /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  53. version_id is increased. */
  54. cpu->interrupt_request &= ~0x01;
  55. tlb_flush(cpu);
  56. /* loadvm has just updated the content of RAM, bypassing the
  57. * usual mechanisms that ensure we flush TBs for writes to
  58. * memory we've translated code from. So we must flush all TBs,
  59. * which will now be stale.
  60. */
  61. tb_flush(cpu);
  62. return 0;
  63. }
  64. static int cpu_common_pre_load(void *opaque)
  65. {
  66. CPUState *cpu = opaque;
  67. cpu->exception_index = -1;
  68. return 0;
  69. }
  70. static bool cpu_common_exception_index_needed(void *opaque)
  71. {
  72. CPUState *cpu = opaque;
  73. return tcg_enabled() && cpu->exception_index != -1;
  74. }
  75. static const VMStateDescription vmstate_cpu_common_exception_index = {
  76. .name = "cpu_common/exception_index",
  77. .version_id = 1,
  78. .minimum_version_id = 1,
  79. .needed = cpu_common_exception_index_needed,
  80. .fields = (const VMStateField[]) {
  81. VMSTATE_INT32(exception_index, CPUState),
  82. VMSTATE_END_OF_LIST()
  83. }
  84. };
  85. static bool cpu_common_crash_occurred_needed(void *opaque)
  86. {
  87. CPUState *cpu = opaque;
  88. return cpu->crash_occurred;
  89. }
  90. static const VMStateDescription vmstate_cpu_common_crash_occurred = {
  91. .name = "cpu_common/crash_occurred",
  92. .version_id = 1,
  93. .minimum_version_id = 1,
  94. .needed = cpu_common_crash_occurred_needed,
  95. .fields = (const VMStateField[]) {
  96. VMSTATE_BOOL(crash_occurred, CPUState),
  97. VMSTATE_END_OF_LIST()
  98. }
  99. };
  100. const VMStateDescription vmstate_cpu_common = {
  101. .name = "cpu_common",
  102. .version_id = 1,
  103. .minimum_version_id = 1,
  104. .pre_load = cpu_common_pre_load,
  105. .post_load = cpu_common_post_load,
  106. .fields = (const VMStateField[]) {
  107. VMSTATE_UINT32(halted, CPUState),
  108. VMSTATE_UINT32(interrupt_request, CPUState),
  109. VMSTATE_END_OF_LIST()
  110. },
  111. .subsections = (const VMStateDescription * const []) {
  112. &vmstate_cpu_common_exception_index,
  113. &vmstate_cpu_common_crash_occurred,
  114. NULL
  115. }
  116. };
  117. #endif
  118. bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
  119. {
  120. /* cache the cpu class for the hotpath */
  121. cpu->cc = CPU_GET_CLASS(cpu);
  122. if (!accel_cpu_common_realize(cpu, errp)) {
  123. return false;
  124. }
  125. /* Wait until cpu initialization complete before exposing cpu. */
  126. cpu_list_add(cpu);
  127. #ifdef CONFIG_USER_ONLY
  128. assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
  129. qdev_get_vmsd(DEVICE(cpu))->unmigratable);
  130. #else
  131. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  132. vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
  133. }
  134. if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
  135. vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
  136. }
  137. #endif /* CONFIG_USER_ONLY */
  138. return true;
  139. }
  140. void cpu_exec_unrealizefn(CPUState *cpu)
  141. {
  142. #ifndef CONFIG_USER_ONLY
  143. CPUClass *cc = CPU_GET_CLASS(cpu);
  144. if (cc->sysemu_ops->legacy_vmsd != NULL) {
  145. vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
  146. }
  147. if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
  148. vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
  149. }
  150. #endif
  151. cpu_list_remove(cpu);
  152. /*
  153. * Now that the vCPU has been removed from the RCU list, we can call
  154. * accel_cpu_common_unrealize, which may free fields using call_rcu.
  155. */
  156. accel_cpu_common_unrealize(cpu);
  157. }
  158. /*
  159. * This can't go in hw/core/cpu.c because that file is compiled only
  160. * once for both user-mode and system builds.
  161. */
  162. static const Property cpu_common_props[] = {
  163. #ifdef CONFIG_USER_ONLY
  164. /*
  165. * Create a property for the user-only object, so users can
  166. * adjust prctl(PR_SET_UNALIGN) from the command-line.
  167. * Has no effect if the target does not support the feature.
  168. */
  169. DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
  170. prctl_unalign_sigbus, false),
  171. #else
  172. /*
  173. * Create a memory property for system CPU object, so users can
  174. * wire up its memory. The default if no link is set up is to use
  175. * the system address space.
  176. */
  177. DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
  178. MemoryRegion *),
  179. #endif
  180. };
  181. #ifndef CONFIG_USER_ONLY
  182. static bool cpu_get_start_powered_off(Object *obj, Error **errp)
  183. {
  184. CPUState *cpu = CPU(obj);
  185. return cpu->start_powered_off;
  186. }
  187. static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
  188. {
  189. CPUState *cpu = CPU(obj);
  190. cpu->start_powered_off = value;
  191. }
  192. #endif
  193. void cpu_class_init_props(DeviceClass *dc)
  194. {
  195. #ifndef CONFIG_USER_ONLY
  196. ObjectClass *oc = OBJECT_CLASS(dc);
  197. /*
  198. * We can't use DEFINE_PROP_BOOL in the Property array for this
  199. * property, because we want this to be settable after realize.
  200. */
  201. object_class_property_add_bool(oc, "start-powered-off",
  202. cpu_get_start_powered_off,
  203. cpu_set_start_powered_off);
  204. #endif
  205. device_class_set_props(dc, cpu_common_props);
  206. }
  207. void cpu_exec_initfn(CPUState *cpu)
  208. {
  209. cpu->as = NULL;
  210. cpu->num_ases = 0;
  211. #ifndef CONFIG_USER_ONLY
  212. cpu->memory = get_system_memory();
  213. object_ref(OBJECT(cpu->memory));
  214. #endif
  215. }
  216. char *cpu_model_from_type(const char *typename)
  217. {
  218. const char *suffix = "-" CPU_RESOLVING_TYPE;
  219. if (!object_class_by_name(typename)) {
  220. return NULL;
  221. }
  222. if (g_str_has_suffix(typename, suffix)) {
  223. return g_strndup(typename, strlen(typename) - strlen(suffix));
  224. }
  225. return g_strdup(typename);
  226. }
  227. const char *parse_cpu_option(const char *cpu_option)
  228. {
  229. ObjectClass *oc;
  230. CPUClass *cc;
  231. gchar **model_pieces;
  232. const char *cpu_type;
  233. model_pieces = g_strsplit(cpu_option, ",", 2);
  234. if (!model_pieces[0]) {
  235. error_report("-cpu option cannot be empty");
  236. exit(1);
  237. }
  238. oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
  239. if (oc == NULL) {
  240. error_report("unable to find CPU model '%s'", model_pieces[0]);
  241. g_strfreev(model_pieces);
  242. exit(EXIT_FAILURE);
  243. }
  244. cpu_type = object_class_get_name(oc);
  245. cc = CPU_CLASS(oc);
  246. cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
  247. g_strfreev(model_pieces);
  248. return cpu_type;
  249. }
  250. #ifndef cpu_list
  251. static void cpu_list_entry(gpointer data, gpointer user_data)
  252. {
  253. CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
  254. const char *typename = object_class_get_name(OBJECT_CLASS(data));
  255. g_autofree char *model = cpu_model_from_type(typename);
  256. if (cc->deprecation_note) {
  257. qemu_printf(" %s (deprecated)\n", model);
  258. } else {
  259. qemu_printf(" %s\n", model);
  260. }
  261. }
  262. static void cpu_list(void)
  263. {
  264. GSList *list;
  265. list = object_class_get_list_sorted(TYPE_CPU, false);
  266. qemu_printf("Available CPUs:\n");
  267. g_slist_foreach(list, cpu_list_entry, NULL);
  268. g_slist_free(list);
  269. }
  270. #endif
  271. void list_cpus(void)
  272. {
  273. cpu_list();
  274. }
  275. /* enable or disable single step mode. EXCP_DEBUG is returned by the
  276. CPU loop after each instruction */
  277. void cpu_single_step(CPUState *cpu, int enabled)
  278. {
  279. int previous = cpu->singlestep_enabled;
  280. bool prev_debug_en = previous && !(previous & SSTEP_NODEBUG);
  281. bool cur_debug_en = enabled && !(enabled & SSTEP_NODEBUG);
  282. cpu->singlestep_enabled = enabled;
  283. if (prev_debug_en != cur_debug_en) {
  284. #if !defined(CONFIG_USER_ONLY)
  285. const AccelOpsClass *ops = cpus_get_accel();
  286. if (ops->update_guest_debug) {
  287. ops->update_guest_debug(cpu);
  288. }
  289. #endif
  290. trace_breakpoint_singlestep(cpu->cpu_index, enabled);
  291. }
  292. }
  293. void cpu_emulate(CPUState *cpu, bool enabled)
  294. {
  295. if (cpu->emulation_enabled != enabled) {
  296. cpu->emulation_enabled = enabled;
  297. if (enabled) {
  298. /* FIXME: track dirty code to improve performance */
  299. tb_flush(cpu);
  300. tlb_flush(cpu);
  301. }
  302. }
  303. }
  304. void cpu_abort(CPUState *cpu, const char *fmt, ...)
  305. {
  306. va_list ap;
  307. va_list ap2;
  308. va_start(ap, fmt);
  309. va_copy(ap2, ap);
  310. fprintf(stderr, "qemu: fatal: ");
  311. vfprintf(stderr, fmt, ap);
  312. fprintf(stderr, "\n");
  313. cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  314. if (qemu_log_separate()) {
  315. FILE *logfile = qemu_log_trylock();
  316. if (logfile) {
  317. fprintf(logfile, "qemu: fatal: ");
  318. vfprintf(logfile, fmt, ap2);
  319. fprintf(logfile, "\n");
  320. cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
  321. qemu_log_unlock(logfile);
  322. }
  323. }
  324. va_end(ap2);
  325. va_end(ap);
  326. replay_finish();
  327. #if defined(CONFIG_USER_ONLY)
  328. {
  329. struct sigaction act;
  330. sigfillset(&act.sa_mask);
  331. act.sa_handler = SIG_DFL;
  332. act.sa_flags = 0;
  333. sigaction(SIGABRT, &act, NULL);
  334. }
  335. #endif
  336. abort();
  337. }
  338. /* physical memory access (slow version, mainly for debug) */
  339. #if defined(CONFIG_USER_ONLY)
  340. int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
  341. void *ptr, size_t len, bool is_write)
  342. {
  343. int flags;
  344. vaddr l, page;
  345. void * p;
  346. uint8_t *buf = ptr;
  347. ssize_t written;
  348. int ret = -1;
  349. int fd = -1;
  350. while (len > 0) {
  351. page = addr & TARGET_PAGE_MASK;
  352. l = (page + TARGET_PAGE_SIZE) - addr;
  353. if (l > len)
  354. l = len;
  355. flags = page_get_flags(page);
  356. if (!(flags & PAGE_VALID)) {
  357. goto out_close;
  358. }
  359. if (is_write) {
  360. if (flags & PAGE_WRITE) {
  361. /* XXX: this code should not depend on lock_user */
  362. p = lock_user(VERIFY_WRITE, addr, l, 0);
  363. if (!p) {
  364. goto out_close;
  365. }
  366. memcpy(p, buf, l);
  367. unlock_user(p, addr, l);
  368. } else {
  369. /* Bypass the host page protection using ptrace. */
  370. if (fd == -1) {
  371. fd = open("/proc/self/mem", O_WRONLY);
  372. if (fd == -1) {
  373. goto out;
  374. }
  375. }
  376. /*
  377. * If there is a TranslationBlock and we weren't bypassing the
  378. * host page protection, the memcpy() above would SEGV,
  379. * ultimately leading to page_unprotect(). So invalidate the
  380. * translations manually. Both invalidation and pwrite() must
  381. * be under mmap_lock() in order to prevent the creation of
  382. * another TranslationBlock in between.
  383. */
  384. mmap_lock();
  385. tb_invalidate_phys_range(addr, addr + l - 1);
  386. written = pwrite(fd, buf, l,
  387. (off_t)(uintptr_t)g2h_untagged(addr));
  388. mmap_unlock();
  389. if (written != l) {
  390. goto out_close;
  391. }
  392. }
  393. } else if (flags & PAGE_READ) {
  394. /* XXX: this code should not depend on lock_user */
  395. p = lock_user(VERIFY_READ, addr, l, 1);
  396. if (!p) {
  397. goto out_close;
  398. }
  399. memcpy(buf, p, l);
  400. unlock_user(p, addr, 0);
  401. } else {
  402. /* Bypass the host page protection using ptrace. */
  403. if (fd == -1) {
  404. fd = open("/proc/self/mem", O_RDONLY);
  405. if (fd == -1) {
  406. goto out;
  407. }
  408. }
  409. if (pread(fd, buf, l,
  410. (off_t)(uintptr_t)g2h_untagged(addr)) != l) {
  411. goto out_close;
  412. }
  413. }
  414. len -= l;
  415. buf += l;
  416. addr += l;
  417. }
  418. ret = 0;
  419. out_close:
  420. if (fd != -1) {
  421. close(fd);
  422. }
  423. out:
  424. return ret;
  425. }
  426. #endif
  427. bool target_words_bigendian(void)
  428. {
  429. return TARGET_BIG_ENDIAN;
  430. }
  431. const char *target_name(void)
  432. {
  433. return TARGET_NAME;
  434. }