memory.c 83 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668
  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "qemu-common.h"
  18. #include "cpu.h"
  19. #include "exec/memory.h"
  20. #include "exec/address-spaces.h"
  21. #include "exec/ioport.h"
  22. #include "qapi/visitor.h"
  23. #include "qemu/bitops.h"
  24. #include "qemu/error-report.h"
  25. #include "qom/object.h"
  26. #include "trace-root.h"
  27. #include "exec/memory-internal.h"
  28. #include "exec/ram_addr.h"
  29. #include "sysemu/kvm.h"
  30. #include "sysemu/sysemu.h"
  31. //#define DEBUG_UNASSIGNED
  32. static unsigned memory_region_transaction_depth;
  33. static bool memory_region_update_pending;
  34. static bool ioeventfd_update_pending;
  35. static bool global_dirty_log = false;
  36. static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  37. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  38. static QTAILQ_HEAD(, AddressSpace) address_spaces
  39. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  40. typedef struct AddrRange AddrRange;
  41. /*
  42. * Note that signed integers are needed for negative offsetting in aliases
  43. * (large MemoryRegion::alias_offset).
  44. */
  45. struct AddrRange {
  46. Int128 start;
  47. Int128 size;
  48. };
  49. static AddrRange addrrange_make(Int128 start, Int128 size)
  50. {
  51. return (AddrRange) { start, size };
  52. }
  53. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  54. {
  55. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  56. }
  57. static Int128 addrrange_end(AddrRange r)
  58. {
  59. return int128_add(r.start, r.size);
  60. }
  61. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  62. {
  63. int128_addto(&range.start, delta);
  64. return range;
  65. }
  66. static bool addrrange_contains(AddrRange range, Int128 addr)
  67. {
  68. return int128_ge(addr, range.start)
  69. && int128_lt(addr, addrrange_end(range));
  70. }
  71. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  72. {
  73. return addrrange_contains(r1, r2.start)
  74. || addrrange_contains(r2, r1.start);
  75. }
  76. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  77. {
  78. Int128 start = int128_max(r1.start, r2.start);
  79. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  80. return addrrange_make(start, int128_sub(end, start));
  81. }
  82. enum ListenerDirection { Forward, Reverse };
  83. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  84. do { \
  85. MemoryListener *_listener; \
  86. \
  87. switch (_direction) { \
  88. case Forward: \
  89. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  90. if (_listener->_callback) { \
  91. _listener->_callback(_listener, ##_args); \
  92. } \
  93. } \
  94. break; \
  95. case Reverse: \
  96. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
  97. memory_listeners, link) { \
  98. if (_listener->_callback) { \
  99. _listener->_callback(_listener, ##_args); \
  100. } \
  101. } \
  102. break; \
  103. default: \
  104. abort(); \
  105. } \
  106. } while (0)
  107. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  108. do { \
  109. MemoryListener *_listener; \
  110. struct memory_listeners_as *list = &(_as)->listeners; \
  111. \
  112. switch (_direction) { \
  113. case Forward: \
  114. QTAILQ_FOREACH(_listener, list, link_as) { \
  115. if (_listener->_callback) { \
  116. _listener->_callback(_listener, _section, ##_args); \
  117. } \
  118. } \
  119. break; \
  120. case Reverse: \
  121. QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
  122. link_as) { \
  123. if (_listener->_callback) { \
  124. _listener->_callback(_listener, _section, ##_args); \
  125. } \
  126. } \
  127. break; \
  128. default: \
  129. abort(); \
  130. } \
  131. } while (0)
  132. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  133. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  134. do { \
  135. MemoryRegionSection mrs = section_from_flat_range(fr, as); \
  136. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  137. } while(0)
  138. struct CoalescedMemoryRange {
  139. AddrRange addr;
  140. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  141. };
  142. struct MemoryRegionIoeventfd {
  143. AddrRange addr;
  144. bool match_data;
  145. uint64_t data;
  146. EventNotifier *e;
  147. };
  148. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
  149. MemoryRegionIoeventfd b)
  150. {
  151. if (int128_lt(a.addr.start, b.addr.start)) {
  152. return true;
  153. } else if (int128_gt(a.addr.start, b.addr.start)) {
  154. return false;
  155. } else if (int128_lt(a.addr.size, b.addr.size)) {
  156. return true;
  157. } else if (int128_gt(a.addr.size, b.addr.size)) {
  158. return false;
  159. } else if (a.match_data < b.match_data) {
  160. return true;
  161. } else if (a.match_data > b.match_data) {
  162. return false;
  163. } else if (a.match_data) {
  164. if (a.data < b.data) {
  165. return true;
  166. } else if (a.data > b.data) {
  167. return false;
  168. }
  169. }
  170. if (a.e < b.e) {
  171. return true;
  172. } else if (a.e > b.e) {
  173. return false;
  174. }
  175. return false;
  176. }
  177. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
  178. MemoryRegionIoeventfd b)
  179. {
  180. return !memory_region_ioeventfd_before(a, b)
  181. && !memory_region_ioeventfd_before(b, a);
  182. }
  183. typedef struct FlatRange FlatRange;
  184. typedef struct FlatView FlatView;
  185. /* Range of memory in the global map. Addresses are absolute. */
  186. struct FlatRange {
  187. MemoryRegion *mr;
  188. hwaddr offset_in_region;
  189. AddrRange addr;
  190. uint8_t dirty_log_mask;
  191. bool romd_mode;
  192. bool readonly;
  193. };
  194. /* Flattened global view of current active memory hierarchy. Kept in sorted
  195. * order.
  196. */
  197. struct FlatView {
  198. struct rcu_head rcu;
  199. unsigned ref;
  200. FlatRange *ranges;
  201. unsigned nr;
  202. unsigned nr_allocated;
  203. };
  204. typedef struct AddressSpaceOps AddressSpaceOps;
  205. #define FOR_EACH_FLAT_RANGE(var, view) \
  206. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  207. static inline MemoryRegionSection
  208. section_from_flat_range(FlatRange *fr, AddressSpace *as)
  209. {
  210. return (MemoryRegionSection) {
  211. .mr = fr->mr,
  212. .address_space = as,
  213. .offset_within_region = fr->offset_in_region,
  214. .size = fr->addr.size,
  215. .offset_within_address_space = int128_get64(fr->addr.start),
  216. .readonly = fr->readonly,
  217. };
  218. }
  219. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  220. {
  221. return a->mr == b->mr
  222. && addrrange_equal(a->addr, b->addr)
  223. && a->offset_in_region == b->offset_in_region
  224. && a->romd_mode == b->romd_mode
  225. && a->readonly == b->readonly;
  226. }
  227. static void flatview_init(FlatView *view)
  228. {
  229. view->ref = 1;
  230. view->ranges = NULL;
  231. view->nr = 0;
  232. view->nr_allocated = 0;
  233. }
  234. /* Insert a range into a given position. Caller is responsible for maintaining
  235. * sorting order.
  236. */
  237. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  238. {
  239. if (view->nr == view->nr_allocated) {
  240. view->nr_allocated = MAX(2 * view->nr, 10);
  241. view->ranges = g_realloc(view->ranges,
  242. view->nr_allocated * sizeof(*view->ranges));
  243. }
  244. memmove(view->ranges + pos + 1, view->ranges + pos,
  245. (view->nr - pos) * sizeof(FlatRange));
  246. view->ranges[pos] = *range;
  247. memory_region_ref(range->mr);
  248. ++view->nr;
  249. }
  250. static void flatview_destroy(FlatView *view)
  251. {
  252. int i;
  253. for (i = 0; i < view->nr; i++) {
  254. memory_region_unref(view->ranges[i].mr);
  255. }
  256. g_free(view->ranges);
  257. g_free(view);
  258. }
  259. static void flatview_ref(FlatView *view)
  260. {
  261. atomic_inc(&view->ref);
  262. }
  263. static void flatview_unref(FlatView *view)
  264. {
  265. if (atomic_fetch_dec(&view->ref) == 1) {
  266. flatview_destroy(view);
  267. }
  268. }
  269. static bool can_merge(FlatRange *r1, FlatRange *r2)
  270. {
  271. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  272. && r1->mr == r2->mr
  273. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  274. r1->addr.size),
  275. int128_make64(r2->offset_in_region))
  276. && r1->dirty_log_mask == r2->dirty_log_mask
  277. && r1->romd_mode == r2->romd_mode
  278. && r1->readonly == r2->readonly;
  279. }
  280. /* Attempt to simplify a view by merging adjacent ranges */
  281. static void flatview_simplify(FlatView *view)
  282. {
  283. unsigned i, j;
  284. i = 0;
  285. while (i < view->nr) {
  286. j = i + 1;
  287. while (j < view->nr
  288. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  289. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  290. ++j;
  291. }
  292. ++i;
  293. memmove(&view->ranges[i], &view->ranges[j],
  294. (view->nr - j) * sizeof(view->ranges[j]));
  295. view->nr -= j - i;
  296. }
  297. }
  298. static bool memory_region_big_endian(MemoryRegion *mr)
  299. {
  300. #ifdef TARGET_WORDS_BIGENDIAN
  301. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  302. #else
  303. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  304. #endif
  305. }
  306. static bool memory_region_wrong_endianness(MemoryRegion *mr)
  307. {
  308. #ifdef TARGET_WORDS_BIGENDIAN
  309. return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
  310. #else
  311. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  312. #endif
  313. }
  314. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
  315. {
  316. if (memory_region_wrong_endianness(mr)) {
  317. switch (size) {
  318. case 1:
  319. break;
  320. case 2:
  321. *data = bswap16(*data);
  322. break;
  323. case 4:
  324. *data = bswap32(*data);
  325. break;
  326. case 8:
  327. *data = bswap64(*data);
  328. break;
  329. default:
  330. abort();
  331. }
  332. }
  333. }
  334. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  335. {
  336. MemoryRegion *root;
  337. hwaddr abs_addr = offset;
  338. abs_addr += mr->addr;
  339. for (root = mr; root->container; ) {
  340. root = root->container;
  341. abs_addr += root->addr;
  342. }
  343. return abs_addr;
  344. }
  345. static int get_cpu_index(void)
  346. {
  347. if (current_cpu) {
  348. return current_cpu->cpu_index;
  349. }
  350. return -1;
  351. }
  352. static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
  353. hwaddr addr,
  354. uint64_t *value,
  355. unsigned size,
  356. unsigned shift,
  357. uint64_t mask,
  358. MemTxAttrs attrs)
  359. {
  360. uint64_t tmp;
  361. tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
  362. if (mr->subpage) {
  363. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  364. } else if (mr == &io_mem_notdirty) {
  365. /* Accesses to code which has previously been translated into a TB show
  366. * up in the MMIO path, as accesses to the io_mem_notdirty
  367. * MemoryRegion. */
  368. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  369. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  370. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  371. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  372. }
  373. *value |= (tmp & mask) << shift;
  374. return MEMTX_OK;
  375. }
  376. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  377. hwaddr addr,
  378. uint64_t *value,
  379. unsigned size,
  380. unsigned shift,
  381. uint64_t mask,
  382. MemTxAttrs attrs)
  383. {
  384. uint64_t tmp;
  385. tmp = mr->ops->read(mr->opaque, addr, size);
  386. if (mr->subpage) {
  387. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  388. } else if (mr == &io_mem_notdirty) {
  389. /* Accesses to code which has previously been translated into a TB show
  390. * up in the MMIO path, as accesses to the io_mem_notdirty
  391. * MemoryRegion. */
  392. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  393. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  394. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  395. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  396. }
  397. *value |= (tmp & mask) << shift;
  398. return MEMTX_OK;
  399. }
  400. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  401. hwaddr addr,
  402. uint64_t *value,
  403. unsigned size,
  404. unsigned shift,
  405. uint64_t mask,
  406. MemTxAttrs attrs)
  407. {
  408. uint64_t tmp = 0;
  409. MemTxResult r;
  410. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  411. if (mr->subpage) {
  412. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  413. } else if (mr == &io_mem_notdirty) {
  414. /* Accesses to code which has previously been translated into a TB show
  415. * up in the MMIO path, as accesses to the io_mem_notdirty
  416. * MemoryRegion. */
  417. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  418. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  419. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  420. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  421. }
  422. *value |= (tmp & mask) << shift;
  423. return r;
  424. }
  425. static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
  426. hwaddr addr,
  427. uint64_t *value,
  428. unsigned size,
  429. unsigned shift,
  430. uint64_t mask,
  431. MemTxAttrs attrs)
  432. {
  433. uint64_t tmp;
  434. tmp = (*value >> shift) & mask;
  435. if (mr->subpage) {
  436. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  437. } else if (mr == &io_mem_notdirty) {
  438. /* Accesses to code which has previously been translated into a TB show
  439. * up in the MMIO path, as accesses to the io_mem_notdirty
  440. * MemoryRegion. */
  441. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  442. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  443. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  444. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  445. }
  446. mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
  447. return MEMTX_OK;
  448. }
  449. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  450. hwaddr addr,
  451. uint64_t *value,
  452. unsigned size,
  453. unsigned shift,
  454. uint64_t mask,
  455. MemTxAttrs attrs)
  456. {
  457. uint64_t tmp;
  458. tmp = (*value >> shift) & mask;
  459. if (mr->subpage) {
  460. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  461. } else if (mr == &io_mem_notdirty) {
  462. /* Accesses to code which has previously been translated into a TB show
  463. * up in the MMIO path, as accesses to the io_mem_notdirty
  464. * MemoryRegion. */
  465. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  466. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  467. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  468. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  469. }
  470. mr->ops->write(mr->opaque, addr, tmp, size);
  471. return MEMTX_OK;
  472. }
  473. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  474. hwaddr addr,
  475. uint64_t *value,
  476. unsigned size,
  477. unsigned shift,
  478. uint64_t mask,
  479. MemTxAttrs attrs)
  480. {
  481. uint64_t tmp;
  482. tmp = (*value >> shift) & mask;
  483. if (mr->subpage) {
  484. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  485. } else if (mr == &io_mem_notdirty) {
  486. /* Accesses to code which has previously been translated into a TB show
  487. * up in the MMIO path, as accesses to the io_mem_notdirty
  488. * MemoryRegion. */
  489. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  490. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  491. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  492. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  493. }
  494. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  495. }
  496. static MemTxResult access_with_adjusted_size(hwaddr addr,
  497. uint64_t *value,
  498. unsigned size,
  499. unsigned access_size_min,
  500. unsigned access_size_max,
  501. MemTxResult (*access)(MemoryRegion *mr,
  502. hwaddr addr,
  503. uint64_t *value,
  504. unsigned size,
  505. unsigned shift,
  506. uint64_t mask,
  507. MemTxAttrs attrs),
  508. MemoryRegion *mr,
  509. MemTxAttrs attrs)
  510. {
  511. uint64_t access_mask;
  512. unsigned access_size;
  513. unsigned i;
  514. MemTxResult r = MEMTX_OK;
  515. if (!access_size_min) {
  516. access_size_min = 1;
  517. }
  518. if (!access_size_max) {
  519. access_size_max = 4;
  520. }
  521. /* FIXME: support unaligned access? */
  522. access_size = MAX(MIN(size, access_size_max), access_size_min);
  523. access_mask = -1ULL >> (64 - access_size * 8);
  524. if (memory_region_big_endian(mr)) {
  525. for (i = 0; i < size; i += access_size) {
  526. r |= access(mr, addr + i, value, access_size,
  527. (size - access_size - i) * 8, access_mask, attrs);
  528. }
  529. } else {
  530. for (i = 0; i < size; i += access_size) {
  531. r |= access(mr, addr + i, value, access_size, i * 8,
  532. access_mask, attrs);
  533. }
  534. }
  535. return r;
  536. }
  537. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  538. {
  539. AddressSpace *as;
  540. while (mr->container) {
  541. mr = mr->container;
  542. }
  543. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  544. if (mr == as->root) {
  545. return as;
  546. }
  547. }
  548. return NULL;
  549. }
  550. /* Render a memory region into the global view. Ranges in @view obscure
  551. * ranges in @mr.
  552. */
  553. static void render_memory_region(FlatView *view,
  554. MemoryRegion *mr,
  555. Int128 base,
  556. AddrRange clip,
  557. bool readonly)
  558. {
  559. MemoryRegion *subregion;
  560. unsigned i;
  561. hwaddr offset_in_region;
  562. Int128 remain;
  563. Int128 now;
  564. FlatRange fr;
  565. AddrRange tmp;
  566. if (!mr->enabled) {
  567. return;
  568. }
  569. int128_addto(&base, int128_make64(mr->addr));
  570. readonly |= mr->readonly;
  571. tmp = addrrange_make(base, mr->size);
  572. if (!addrrange_intersects(tmp, clip)) {
  573. return;
  574. }
  575. clip = addrrange_intersection(tmp, clip);
  576. if (mr->alias) {
  577. int128_subfrom(&base, int128_make64(mr->alias->addr));
  578. int128_subfrom(&base, int128_make64(mr->alias_offset));
  579. render_memory_region(view, mr->alias, base, clip, readonly);
  580. return;
  581. }
  582. /* Render subregions in priority order. */
  583. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  584. render_memory_region(view, subregion, base, clip, readonly);
  585. }
  586. if (!mr->terminates) {
  587. return;
  588. }
  589. offset_in_region = int128_get64(int128_sub(clip.start, base));
  590. base = clip.start;
  591. remain = clip.size;
  592. fr.mr = mr;
  593. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  594. fr.romd_mode = mr->romd_mode;
  595. fr.readonly = readonly;
  596. /* Render the region itself into any gaps left by the current view. */
  597. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  598. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  599. continue;
  600. }
  601. if (int128_lt(base, view->ranges[i].addr.start)) {
  602. now = int128_min(remain,
  603. int128_sub(view->ranges[i].addr.start, base));
  604. fr.offset_in_region = offset_in_region;
  605. fr.addr = addrrange_make(base, now);
  606. flatview_insert(view, i, &fr);
  607. ++i;
  608. int128_addto(&base, now);
  609. offset_in_region += int128_get64(now);
  610. int128_subfrom(&remain, now);
  611. }
  612. now = int128_sub(int128_min(int128_add(base, remain),
  613. addrrange_end(view->ranges[i].addr)),
  614. base);
  615. int128_addto(&base, now);
  616. offset_in_region += int128_get64(now);
  617. int128_subfrom(&remain, now);
  618. }
  619. if (int128_nz(remain)) {
  620. fr.offset_in_region = offset_in_region;
  621. fr.addr = addrrange_make(base, remain);
  622. flatview_insert(view, i, &fr);
  623. }
  624. }
  625. /* Render a memory topology into a list of disjoint absolute ranges. */
  626. static FlatView *generate_memory_topology(MemoryRegion *mr)
  627. {
  628. FlatView *view;
  629. view = g_new(FlatView, 1);
  630. flatview_init(view);
  631. if (mr) {
  632. render_memory_region(view, mr, int128_zero(),
  633. addrrange_make(int128_zero(), int128_2_64()), false);
  634. }
  635. flatview_simplify(view);
  636. return view;
  637. }
  638. static void address_space_add_del_ioeventfds(AddressSpace *as,
  639. MemoryRegionIoeventfd *fds_new,
  640. unsigned fds_new_nb,
  641. MemoryRegionIoeventfd *fds_old,
  642. unsigned fds_old_nb)
  643. {
  644. unsigned iold, inew;
  645. MemoryRegionIoeventfd *fd;
  646. MemoryRegionSection section;
  647. /* Generate a symmetric difference of the old and new fd sets, adding
  648. * and deleting as necessary.
  649. */
  650. iold = inew = 0;
  651. while (iold < fds_old_nb || inew < fds_new_nb) {
  652. if (iold < fds_old_nb
  653. && (inew == fds_new_nb
  654. || memory_region_ioeventfd_before(fds_old[iold],
  655. fds_new[inew]))) {
  656. fd = &fds_old[iold];
  657. section = (MemoryRegionSection) {
  658. .address_space = as,
  659. .offset_within_address_space = int128_get64(fd->addr.start),
  660. .size = fd->addr.size,
  661. };
  662. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  663. fd->match_data, fd->data, fd->e);
  664. ++iold;
  665. } else if (inew < fds_new_nb
  666. && (iold == fds_old_nb
  667. || memory_region_ioeventfd_before(fds_new[inew],
  668. fds_old[iold]))) {
  669. fd = &fds_new[inew];
  670. section = (MemoryRegionSection) {
  671. .address_space = as,
  672. .offset_within_address_space = int128_get64(fd->addr.start),
  673. .size = fd->addr.size,
  674. };
  675. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  676. fd->match_data, fd->data, fd->e);
  677. ++inew;
  678. } else {
  679. ++iold;
  680. ++inew;
  681. }
  682. }
  683. }
  684. static FlatView *address_space_get_flatview(AddressSpace *as)
  685. {
  686. FlatView *view;
  687. rcu_read_lock();
  688. view = atomic_rcu_read(&as->current_map);
  689. flatview_ref(view);
  690. rcu_read_unlock();
  691. return view;
  692. }
  693. static void address_space_update_ioeventfds(AddressSpace *as)
  694. {
  695. FlatView *view;
  696. FlatRange *fr;
  697. unsigned ioeventfd_nb = 0;
  698. MemoryRegionIoeventfd *ioeventfds = NULL;
  699. AddrRange tmp;
  700. unsigned i;
  701. view = address_space_get_flatview(as);
  702. FOR_EACH_FLAT_RANGE(fr, view) {
  703. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  704. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  705. int128_sub(fr->addr.start,
  706. int128_make64(fr->offset_in_region)));
  707. if (addrrange_intersects(fr->addr, tmp)) {
  708. ++ioeventfd_nb;
  709. ioeventfds = g_realloc(ioeventfds,
  710. ioeventfd_nb * sizeof(*ioeventfds));
  711. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  712. ioeventfds[ioeventfd_nb-1].addr = tmp;
  713. }
  714. }
  715. }
  716. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  717. as->ioeventfds, as->ioeventfd_nb);
  718. g_free(as->ioeventfds);
  719. as->ioeventfds = ioeventfds;
  720. as->ioeventfd_nb = ioeventfd_nb;
  721. flatview_unref(view);
  722. }
  723. static void address_space_update_topology_pass(AddressSpace *as,
  724. const FlatView *old_view,
  725. const FlatView *new_view,
  726. bool adding)
  727. {
  728. unsigned iold, inew;
  729. FlatRange *frold, *frnew;
  730. /* Generate a symmetric difference of the old and new memory maps.
  731. * Kill ranges in the old map, and instantiate ranges in the new map.
  732. */
  733. iold = inew = 0;
  734. while (iold < old_view->nr || inew < new_view->nr) {
  735. if (iold < old_view->nr) {
  736. frold = &old_view->ranges[iold];
  737. } else {
  738. frold = NULL;
  739. }
  740. if (inew < new_view->nr) {
  741. frnew = &new_view->ranges[inew];
  742. } else {
  743. frnew = NULL;
  744. }
  745. if (frold
  746. && (!frnew
  747. || int128_lt(frold->addr.start, frnew->addr.start)
  748. || (int128_eq(frold->addr.start, frnew->addr.start)
  749. && !flatrange_equal(frold, frnew)))) {
  750. /* In old but not in new, or in both but attributes changed. */
  751. if (!adding) {
  752. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  753. }
  754. ++iold;
  755. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  756. /* In both and unchanged (except logging may have changed) */
  757. if (adding) {
  758. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  759. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  760. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  761. frold->dirty_log_mask,
  762. frnew->dirty_log_mask);
  763. }
  764. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  765. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  766. frold->dirty_log_mask,
  767. frnew->dirty_log_mask);
  768. }
  769. }
  770. ++iold;
  771. ++inew;
  772. } else {
  773. /* In new */
  774. if (adding) {
  775. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  776. }
  777. ++inew;
  778. }
  779. }
  780. }
  781. static void address_space_update_topology(AddressSpace *as)
  782. {
  783. FlatView *old_view = address_space_get_flatview(as);
  784. FlatView *new_view = generate_memory_topology(as->root);
  785. address_space_update_topology_pass(as, old_view, new_view, false);
  786. address_space_update_topology_pass(as, old_view, new_view, true);
  787. /* Writes are protected by the BQL. */
  788. atomic_rcu_set(&as->current_map, new_view);
  789. call_rcu(old_view, flatview_unref, rcu);
  790. /* Note that all the old MemoryRegions are still alive up to this
  791. * point. This relieves most MemoryListeners from the need to
  792. * ref/unref the MemoryRegions they get---unless they use them
  793. * outside the iothread mutex, in which case precise reference
  794. * counting is necessary.
  795. */
  796. flatview_unref(old_view);
  797. address_space_update_ioeventfds(as);
  798. }
  799. void memory_region_transaction_begin(void)
  800. {
  801. qemu_flush_coalesced_mmio_buffer();
  802. ++memory_region_transaction_depth;
  803. }
  804. void memory_region_transaction_commit(void)
  805. {
  806. AddressSpace *as;
  807. assert(memory_region_transaction_depth);
  808. assert(qemu_mutex_iothread_locked());
  809. --memory_region_transaction_depth;
  810. if (!memory_region_transaction_depth) {
  811. if (memory_region_update_pending) {
  812. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  813. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  814. address_space_update_topology(as);
  815. }
  816. memory_region_update_pending = false;
  817. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  818. } else if (ioeventfd_update_pending) {
  819. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  820. address_space_update_ioeventfds(as);
  821. }
  822. ioeventfd_update_pending = false;
  823. }
  824. }
  825. }
  826. static void memory_region_destructor_none(MemoryRegion *mr)
  827. {
  828. }
  829. static void memory_region_destructor_ram(MemoryRegion *mr)
  830. {
  831. qemu_ram_free(mr->ram_block);
  832. }
  833. static bool memory_region_need_escape(char c)
  834. {
  835. return c == '/' || c == '[' || c == '\\' || c == ']';
  836. }
  837. static char *memory_region_escape_name(const char *name)
  838. {
  839. const char *p;
  840. char *escaped, *q;
  841. uint8_t c;
  842. size_t bytes = 0;
  843. for (p = name; *p; p++) {
  844. bytes += memory_region_need_escape(*p) ? 4 : 1;
  845. }
  846. if (bytes == p - name) {
  847. return g_memdup(name, bytes + 1);
  848. }
  849. escaped = g_malloc(bytes + 1);
  850. for (p = name, q = escaped; *p; p++) {
  851. c = *p;
  852. if (unlikely(memory_region_need_escape(c))) {
  853. *q++ = '\\';
  854. *q++ = 'x';
  855. *q++ = "0123456789abcdef"[c >> 4];
  856. c = "0123456789abcdef"[c & 15];
  857. }
  858. *q++ = c;
  859. }
  860. *q = 0;
  861. return escaped;
  862. }
  863. void memory_region_init(MemoryRegion *mr,
  864. Object *owner,
  865. const char *name,
  866. uint64_t size)
  867. {
  868. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  869. mr->size = int128_make64(size);
  870. if (size == UINT64_MAX) {
  871. mr->size = int128_2_64();
  872. }
  873. mr->name = g_strdup(name);
  874. mr->owner = owner;
  875. mr->ram_block = NULL;
  876. if (name) {
  877. char *escaped_name = memory_region_escape_name(name);
  878. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  879. if (!owner) {
  880. owner = container_get(qdev_get_machine(), "/unattached");
  881. }
  882. object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
  883. object_unref(OBJECT(mr));
  884. g_free(name_array);
  885. g_free(escaped_name);
  886. }
  887. }
  888. static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
  889. void *opaque, Error **errp)
  890. {
  891. MemoryRegion *mr = MEMORY_REGION(obj);
  892. uint64_t value = mr->addr;
  893. visit_type_uint64(v, name, &value, errp);
  894. }
  895. static void memory_region_get_container(Object *obj, Visitor *v,
  896. const char *name, void *opaque,
  897. Error **errp)
  898. {
  899. MemoryRegion *mr = MEMORY_REGION(obj);
  900. gchar *path = (gchar *)"";
  901. if (mr->container) {
  902. path = object_get_canonical_path(OBJECT(mr->container));
  903. }
  904. visit_type_str(v, name, &path, errp);
  905. if (mr->container) {
  906. g_free(path);
  907. }
  908. }
  909. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  910. const char *part)
  911. {
  912. MemoryRegion *mr = MEMORY_REGION(obj);
  913. return OBJECT(mr->container);
  914. }
  915. static void memory_region_get_priority(Object *obj, Visitor *v,
  916. const char *name, void *opaque,
  917. Error **errp)
  918. {
  919. MemoryRegion *mr = MEMORY_REGION(obj);
  920. int32_t value = mr->priority;
  921. visit_type_int32(v, name, &value, errp);
  922. }
  923. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  924. void *opaque, Error **errp)
  925. {
  926. MemoryRegion *mr = MEMORY_REGION(obj);
  927. uint64_t value = memory_region_size(mr);
  928. visit_type_uint64(v, name, &value, errp);
  929. }
  930. static void memory_region_initfn(Object *obj)
  931. {
  932. MemoryRegion *mr = MEMORY_REGION(obj);
  933. ObjectProperty *op;
  934. mr->ops = &unassigned_mem_ops;
  935. mr->enabled = true;
  936. mr->romd_mode = true;
  937. mr->global_locking = true;
  938. mr->destructor = memory_region_destructor_none;
  939. QTAILQ_INIT(&mr->subregions);
  940. QTAILQ_INIT(&mr->coalesced);
  941. op = object_property_add(OBJECT(mr), "container",
  942. "link<" TYPE_MEMORY_REGION ">",
  943. memory_region_get_container,
  944. NULL, /* memory_region_set_container */
  945. NULL, NULL, &error_abort);
  946. op->resolve = memory_region_resolve_container;
  947. object_property_add(OBJECT(mr), "addr", "uint64",
  948. memory_region_get_addr,
  949. NULL, /* memory_region_set_addr */
  950. NULL, NULL, &error_abort);
  951. object_property_add(OBJECT(mr), "priority", "uint32",
  952. memory_region_get_priority,
  953. NULL, /* memory_region_set_priority */
  954. NULL, NULL, &error_abort);
  955. object_property_add(OBJECT(mr), "size", "uint64",
  956. memory_region_get_size,
  957. NULL, /* memory_region_set_size, */
  958. NULL, NULL, &error_abort);
  959. }
  960. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  961. unsigned size)
  962. {
  963. #ifdef DEBUG_UNASSIGNED
  964. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  965. #endif
  966. if (current_cpu != NULL) {
  967. cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
  968. }
  969. return 0;
  970. }
  971. static void unassigned_mem_write(void *opaque, hwaddr addr,
  972. uint64_t val, unsigned size)
  973. {
  974. #ifdef DEBUG_UNASSIGNED
  975. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  976. #endif
  977. if (current_cpu != NULL) {
  978. cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
  979. }
  980. }
  981. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  982. unsigned size, bool is_write)
  983. {
  984. return false;
  985. }
  986. const MemoryRegionOps unassigned_mem_ops = {
  987. .valid.accepts = unassigned_mem_accepts,
  988. .endianness = DEVICE_NATIVE_ENDIAN,
  989. };
  990. static uint64_t memory_region_ram_device_read(void *opaque,
  991. hwaddr addr, unsigned size)
  992. {
  993. MemoryRegion *mr = opaque;
  994. uint64_t data = (uint64_t)~0;
  995. switch (size) {
  996. case 1:
  997. data = *(uint8_t *)(mr->ram_block->host + addr);
  998. break;
  999. case 2:
  1000. data = *(uint16_t *)(mr->ram_block->host + addr);
  1001. break;
  1002. case 4:
  1003. data = *(uint32_t *)(mr->ram_block->host + addr);
  1004. break;
  1005. case 8:
  1006. data = *(uint64_t *)(mr->ram_block->host + addr);
  1007. break;
  1008. }
  1009. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1010. return data;
  1011. }
  1012. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1013. uint64_t data, unsigned size)
  1014. {
  1015. MemoryRegion *mr = opaque;
  1016. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1017. switch (size) {
  1018. case 1:
  1019. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1020. break;
  1021. case 2:
  1022. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1023. break;
  1024. case 4:
  1025. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1026. break;
  1027. case 8:
  1028. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1029. break;
  1030. }
  1031. }
  1032. static const MemoryRegionOps ram_device_mem_ops = {
  1033. .read = memory_region_ram_device_read,
  1034. .write = memory_region_ram_device_write,
  1035. .endianness = DEVICE_HOST_ENDIAN,
  1036. .valid = {
  1037. .min_access_size = 1,
  1038. .max_access_size = 8,
  1039. .unaligned = true,
  1040. },
  1041. .impl = {
  1042. .min_access_size = 1,
  1043. .max_access_size = 8,
  1044. .unaligned = true,
  1045. },
  1046. };
  1047. bool memory_region_access_valid(MemoryRegion *mr,
  1048. hwaddr addr,
  1049. unsigned size,
  1050. bool is_write)
  1051. {
  1052. int access_size_min, access_size_max;
  1053. int access_size, i;
  1054. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1055. return false;
  1056. }
  1057. if (!mr->ops->valid.accepts) {
  1058. return true;
  1059. }
  1060. access_size_min = mr->ops->valid.min_access_size;
  1061. if (!mr->ops->valid.min_access_size) {
  1062. access_size_min = 1;
  1063. }
  1064. access_size_max = mr->ops->valid.max_access_size;
  1065. if (!mr->ops->valid.max_access_size) {
  1066. access_size_max = 4;
  1067. }
  1068. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1069. for (i = 0; i < size; i += access_size) {
  1070. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1071. is_write)) {
  1072. return false;
  1073. }
  1074. }
  1075. return true;
  1076. }
  1077. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1078. hwaddr addr,
  1079. uint64_t *pval,
  1080. unsigned size,
  1081. MemTxAttrs attrs)
  1082. {
  1083. *pval = 0;
  1084. if (mr->ops->read) {
  1085. return access_with_adjusted_size(addr, pval, size,
  1086. mr->ops->impl.min_access_size,
  1087. mr->ops->impl.max_access_size,
  1088. memory_region_read_accessor,
  1089. mr, attrs);
  1090. } else if (mr->ops->read_with_attrs) {
  1091. return access_with_adjusted_size(addr, pval, size,
  1092. mr->ops->impl.min_access_size,
  1093. mr->ops->impl.max_access_size,
  1094. memory_region_read_with_attrs_accessor,
  1095. mr, attrs);
  1096. } else {
  1097. return access_with_adjusted_size(addr, pval, size, 1, 4,
  1098. memory_region_oldmmio_read_accessor,
  1099. mr, attrs);
  1100. }
  1101. }
  1102. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1103. hwaddr addr,
  1104. uint64_t *pval,
  1105. unsigned size,
  1106. MemTxAttrs attrs)
  1107. {
  1108. MemTxResult r;
  1109. if (!memory_region_access_valid(mr, addr, size, false)) {
  1110. *pval = unassigned_mem_read(mr, addr, size);
  1111. return MEMTX_DECODE_ERROR;
  1112. }
  1113. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1114. adjust_endianness(mr, pval, size);
  1115. return r;
  1116. }
  1117. /* Return true if an eventfd was signalled */
  1118. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1119. hwaddr addr,
  1120. uint64_t data,
  1121. unsigned size,
  1122. MemTxAttrs attrs)
  1123. {
  1124. MemoryRegionIoeventfd ioeventfd = {
  1125. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1126. .data = data,
  1127. };
  1128. unsigned i;
  1129. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1130. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1131. ioeventfd.e = mr->ioeventfds[i].e;
  1132. if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
  1133. event_notifier_set(ioeventfd.e);
  1134. return true;
  1135. }
  1136. }
  1137. return false;
  1138. }
  1139. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1140. hwaddr addr,
  1141. uint64_t data,
  1142. unsigned size,
  1143. MemTxAttrs attrs)
  1144. {
  1145. if (!memory_region_access_valid(mr, addr, size, true)) {
  1146. unassigned_mem_write(mr, addr, data, size);
  1147. return MEMTX_DECODE_ERROR;
  1148. }
  1149. adjust_endianness(mr, &data, size);
  1150. if ((!kvm_eventfds_enabled()) &&
  1151. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1152. return MEMTX_OK;
  1153. }
  1154. if (mr->ops->write) {
  1155. return access_with_adjusted_size(addr, &data, size,
  1156. mr->ops->impl.min_access_size,
  1157. mr->ops->impl.max_access_size,
  1158. memory_region_write_accessor, mr,
  1159. attrs);
  1160. } else if (mr->ops->write_with_attrs) {
  1161. return
  1162. access_with_adjusted_size(addr, &data, size,
  1163. mr->ops->impl.min_access_size,
  1164. mr->ops->impl.max_access_size,
  1165. memory_region_write_with_attrs_accessor,
  1166. mr, attrs);
  1167. } else {
  1168. return access_with_adjusted_size(addr, &data, size, 1, 4,
  1169. memory_region_oldmmio_write_accessor,
  1170. mr, attrs);
  1171. }
  1172. }
  1173. void memory_region_init_io(MemoryRegion *mr,
  1174. Object *owner,
  1175. const MemoryRegionOps *ops,
  1176. void *opaque,
  1177. const char *name,
  1178. uint64_t size)
  1179. {
  1180. memory_region_init(mr, owner, name, size);
  1181. mr->ops = ops ? ops : &unassigned_mem_ops;
  1182. mr->opaque = opaque;
  1183. mr->terminates = true;
  1184. }
  1185. void memory_region_init_ram(MemoryRegion *mr,
  1186. Object *owner,
  1187. const char *name,
  1188. uint64_t size,
  1189. Error **errp)
  1190. {
  1191. memory_region_init(mr, owner, name, size);
  1192. mr->ram = true;
  1193. mr->terminates = true;
  1194. mr->destructor = memory_region_destructor_ram;
  1195. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1196. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1197. }
  1198. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1199. Object *owner,
  1200. const char *name,
  1201. uint64_t size,
  1202. uint64_t max_size,
  1203. void (*resized)(const char*,
  1204. uint64_t length,
  1205. void *host),
  1206. Error **errp)
  1207. {
  1208. memory_region_init(mr, owner, name, size);
  1209. mr->ram = true;
  1210. mr->terminates = true;
  1211. mr->destructor = memory_region_destructor_ram;
  1212. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1213. mr, errp);
  1214. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1215. }
  1216. #ifdef __linux__
  1217. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1218. struct Object *owner,
  1219. const char *name,
  1220. uint64_t size,
  1221. bool share,
  1222. const char *path,
  1223. Error **errp)
  1224. {
  1225. memory_region_init(mr, owner, name, size);
  1226. mr->ram = true;
  1227. mr->terminates = true;
  1228. mr->destructor = memory_region_destructor_ram;
  1229. mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
  1230. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1231. }
  1232. #endif
  1233. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1234. Object *owner,
  1235. const char *name,
  1236. uint64_t size,
  1237. void *ptr)
  1238. {
  1239. memory_region_init(mr, owner, name, size);
  1240. mr->ram = true;
  1241. mr->terminates = true;
  1242. mr->destructor = memory_region_destructor_ram;
  1243. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1244. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1245. assert(ptr != NULL);
  1246. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1247. }
  1248. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1249. Object *owner,
  1250. const char *name,
  1251. uint64_t size,
  1252. void *ptr)
  1253. {
  1254. memory_region_init_ram_ptr(mr, owner, name, size, ptr);
  1255. mr->ram_device = true;
  1256. mr->ops = &ram_device_mem_ops;
  1257. mr->opaque = mr;
  1258. }
  1259. void memory_region_init_alias(MemoryRegion *mr,
  1260. Object *owner,
  1261. const char *name,
  1262. MemoryRegion *orig,
  1263. hwaddr offset,
  1264. uint64_t size)
  1265. {
  1266. memory_region_init(mr, owner, name, size);
  1267. mr->alias = orig;
  1268. mr->alias_offset = offset;
  1269. }
  1270. void memory_region_init_rom(MemoryRegion *mr,
  1271. struct Object *owner,
  1272. const char *name,
  1273. uint64_t size,
  1274. Error **errp)
  1275. {
  1276. memory_region_init(mr, owner, name, size);
  1277. mr->ram = true;
  1278. mr->readonly = true;
  1279. mr->terminates = true;
  1280. mr->destructor = memory_region_destructor_ram;
  1281. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1282. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1283. }
  1284. void memory_region_init_rom_device(MemoryRegion *mr,
  1285. Object *owner,
  1286. const MemoryRegionOps *ops,
  1287. void *opaque,
  1288. const char *name,
  1289. uint64_t size,
  1290. Error **errp)
  1291. {
  1292. assert(ops);
  1293. memory_region_init(mr, owner, name, size);
  1294. mr->ops = ops;
  1295. mr->opaque = opaque;
  1296. mr->terminates = true;
  1297. mr->rom_device = true;
  1298. mr->destructor = memory_region_destructor_ram;
  1299. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1300. }
  1301. void memory_region_init_iommu(MemoryRegion *mr,
  1302. Object *owner,
  1303. const MemoryRegionIOMMUOps *ops,
  1304. const char *name,
  1305. uint64_t size)
  1306. {
  1307. memory_region_init(mr, owner, name, size);
  1308. mr->iommu_ops = ops,
  1309. mr->terminates = true; /* then re-forwards */
  1310. QLIST_INIT(&mr->iommu_notify);
  1311. mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1312. }
  1313. static void memory_region_finalize(Object *obj)
  1314. {
  1315. MemoryRegion *mr = MEMORY_REGION(obj);
  1316. assert(!mr->container);
  1317. /* We know the region is not visible in any address space (it
  1318. * does not have a container and cannot be a root either because
  1319. * it has no references, so we can blindly clear mr->enabled.
  1320. * memory_region_set_enabled instead could trigger a transaction
  1321. * and cause an infinite loop.
  1322. */
  1323. mr->enabled = false;
  1324. memory_region_transaction_begin();
  1325. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1326. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1327. memory_region_del_subregion(mr, subregion);
  1328. }
  1329. memory_region_transaction_commit();
  1330. mr->destructor(mr);
  1331. memory_region_clear_coalescing(mr);
  1332. g_free((char *)mr->name);
  1333. g_free(mr->ioeventfds);
  1334. }
  1335. Object *memory_region_owner(MemoryRegion *mr)
  1336. {
  1337. Object *obj = OBJECT(mr);
  1338. return obj->parent;
  1339. }
  1340. void memory_region_ref(MemoryRegion *mr)
  1341. {
  1342. /* MMIO callbacks most likely will access data that belongs
  1343. * to the owner, hence the need to ref/unref the owner whenever
  1344. * the memory region is in use.
  1345. *
  1346. * The memory region is a child of its owner. As long as the
  1347. * owner doesn't call unparent itself on the memory region,
  1348. * ref-ing the owner will also keep the memory region alive.
  1349. * Memory regions without an owner are supposed to never go away;
  1350. * we do not ref/unref them because it slows down DMA sensibly.
  1351. */
  1352. if (mr && mr->owner) {
  1353. object_ref(mr->owner);
  1354. }
  1355. }
  1356. void memory_region_unref(MemoryRegion *mr)
  1357. {
  1358. if (mr && mr->owner) {
  1359. object_unref(mr->owner);
  1360. }
  1361. }
  1362. uint64_t memory_region_size(MemoryRegion *mr)
  1363. {
  1364. if (int128_eq(mr->size, int128_2_64())) {
  1365. return UINT64_MAX;
  1366. }
  1367. return int128_get64(mr->size);
  1368. }
  1369. const char *memory_region_name(const MemoryRegion *mr)
  1370. {
  1371. if (!mr->name) {
  1372. ((MemoryRegion *)mr)->name =
  1373. object_get_canonical_path_component(OBJECT(mr));
  1374. }
  1375. return mr->name;
  1376. }
  1377. bool memory_region_is_ram_device(MemoryRegion *mr)
  1378. {
  1379. return mr->ram_device;
  1380. }
  1381. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1382. {
  1383. uint8_t mask = mr->dirty_log_mask;
  1384. if (global_dirty_log && mr->ram_block) {
  1385. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1386. }
  1387. return mask;
  1388. }
  1389. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1390. {
  1391. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1392. }
  1393. static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
  1394. {
  1395. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1396. IOMMUNotifier *iommu_notifier;
  1397. QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
  1398. flags |= iommu_notifier->notifier_flags;
  1399. }
  1400. if (flags != mr->iommu_notify_flags &&
  1401. mr->iommu_ops->notify_flag_changed) {
  1402. mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
  1403. flags);
  1404. }
  1405. mr->iommu_notify_flags = flags;
  1406. }
  1407. void memory_region_register_iommu_notifier(MemoryRegion *mr,
  1408. IOMMUNotifier *n)
  1409. {
  1410. if (mr->alias) {
  1411. memory_region_register_iommu_notifier(mr->alias, n);
  1412. return;
  1413. }
  1414. /* We need to register for at least one bitfield */
  1415. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1416. QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
  1417. memory_region_update_iommu_notify_flags(mr);
  1418. }
  1419. uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
  1420. {
  1421. assert(memory_region_is_iommu(mr));
  1422. if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
  1423. return mr->iommu_ops->get_min_page_size(mr);
  1424. }
  1425. return TARGET_PAGE_SIZE;
  1426. }
  1427. void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
  1428. bool is_write)
  1429. {
  1430. hwaddr addr, granularity;
  1431. IOMMUTLBEntry iotlb;
  1432. granularity = memory_region_iommu_get_min_page_size(mr);
  1433. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1434. iotlb = mr->iommu_ops->translate(mr, addr, is_write);
  1435. if (iotlb.perm != IOMMU_NONE) {
  1436. n->notify(n, &iotlb);
  1437. }
  1438. /* if (2^64 - MR size) < granularity, it's possible to get an
  1439. * infinite loop here. This should catch such a wraparound */
  1440. if ((addr + granularity) < addr) {
  1441. break;
  1442. }
  1443. }
  1444. }
  1445. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1446. IOMMUNotifier *n)
  1447. {
  1448. if (mr->alias) {
  1449. memory_region_unregister_iommu_notifier(mr->alias, n);
  1450. return;
  1451. }
  1452. QLIST_REMOVE(n, node);
  1453. memory_region_update_iommu_notify_flags(mr);
  1454. }
  1455. void memory_region_notify_iommu(MemoryRegion *mr,
  1456. IOMMUTLBEntry entry)
  1457. {
  1458. IOMMUNotifier *iommu_notifier;
  1459. IOMMUNotifierFlag request_flags;
  1460. assert(memory_region_is_iommu(mr));
  1461. if (entry.perm & IOMMU_RW) {
  1462. request_flags = IOMMU_NOTIFIER_MAP;
  1463. } else {
  1464. request_flags = IOMMU_NOTIFIER_UNMAP;
  1465. }
  1466. QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
  1467. if (iommu_notifier->notifier_flags & request_flags) {
  1468. iommu_notifier->notify(iommu_notifier, &entry);
  1469. }
  1470. }
  1471. }
  1472. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1473. {
  1474. uint8_t mask = 1 << client;
  1475. uint8_t old_logging;
  1476. assert(client == DIRTY_MEMORY_VGA);
  1477. old_logging = mr->vga_logging_count;
  1478. mr->vga_logging_count += log ? 1 : -1;
  1479. if (!!old_logging == !!mr->vga_logging_count) {
  1480. return;
  1481. }
  1482. memory_region_transaction_begin();
  1483. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1484. memory_region_update_pending |= mr->enabled;
  1485. memory_region_transaction_commit();
  1486. }
  1487. bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
  1488. hwaddr size, unsigned client)
  1489. {
  1490. assert(mr->ram_block);
  1491. return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
  1492. size, client);
  1493. }
  1494. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1495. hwaddr size)
  1496. {
  1497. assert(mr->ram_block);
  1498. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1499. size,
  1500. memory_region_get_dirty_log_mask(mr));
  1501. }
  1502. bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
  1503. hwaddr size, unsigned client)
  1504. {
  1505. assert(mr->ram_block);
  1506. return cpu_physical_memory_test_and_clear_dirty(
  1507. memory_region_get_ram_addr(mr) + addr, size, client);
  1508. }
  1509. void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1510. {
  1511. MemoryListener *listener;
  1512. AddressSpace *as;
  1513. FlatView *view;
  1514. FlatRange *fr;
  1515. /* If the same address space has multiple log_sync listeners, we
  1516. * visit that address space's FlatView multiple times. But because
  1517. * log_sync listeners are rare, it's still cheaper than walking each
  1518. * address space once.
  1519. */
  1520. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1521. if (!listener->log_sync) {
  1522. continue;
  1523. }
  1524. as = listener->address_space;
  1525. view = address_space_get_flatview(as);
  1526. FOR_EACH_FLAT_RANGE(fr, view) {
  1527. if (fr->mr == mr) {
  1528. MemoryRegionSection mrs = section_from_flat_range(fr, as);
  1529. listener->log_sync(listener, &mrs);
  1530. }
  1531. }
  1532. flatview_unref(view);
  1533. }
  1534. }
  1535. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1536. {
  1537. if (mr->readonly != readonly) {
  1538. memory_region_transaction_begin();
  1539. mr->readonly = readonly;
  1540. memory_region_update_pending |= mr->enabled;
  1541. memory_region_transaction_commit();
  1542. }
  1543. }
  1544. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1545. {
  1546. if (mr->romd_mode != romd_mode) {
  1547. memory_region_transaction_begin();
  1548. mr->romd_mode = romd_mode;
  1549. memory_region_update_pending |= mr->enabled;
  1550. memory_region_transaction_commit();
  1551. }
  1552. }
  1553. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1554. hwaddr size, unsigned client)
  1555. {
  1556. assert(mr->ram_block);
  1557. cpu_physical_memory_test_and_clear_dirty(
  1558. memory_region_get_ram_addr(mr) + addr, size, client);
  1559. }
  1560. int memory_region_get_fd(MemoryRegion *mr)
  1561. {
  1562. int fd;
  1563. rcu_read_lock();
  1564. while (mr->alias) {
  1565. mr = mr->alias;
  1566. }
  1567. fd = mr->ram_block->fd;
  1568. rcu_read_unlock();
  1569. return fd;
  1570. }
  1571. void memory_region_set_fd(MemoryRegion *mr, int fd)
  1572. {
  1573. rcu_read_lock();
  1574. while (mr->alias) {
  1575. mr = mr->alias;
  1576. }
  1577. mr->ram_block->fd = fd;
  1578. rcu_read_unlock();
  1579. }
  1580. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1581. {
  1582. void *ptr;
  1583. uint64_t offset = 0;
  1584. rcu_read_lock();
  1585. while (mr->alias) {
  1586. offset += mr->alias_offset;
  1587. mr = mr->alias;
  1588. }
  1589. assert(mr->ram_block);
  1590. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1591. rcu_read_unlock();
  1592. return ptr;
  1593. }
  1594. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1595. {
  1596. RAMBlock *block;
  1597. block = qemu_ram_block_from_host(ptr, false, offset);
  1598. if (!block) {
  1599. return NULL;
  1600. }
  1601. return block->mr;
  1602. }
  1603. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1604. {
  1605. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1606. }
  1607. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1608. {
  1609. assert(mr->ram_block);
  1610. qemu_ram_resize(mr->ram_block, newsize, errp);
  1611. }
  1612. static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
  1613. {
  1614. FlatView *view;
  1615. FlatRange *fr;
  1616. CoalescedMemoryRange *cmr;
  1617. AddrRange tmp;
  1618. MemoryRegionSection section;
  1619. view = address_space_get_flatview(as);
  1620. FOR_EACH_FLAT_RANGE(fr, view) {
  1621. if (fr->mr == mr) {
  1622. section = (MemoryRegionSection) {
  1623. .address_space = as,
  1624. .offset_within_address_space = int128_get64(fr->addr.start),
  1625. .size = fr->addr.size,
  1626. };
  1627. MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
  1628. int128_get64(fr->addr.start),
  1629. int128_get64(fr->addr.size));
  1630. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  1631. tmp = addrrange_shift(cmr->addr,
  1632. int128_sub(fr->addr.start,
  1633. int128_make64(fr->offset_in_region)));
  1634. if (!addrrange_intersects(tmp, fr->addr)) {
  1635. continue;
  1636. }
  1637. tmp = addrrange_intersection(tmp, fr->addr);
  1638. MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
  1639. int128_get64(tmp.start),
  1640. int128_get64(tmp.size));
  1641. }
  1642. }
  1643. }
  1644. flatview_unref(view);
  1645. }
  1646. static void memory_region_update_coalesced_range(MemoryRegion *mr)
  1647. {
  1648. AddressSpace *as;
  1649. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1650. memory_region_update_coalesced_range_as(mr, as);
  1651. }
  1652. }
  1653. void memory_region_set_coalescing(MemoryRegion *mr)
  1654. {
  1655. memory_region_clear_coalescing(mr);
  1656. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1657. }
  1658. void memory_region_add_coalescing(MemoryRegion *mr,
  1659. hwaddr offset,
  1660. uint64_t size)
  1661. {
  1662. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1663. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1664. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1665. memory_region_update_coalesced_range(mr);
  1666. memory_region_set_flush_coalesced(mr);
  1667. }
  1668. void memory_region_clear_coalescing(MemoryRegion *mr)
  1669. {
  1670. CoalescedMemoryRange *cmr;
  1671. bool updated = false;
  1672. qemu_flush_coalesced_mmio_buffer();
  1673. mr->flush_coalesced_mmio = false;
  1674. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1675. cmr = QTAILQ_FIRST(&mr->coalesced);
  1676. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1677. g_free(cmr);
  1678. updated = true;
  1679. }
  1680. if (updated) {
  1681. memory_region_update_coalesced_range(mr);
  1682. }
  1683. }
  1684. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1685. {
  1686. mr->flush_coalesced_mmio = true;
  1687. }
  1688. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  1689. {
  1690. qemu_flush_coalesced_mmio_buffer();
  1691. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1692. mr->flush_coalesced_mmio = false;
  1693. }
  1694. }
  1695. void memory_region_set_global_locking(MemoryRegion *mr)
  1696. {
  1697. mr->global_locking = true;
  1698. }
  1699. void memory_region_clear_global_locking(MemoryRegion *mr)
  1700. {
  1701. mr->global_locking = false;
  1702. }
  1703. static bool userspace_eventfd_warning;
  1704. void memory_region_add_eventfd(MemoryRegion *mr,
  1705. hwaddr addr,
  1706. unsigned size,
  1707. bool match_data,
  1708. uint64_t data,
  1709. EventNotifier *e)
  1710. {
  1711. MemoryRegionIoeventfd mrfd = {
  1712. .addr.start = int128_make64(addr),
  1713. .addr.size = int128_make64(size),
  1714. .match_data = match_data,
  1715. .data = data,
  1716. .e = e,
  1717. };
  1718. unsigned i;
  1719. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  1720. userspace_eventfd_warning))) {
  1721. userspace_eventfd_warning = true;
  1722. error_report("Using eventfd without MMIO binding in KVM. "
  1723. "Suboptimal performance expected");
  1724. }
  1725. if (size) {
  1726. adjust_endianness(mr, &mrfd.data, size);
  1727. }
  1728. memory_region_transaction_begin();
  1729. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1730. if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
  1731. break;
  1732. }
  1733. }
  1734. ++mr->ioeventfd_nb;
  1735. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1736. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  1737. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  1738. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  1739. mr->ioeventfds[i] = mrfd;
  1740. ioeventfd_update_pending |= mr->enabled;
  1741. memory_region_transaction_commit();
  1742. }
  1743. void memory_region_del_eventfd(MemoryRegion *mr,
  1744. hwaddr addr,
  1745. unsigned size,
  1746. bool match_data,
  1747. uint64_t data,
  1748. EventNotifier *e)
  1749. {
  1750. MemoryRegionIoeventfd mrfd = {
  1751. .addr.start = int128_make64(addr),
  1752. .addr.size = int128_make64(size),
  1753. .match_data = match_data,
  1754. .data = data,
  1755. .e = e,
  1756. };
  1757. unsigned i;
  1758. if (size) {
  1759. adjust_endianness(mr, &mrfd.data, size);
  1760. }
  1761. memory_region_transaction_begin();
  1762. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1763. if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
  1764. break;
  1765. }
  1766. }
  1767. assert(i != mr->ioeventfd_nb);
  1768. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  1769. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  1770. --mr->ioeventfd_nb;
  1771. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1772. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  1773. ioeventfd_update_pending |= mr->enabled;
  1774. memory_region_transaction_commit();
  1775. }
  1776. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  1777. {
  1778. MemoryRegion *mr = subregion->container;
  1779. MemoryRegion *other;
  1780. memory_region_transaction_begin();
  1781. memory_region_ref(subregion);
  1782. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  1783. if (subregion->priority >= other->priority) {
  1784. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  1785. goto done;
  1786. }
  1787. }
  1788. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  1789. done:
  1790. memory_region_update_pending |= mr->enabled && subregion->enabled;
  1791. memory_region_transaction_commit();
  1792. }
  1793. static void memory_region_add_subregion_common(MemoryRegion *mr,
  1794. hwaddr offset,
  1795. MemoryRegion *subregion)
  1796. {
  1797. assert(!subregion->container);
  1798. subregion->container = mr;
  1799. subregion->addr = offset;
  1800. memory_region_update_container_subregions(subregion);
  1801. }
  1802. void memory_region_add_subregion(MemoryRegion *mr,
  1803. hwaddr offset,
  1804. MemoryRegion *subregion)
  1805. {
  1806. subregion->priority = 0;
  1807. memory_region_add_subregion_common(mr, offset, subregion);
  1808. }
  1809. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  1810. hwaddr offset,
  1811. MemoryRegion *subregion,
  1812. int priority)
  1813. {
  1814. subregion->priority = priority;
  1815. memory_region_add_subregion_common(mr, offset, subregion);
  1816. }
  1817. void memory_region_del_subregion(MemoryRegion *mr,
  1818. MemoryRegion *subregion)
  1819. {
  1820. memory_region_transaction_begin();
  1821. assert(subregion->container == mr);
  1822. subregion->container = NULL;
  1823. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  1824. memory_region_unref(subregion);
  1825. memory_region_update_pending |= mr->enabled && subregion->enabled;
  1826. memory_region_transaction_commit();
  1827. }
  1828. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  1829. {
  1830. if (enabled == mr->enabled) {
  1831. return;
  1832. }
  1833. memory_region_transaction_begin();
  1834. mr->enabled = enabled;
  1835. memory_region_update_pending = true;
  1836. memory_region_transaction_commit();
  1837. }
  1838. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  1839. {
  1840. Int128 s = int128_make64(size);
  1841. if (size == UINT64_MAX) {
  1842. s = int128_2_64();
  1843. }
  1844. if (int128_eq(s, mr->size)) {
  1845. return;
  1846. }
  1847. memory_region_transaction_begin();
  1848. mr->size = s;
  1849. memory_region_update_pending = true;
  1850. memory_region_transaction_commit();
  1851. }
  1852. static void memory_region_readd_subregion(MemoryRegion *mr)
  1853. {
  1854. MemoryRegion *container = mr->container;
  1855. if (container) {
  1856. memory_region_transaction_begin();
  1857. memory_region_ref(mr);
  1858. memory_region_del_subregion(container, mr);
  1859. mr->container = container;
  1860. memory_region_update_container_subregions(mr);
  1861. memory_region_unref(mr);
  1862. memory_region_transaction_commit();
  1863. }
  1864. }
  1865. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  1866. {
  1867. if (addr != mr->addr) {
  1868. mr->addr = addr;
  1869. memory_region_readd_subregion(mr);
  1870. }
  1871. }
  1872. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  1873. {
  1874. assert(mr->alias);
  1875. if (offset == mr->alias_offset) {
  1876. return;
  1877. }
  1878. memory_region_transaction_begin();
  1879. mr->alias_offset = offset;
  1880. memory_region_update_pending |= mr->enabled;
  1881. memory_region_transaction_commit();
  1882. }
  1883. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  1884. {
  1885. return mr->align;
  1886. }
  1887. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  1888. {
  1889. const AddrRange *addr = addr_;
  1890. const FlatRange *fr = fr_;
  1891. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  1892. return -1;
  1893. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  1894. return 1;
  1895. }
  1896. return 0;
  1897. }
  1898. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  1899. {
  1900. return bsearch(&addr, view->ranges, view->nr,
  1901. sizeof(FlatRange), cmp_flatrange_addr);
  1902. }
  1903. bool memory_region_is_mapped(MemoryRegion *mr)
  1904. {
  1905. return mr->container ? true : false;
  1906. }
  1907. /* Same as memory_region_find, but it does not add a reference to the
  1908. * returned region. It must be called from an RCU critical section.
  1909. */
  1910. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  1911. hwaddr addr, uint64_t size)
  1912. {
  1913. MemoryRegionSection ret = { .mr = NULL };
  1914. MemoryRegion *root;
  1915. AddressSpace *as;
  1916. AddrRange range;
  1917. FlatView *view;
  1918. FlatRange *fr;
  1919. addr += mr->addr;
  1920. for (root = mr; root->container; ) {
  1921. root = root->container;
  1922. addr += root->addr;
  1923. }
  1924. as = memory_region_to_address_space(root);
  1925. if (!as) {
  1926. return ret;
  1927. }
  1928. range = addrrange_make(int128_make64(addr), int128_make64(size));
  1929. view = atomic_rcu_read(&as->current_map);
  1930. fr = flatview_lookup(view, range);
  1931. if (!fr) {
  1932. return ret;
  1933. }
  1934. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  1935. --fr;
  1936. }
  1937. ret.mr = fr->mr;
  1938. ret.address_space = as;
  1939. range = addrrange_intersection(range, fr->addr);
  1940. ret.offset_within_region = fr->offset_in_region;
  1941. ret.offset_within_region += int128_get64(int128_sub(range.start,
  1942. fr->addr.start));
  1943. ret.size = range.size;
  1944. ret.offset_within_address_space = int128_get64(range.start);
  1945. ret.readonly = fr->readonly;
  1946. return ret;
  1947. }
  1948. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  1949. hwaddr addr, uint64_t size)
  1950. {
  1951. MemoryRegionSection ret;
  1952. rcu_read_lock();
  1953. ret = memory_region_find_rcu(mr, addr, size);
  1954. if (ret.mr) {
  1955. memory_region_ref(ret.mr);
  1956. }
  1957. rcu_read_unlock();
  1958. return ret;
  1959. }
  1960. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  1961. {
  1962. MemoryRegion *mr;
  1963. rcu_read_lock();
  1964. mr = memory_region_find_rcu(container, addr, 1).mr;
  1965. rcu_read_unlock();
  1966. return mr && mr != container;
  1967. }
  1968. void memory_global_dirty_log_sync(void)
  1969. {
  1970. MemoryListener *listener;
  1971. AddressSpace *as;
  1972. FlatView *view;
  1973. FlatRange *fr;
  1974. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1975. if (!listener->log_sync) {
  1976. continue;
  1977. }
  1978. as = listener->address_space;
  1979. view = address_space_get_flatview(as);
  1980. FOR_EACH_FLAT_RANGE(fr, view) {
  1981. if (fr->dirty_log_mask) {
  1982. MemoryRegionSection mrs = section_from_flat_range(fr, as);
  1983. listener->log_sync(listener, &mrs);
  1984. }
  1985. }
  1986. flatview_unref(view);
  1987. }
  1988. }
  1989. void memory_global_dirty_log_start(void)
  1990. {
  1991. global_dirty_log = true;
  1992. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  1993. /* Refresh DIRTY_LOG_MIGRATION bit. */
  1994. memory_region_transaction_begin();
  1995. memory_region_update_pending = true;
  1996. memory_region_transaction_commit();
  1997. }
  1998. void memory_global_dirty_log_stop(void)
  1999. {
  2000. global_dirty_log = false;
  2001. /* Refresh DIRTY_LOG_MIGRATION bit. */
  2002. memory_region_transaction_begin();
  2003. memory_region_update_pending = true;
  2004. memory_region_transaction_commit();
  2005. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2006. }
  2007. static void listener_add_address_space(MemoryListener *listener,
  2008. AddressSpace *as)
  2009. {
  2010. FlatView *view;
  2011. FlatRange *fr;
  2012. if (listener->begin) {
  2013. listener->begin(listener);
  2014. }
  2015. if (global_dirty_log) {
  2016. if (listener->log_global_start) {
  2017. listener->log_global_start(listener);
  2018. }
  2019. }
  2020. view = address_space_get_flatview(as);
  2021. FOR_EACH_FLAT_RANGE(fr, view) {
  2022. MemoryRegionSection section = {
  2023. .mr = fr->mr,
  2024. .address_space = as,
  2025. .offset_within_region = fr->offset_in_region,
  2026. .size = fr->addr.size,
  2027. .offset_within_address_space = int128_get64(fr->addr.start),
  2028. .readonly = fr->readonly,
  2029. };
  2030. if (fr->dirty_log_mask && listener->log_start) {
  2031. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2032. }
  2033. if (listener->region_add) {
  2034. listener->region_add(listener, &section);
  2035. }
  2036. }
  2037. if (listener->commit) {
  2038. listener->commit(listener);
  2039. }
  2040. flatview_unref(view);
  2041. }
  2042. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2043. {
  2044. MemoryListener *other = NULL;
  2045. listener->address_space = as;
  2046. if (QTAILQ_EMPTY(&memory_listeners)
  2047. || listener->priority >= QTAILQ_LAST(&memory_listeners,
  2048. memory_listeners)->priority) {
  2049. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2050. } else {
  2051. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2052. if (listener->priority < other->priority) {
  2053. break;
  2054. }
  2055. }
  2056. QTAILQ_INSERT_BEFORE(other, listener, link);
  2057. }
  2058. if (QTAILQ_EMPTY(&as->listeners)
  2059. || listener->priority >= QTAILQ_LAST(&as->listeners,
  2060. memory_listeners)->priority) {
  2061. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2062. } else {
  2063. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2064. if (listener->priority < other->priority) {
  2065. break;
  2066. }
  2067. }
  2068. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2069. }
  2070. listener_add_address_space(listener, as);
  2071. }
  2072. void memory_listener_unregister(MemoryListener *listener)
  2073. {
  2074. if (!listener->address_space) {
  2075. return;
  2076. }
  2077. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2078. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2079. listener->address_space = NULL;
  2080. }
  2081. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2082. {
  2083. memory_region_ref(root);
  2084. memory_region_transaction_begin();
  2085. as->ref_count = 1;
  2086. as->root = root;
  2087. as->malloced = false;
  2088. as->current_map = g_new(FlatView, 1);
  2089. flatview_init(as->current_map);
  2090. as->ioeventfd_nb = 0;
  2091. as->ioeventfds = NULL;
  2092. QTAILQ_INIT(&as->listeners);
  2093. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2094. as->name = g_strdup(name ? name : "anonymous");
  2095. address_space_init_dispatch(as);
  2096. memory_region_update_pending |= root->enabled;
  2097. memory_region_transaction_commit();
  2098. }
  2099. static void do_address_space_destroy(AddressSpace *as)
  2100. {
  2101. bool do_free = as->malloced;
  2102. address_space_destroy_dispatch(as);
  2103. assert(QTAILQ_EMPTY(&as->listeners));
  2104. flatview_unref(as->current_map);
  2105. g_free(as->name);
  2106. g_free(as->ioeventfds);
  2107. memory_region_unref(as->root);
  2108. if (do_free) {
  2109. g_free(as);
  2110. }
  2111. }
  2112. AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
  2113. {
  2114. AddressSpace *as;
  2115. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2116. if (root == as->root && as->malloced) {
  2117. as->ref_count++;
  2118. return as;
  2119. }
  2120. }
  2121. as = g_malloc0(sizeof *as);
  2122. address_space_init(as, root, name);
  2123. as->malloced = true;
  2124. return as;
  2125. }
  2126. void address_space_destroy(AddressSpace *as)
  2127. {
  2128. MemoryRegion *root = as->root;
  2129. as->ref_count--;
  2130. if (as->ref_count) {
  2131. return;
  2132. }
  2133. /* Flush out anything from MemoryListeners listening in on this */
  2134. memory_region_transaction_begin();
  2135. as->root = NULL;
  2136. memory_region_transaction_commit();
  2137. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2138. address_space_unregister(as);
  2139. /* At this point, as->dispatch and as->current_map are dummy
  2140. * entries that the guest should never use. Wait for the old
  2141. * values to expire before freeing the data.
  2142. */
  2143. as->root = root;
  2144. call_rcu(as, do_address_space_destroy, rcu);
  2145. }
  2146. static const char *memory_region_type(MemoryRegion *mr)
  2147. {
  2148. if (memory_region_is_ram_device(mr)) {
  2149. return "ramd";
  2150. } else if (memory_region_is_romd(mr)) {
  2151. return "romd";
  2152. } else if (memory_region_is_rom(mr)) {
  2153. return "rom";
  2154. } else if (memory_region_is_ram(mr)) {
  2155. return "ram";
  2156. } else {
  2157. return "i/o";
  2158. }
  2159. }
  2160. typedef struct MemoryRegionList MemoryRegionList;
  2161. struct MemoryRegionList {
  2162. const MemoryRegion *mr;
  2163. QTAILQ_ENTRY(MemoryRegionList) queue;
  2164. };
  2165. typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
  2166. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2167. int128_sub((size), int128_one())) : 0)
  2168. #define MTREE_INDENT " "
  2169. static void mtree_print_mr(fprintf_function mon_printf, void *f,
  2170. const MemoryRegion *mr, unsigned int level,
  2171. hwaddr base,
  2172. MemoryRegionListHead *alias_print_queue)
  2173. {
  2174. MemoryRegionList *new_ml, *ml, *next_ml;
  2175. MemoryRegionListHead submr_print_queue;
  2176. const MemoryRegion *submr;
  2177. unsigned int i;
  2178. hwaddr cur_start, cur_end;
  2179. if (!mr) {
  2180. return;
  2181. }
  2182. for (i = 0; i < level; i++) {
  2183. mon_printf(f, MTREE_INDENT);
  2184. }
  2185. cur_start = base + mr->addr;
  2186. cur_end = cur_start + MR_SIZE(mr->size);
  2187. /*
  2188. * Try to detect overflow of memory region. This should never
  2189. * happen normally. When it happens, we dump something to warn the
  2190. * user who is observing this.
  2191. */
  2192. if (cur_start < base || cur_end < cur_start) {
  2193. mon_printf(f, "[DETECTED OVERFLOW!] ");
  2194. }
  2195. if (mr->alias) {
  2196. MemoryRegionList *ml;
  2197. bool found = false;
  2198. /* check if the alias is already in the queue */
  2199. QTAILQ_FOREACH(ml, alias_print_queue, queue) {
  2200. if (ml->mr == mr->alias) {
  2201. found = true;
  2202. }
  2203. }
  2204. if (!found) {
  2205. ml = g_new(MemoryRegionList, 1);
  2206. ml->mr = mr->alias;
  2207. QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
  2208. }
  2209. mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
  2210. " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
  2211. "-" TARGET_FMT_plx "%s\n",
  2212. cur_start, cur_end,
  2213. mr->priority,
  2214. memory_region_type((MemoryRegion *)mr),
  2215. memory_region_name(mr),
  2216. memory_region_name(mr->alias),
  2217. mr->alias_offset,
  2218. mr->alias_offset + MR_SIZE(mr->size),
  2219. mr->enabled ? "" : " [disabled]");
  2220. } else {
  2221. mon_printf(f,
  2222. TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
  2223. cur_start, cur_end,
  2224. mr->priority,
  2225. memory_region_type((MemoryRegion *)mr),
  2226. memory_region_name(mr),
  2227. mr->enabled ? "" : " [disabled]");
  2228. }
  2229. QTAILQ_INIT(&submr_print_queue);
  2230. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2231. new_ml = g_new(MemoryRegionList, 1);
  2232. new_ml->mr = submr;
  2233. QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
  2234. if (new_ml->mr->addr < ml->mr->addr ||
  2235. (new_ml->mr->addr == ml->mr->addr &&
  2236. new_ml->mr->priority > ml->mr->priority)) {
  2237. QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
  2238. new_ml = NULL;
  2239. break;
  2240. }
  2241. }
  2242. if (new_ml) {
  2243. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
  2244. }
  2245. }
  2246. QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
  2247. mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
  2248. alias_print_queue);
  2249. }
  2250. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
  2251. g_free(ml);
  2252. }
  2253. }
  2254. static void mtree_print_flatview(fprintf_function p, void *f,
  2255. AddressSpace *as)
  2256. {
  2257. FlatView *view = address_space_get_flatview(as);
  2258. FlatRange *range = &view->ranges[0];
  2259. MemoryRegion *mr;
  2260. int n = view->nr;
  2261. if (n <= 0) {
  2262. p(f, MTREE_INDENT "No rendered FlatView for "
  2263. "address space '%s'\n", as->name);
  2264. flatview_unref(view);
  2265. return;
  2266. }
  2267. while (n--) {
  2268. mr = range->mr;
  2269. if (range->offset_in_region) {
  2270. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2271. TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
  2272. int128_get64(range->addr.start),
  2273. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2274. mr->priority,
  2275. range->readonly ? "rom" : memory_region_type(mr),
  2276. memory_region_name(mr),
  2277. range->offset_in_region);
  2278. } else {
  2279. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2280. TARGET_FMT_plx " (prio %d, %s): %s\n",
  2281. int128_get64(range->addr.start),
  2282. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2283. mr->priority,
  2284. range->readonly ? "rom" : memory_region_type(mr),
  2285. memory_region_name(mr));
  2286. }
  2287. range++;
  2288. }
  2289. flatview_unref(view);
  2290. }
  2291. void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
  2292. {
  2293. MemoryRegionListHead ml_head;
  2294. MemoryRegionList *ml, *ml2;
  2295. AddressSpace *as;
  2296. if (flatview) {
  2297. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2298. mon_printf(f, "address-space (flat view): %s\n", as->name);
  2299. mtree_print_flatview(mon_printf, f, as);
  2300. mon_printf(f, "\n");
  2301. }
  2302. return;
  2303. }
  2304. QTAILQ_INIT(&ml_head);
  2305. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2306. mon_printf(f, "address-space: %s\n", as->name);
  2307. mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
  2308. mon_printf(f, "\n");
  2309. }
  2310. /* print aliased regions */
  2311. QTAILQ_FOREACH(ml, &ml_head, queue) {
  2312. mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
  2313. mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
  2314. mon_printf(f, "\n");
  2315. }
  2316. QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
  2317. g_free(ml);
  2318. }
  2319. }
  2320. static const TypeInfo memory_region_info = {
  2321. .parent = TYPE_OBJECT,
  2322. .name = TYPE_MEMORY_REGION,
  2323. .instance_size = sizeof(MemoryRegion),
  2324. .instance_init = memory_region_initfn,
  2325. .instance_finalize = memory_region_finalize,
  2326. };
  2327. static void memory_register_types(void)
  2328. {
  2329. type_register_static(&memory_region_info);
  2330. }
  2331. type_init(memory_register_types)