gdbstub.c 5.5 KB

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  1. /*
  2. * SPARC gdb server stub
  3. *
  4. * Copyright (c) 2003-2005 Fabrice Bellard
  5. * Copyright (c) 2013 SUSE LINUX Products GmbH
  6. *
  7. * This library is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU Lesser General Public
  9. * License as published by the Free Software Foundation; either
  10. * version 2 of the License, or (at your option) any later version.
  11. *
  12. * This library is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * Lesser General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU Lesser General Public
  18. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "config.h"
  21. #include "qemu-common.h"
  22. #include "exec/gdbstub.h"
  23. #ifdef TARGET_ABI32
  24. #define gdb_get_rega(buf, val) gdb_get_reg32(buf, val)
  25. #else
  26. #define gdb_get_rega(buf, val) gdb_get_regl(buf, val)
  27. #endif
  28. int sparc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
  29. {
  30. SPARCCPU *cpu = SPARC_CPU(cs);
  31. CPUSPARCState *env = &cpu->env;
  32. if (n < 8) {
  33. /* g0..g7 */
  34. return gdb_get_rega(mem_buf, env->gregs[n]);
  35. }
  36. if (n < 32) {
  37. /* register window */
  38. return gdb_get_rega(mem_buf, env->regwptr[n - 8]);
  39. }
  40. #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
  41. if (n < 64) {
  42. /* fprs */
  43. if (n & 1) {
  44. return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
  45. } else {
  46. return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
  47. }
  48. }
  49. /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
  50. switch (n) {
  51. case 64:
  52. return gdb_get_rega(mem_buf, env->y);
  53. case 65:
  54. return gdb_get_rega(mem_buf, cpu_get_psr(env));
  55. case 66:
  56. return gdb_get_rega(mem_buf, env->wim);
  57. case 67:
  58. return gdb_get_rega(mem_buf, env->tbr);
  59. case 68:
  60. return gdb_get_rega(mem_buf, env->pc);
  61. case 69:
  62. return gdb_get_rega(mem_buf, env->npc);
  63. case 70:
  64. return gdb_get_rega(mem_buf, env->fsr);
  65. case 71:
  66. return gdb_get_rega(mem_buf, 0); /* csr */
  67. default:
  68. return gdb_get_rega(mem_buf, 0);
  69. }
  70. #else
  71. if (n < 64) {
  72. /* f0-f31 */
  73. if (n & 1) {
  74. return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
  75. } else {
  76. return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
  77. }
  78. }
  79. if (n < 80) {
  80. /* f32-f62 (double width, even numbers only) */
  81. return gdb_get_reg64(mem_buf, env->fpr[(n - 32) / 2].ll);
  82. }
  83. switch (n) {
  84. case 80:
  85. return gdb_get_regl(mem_buf, env->pc);
  86. case 81:
  87. return gdb_get_regl(mem_buf, env->npc);
  88. case 82:
  89. return gdb_get_regl(mem_buf, (cpu_get_ccr(env) << 32) |
  90. ((env->asi & 0xff) << 24) |
  91. ((env->pstate & 0xfff) << 8) |
  92. cpu_get_cwp64(env));
  93. case 83:
  94. return gdb_get_regl(mem_buf, env->fsr);
  95. case 84:
  96. return gdb_get_regl(mem_buf, env->fprs);
  97. case 85:
  98. return gdb_get_regl(mem_buf, env->y);
  99. }
  100. #endif
  101. return 0;
  102. }
  103. int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
  104. {
  105. SPARCCPU *cpu = SPARC_CPU(cs);
  106. CPUSPARCState *env = &cpu->env;
  107. #if defined(TARGET_ABI32)
  108. abi_ulong tmp;
  109. tmp = ldl_p(mem_buf);
  110. #else
  111. target_ulong tmp;
  112. tmp = ldtul_p(mem_buf);
  113. #endif
  114. if (n < 8) {
  115. /* g0..g7 */
  116. env->gregs[n] = tmp;
  117. } else if (n < 32) {
  118. /* register window */
  119. env->regwptr[n - 8] = tmp;
  120. }
  121. #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
  122. else if (n < 64) {
  123. /* fprs */
  124. /* f0-f31 */
  125. if (n & 1) {
  126. env->fpr[(n - 32) / 2].l.lower = tmp;
  127. } else {
  128. env->fpr[(n - 32) / 2].l.upper = tmp;
  129. }
  130. } else {
  131. /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
  132. switch (n) {
  133. case 64:
  134. env->y = tmp;
  135. break;
  136. case 65:
  137. cpu_put_psr(env, tmp);
  138. break;
  139. case 66:
  140. env->wim = tmp;
  141. break;
  142. case 67:
  143. env->tbr = tmp;
  144. break;
  145. case 68:
  146. env->pc = tmp;
  147. break;
  148. case 69:
  149. env->npc = tmp;
  150. break;
  151. case 70:
  152. env->fsr = tmp;
  153. break;
  154. default:
  155. return 0;
  156. }
  157. }
  158. return 4;
  159. #else
  160. else if (n < 64) {
  161. /* f0-f31 */
  162. tmp = ldl_p(mem_buf);
  163. if (n & 1) {
  164. env->fpr[(n - 32) / 2].l.lower = tmp;
  165. } else {
  166. env->fpr[(n - 32) / 2].l.upper = tmp;
  167. }
  168. return 4;
  169. } else if (n < 80) {
  170. /* f32-f62 (double width, even numbers only) */
  171. env->fpr[(n - 32) / 2].ll = tmp;
  172. } else {
  173. switch (n) {
  174. case 80:
  175. env->pc = tmp;
  176. break;
  177. case 81:
  178. env->npc = tmp;
  179. break;
  180. case 82:
  181. cpu_put_ccr(env, tmp >> 32);
  182. env->asi = (tmp >> 24) & 0xff;
  183. env->pstate = (tmp >> 8) & 0xfff;
  184. cpu_put_cwp64(env, tmp & 0xff);
  185. break;
  186. case 83:
  187. env->fsr = tmp;
  188. break;
  189. case 84:
  190. env->fprs = tmp;
  191. break;
  192. case 85:
  193. env->y = tmp;
  194. break;
  195. default:
  196. return 0;
  197. }
  198. }
  199. return 8;
  200. #endif
  201. }