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dma-helpers.c 6.7 KB

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  1. /*
  2. * DMA helper functions
  3. *
  4. * Copyright (c) 2009 Red Hat
  5. *
  6. * This work is licensed under the terms of the GNU General Public License
  7. * (GNU GPL), version 2 or later.
  8. */
  9. #include "sysemu/block-backend.h"
  10. #include "sysemu/dma.h"
  11. #include "trace.h"
  12. #include "qemu/range.h"
  13. #include "qemu/thread.h"
  14. #include "qemu/main-loop.h"
  15. /* #define DEBUG_IOMMU */
  16. int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
  17. {
  18. dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
  19. #define FILLBUF_SIZE 512
  20. uint8_t fillbuf[FILLBUF_SIZE];
  21. int l;
  22. bool error = false;
  23. memset(fillbuf, c, FILLBUF_SIZE);
  24. while (len > 0) {
  25. l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
  26. error |= address_space_rw(as, addr, fillbuf, l, true);
  27. len -= l;
  28. addr += l;
  29. }
  30. return error;
  31. }
  32. void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
  33. AddressSpace *as)
  34. {
  35. qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
  36. qsg->nsg = 0;
  37. qsg->nalloc = alloc_hint;
  38. qsg->size = 0;
  39. qsg->as = as;
  40. qsg->dev = dev;
  41. object_ref(OBJECT(dev));
  42. }
  43. void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
  44. {
  45. if (qsg->nsg == qsg->nalloc) {
  46. qsg->nalloc = 2 * qsg->nalloc + 1;
  47. qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
  48. }
  49. qsg->sg[qsg->nsg].base = base;
  50. qsg->sg[qsg->nsg].len = len;
  51. qsg->size += len;
  52. ++qsg->nsg;
  53. }
  54. void qemu_sglist_destroy(QEMUSGList *qsg)
  55. {
  56. object_unref(OBJECT(qsg->dev));
  57. g_free(qsg->sg);
  58. memset(qsg, 0, sizeof(*qsg));
  59. }
  60. typedef struct {
  61. BlockAIOCB common;
  62. BlockBackend *blk;
  63. BlockAIOCB *acb;
  64. QEMUSGList *sg;
  65. uint64_t sector_num;
  66. DMADirection dir;
  67. int sg_cur_index;
  68. dma_addr_t sg_cur_byte;
  69. QEMUIOVector iov;
  70. QEMUBH *bh;
  71. DMAIOFunc *io_func;
  72. } DMAAIOCB;
  73. static void dma_blk_cb(void *opaque, int ret);
  74. static void reschedule_dma(void *opaque)
  75. {
  76. DMAAIOCB *dbs = (DMAAIOCB *)opaque;
  77. qemu_bh_delete(dbs->bh);
  78. dbs->bh = NULL;
  79. dma_blk_cb(dbs, 0);
  80. }
  81. static void continue_after_map_failure(void *opaque)
  82. {
  83. DMAAIOCB *dbs = (DMAAIOCB *)opaque;
  84. dbs->bh = qemu_bh_new(reschedule_dma, dbs);
  85. qemu_bh_schedule(dbs->bh);
  86. }
  87. static void dma_blk_unmap(DMAAIOCB *dbs)
  88. {
  89. int i;
  90. for (i = 0; i < dbs->iov.niov; ++i) {
  91. dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base,
  92. dbs->iov.iov[i].iov_len, dbs->dir,
  93. dbs->iov.iov[i].iov_len);
  94. }
  95. qemu_iovec_reset(&dbs->iov);
  96. }
  97. static void dma_complete(DMAAIOCB *dbs, int ret)
  98. {
  99. trace_dma_complete(dbs, ret, dbs->common.cb);
  100. dma_blk_unmap(dbs);
  101. if (dbs->common.cb) {
  102. dbs->common.cb(dbs->common.opaque, ret);
  103. }
  104. qemu_iovec_destroy(&dbs->iov);
  105. if (dbs->bh) {
  106. qemu_bh_delete(dbs->bh);
  107. dbs->bh = NULL;
  108. }
  109. qemu_aio_unref(dbs);
  110. }
  111. static void dma_blk_cb(void *opaque, int ret)
  112. {
  113. DMAAIOCB *dbs = (DMAAIOCB *)opaque;
  114. dma_addr_t cur_addr, cur_len;
  115. void *mem;
  116. trace_dma_blk_cb(dbs, ret);
  117. dbs->acb = NULL;
  118. dbs->sector_num += dbs->iov.size / 512;
  119. if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
  120. dma_complete(dbs, ret);
  121. return;
  122. }
  123. dma_blk_unmap(dbs);
  124. while (dbs->sg_cur_index < dbs->sg->nsg) {
  125. cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
  126. cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
  127. mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
  128. if (!mem)
  129. break;
  130. qemu_iovec_add(&dbs->iov, mem, cur_len);
  131. dbs->sg_cur_byte += cur_len;
  132. if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
  133. dbs->sg_cur_byte = 0;
  134. ++dbs->sg_cur_index;
  135. }
  136. }
  137. if (dbs->iov.size == 0) {
  138. trace_dma_map_wait(dbs);
  139. cpu_register_map_client(dbs, continue_after_map_failure);
  140. return;
  141. }
  142. if (dbs->iov.size & ~BDRV_SECTOR_MASK) {
  143. qemu_iovec_discard_back(&dbs->iov, dbs->iov.size & ~BDRV_SECTOR_MASK);
  144. }
  145. dbs->acb = dbs->io_func(dbs->blk, dbs->sector_num, &dbs->iov,
  146. dbs->iov.size / 512, dma_blk_cb, dbs);
  147. assert(dbs->acb);
  148. }
  149. static void dma_aio_cancel(BlockAIOCB *acb)
  150. {
  151. DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
  152. trace_dma_aio_cancel(dbs);
  153. if (dbs->acb) {
  154. blk_aio_cancel_async(dbs->acb);
  155. }
  156. }
  157. static const AIOCBInfo dma_aiocb_info = {
  158. .aiocb_size = sizeof(DMAAIOCB),
  159. .cancel_async = dma_aio_cancel,
  160. };
  161. BlockAIOCB *dma_blk_io(
  162. BlockBackend *blk, QEMUSGList *sg, uint64_t sector_num,
  163. DMAIOFunc *io_func, BlockCompletionFunc *cb,
  164. void *opaque, DMADirection dir)
  165. {
  166. DMAAIOCB *dbs = blk_aio_get(&dma_aiocb_info, blk, cb, opaque);
  167. trace_dma_blk_io(dbs, blk, sector_num, (dir == DMA_DIRECTION_TO_DEVICE));
  168. dbs->acb = NULL;
  169. dbs->blk = blk;
  170. dbs->sg = sg;
  171. dbs->sector_num = sector_num;
  172. dbs->sg_cur_index = 0;
  173. dbs->sg_cur_byte = 0;
  174. dbs->dir = dir;
  175. dbs->io_func = io_func;
  176. dbs->bh = NULL;
  177. qemu_iovec_init(&dbs->iov, sg->nsg);
  178. dma_blk_cb(dbs, 0);
  179. return &dbs->common;
  180. }
  181. BlockAIOCB *dma_blk_read(BlockBackend *blk,
  182. QEMUSGList *sg, uint64_t sector,
  183. void (*cb)(void *opaque, int ret), void *opaque)
  184. {
  185. return dma_blk_io(blk, sg, sector, blk_aio_readv, cb, opaque,
  186. DMA_DIRECTION_FROM_DEVICE);
  187. }
  188. BlockAIOCB *dma_blk_write(BlockBackend *blk,
  189. QEMUSGList *sg, uint64_t sector,
  190. void (*cb)(void *opaque, int ret), void *opaque)
  191. {
  192. return dma_blk_io(blk, sg, sector, blk_aio_writev, cb, opaque,
  193. DMA_DIRECTION_TO_DEVICE);
  194. }
  195. static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
  196. DMADirection dir)
  197. {
  198. uint64_t resid;
  199. int sg_cur_index;
  200. resid = sg->size;
  201. sg_cur_index = 0;
  202. len = MIN(len, resid);
  203. while (len > 0) {
  204. ScatterGatherEntry entry = sg->sg[sg_cur_index++];
  205. int32_t xfer = MIN(len, entry.len);
  206. dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
  207. ptr += xfer;
  208. len -= xfer;
  209. resid -= xfer;
  210. }
  211. return resid;
  212. }
  213. uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
  214. {
  215. return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
  216. }
  217. uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
  218. {
  219. return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
  220. }
  221. void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
  222. QEMUSGList *sg, enum BlockAcctType type)
  223. {
  224. block_acct_start(blk_get_stats(blk), cookie, sg->size, type);
  225. }