memory.c 98 KB

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  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "qemu-common.h"
  18. #include "cpu.h"
  19. #include "exec/memory.h"
  20. #include "exec/address-spaces.h"
  21. #include "exec/ioport.h"
  22. #include "qapi/visitor.h"
  23. #include "qemu/bitops.h"
  24. #include "qemu/error-report.h"
  25. #include "qom/object.h"
  26. #include "trace-root.h"
  27. #include "exec/memory-internal.h"
  28. #include "exec/ram_addr.h"
  29. #include "sysemu/kvm.h"
  30. #include "sysemu/sysemu.h"
  31. #include "hw/misc/mmio_interface.h"
  32. #include "hw/qdev-properties.h"
  33. #include "migration/vmstate.h"
  34. //#define DEBUG_UNASSIGNED
  35. static unsigned memory_region_transaction_depth;
  36. static bool memory_region_update_pending;
  37. static bool ioeventfd_update_pending;
  38. static bool global_dirty_log = false;
  39. static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  40. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  41. static QTAILQ_HEAD(, AddressSpace) address_spaces
  42. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  43. static GHashTable *flat_views;
  44. typedef struct AddrRange AddrRange;
  45. /*
  46. * Note that signed integers are needed for negative offsetting in aliases
  47. * (large MemoryRegion::alias_offset).
  48. */
  49. struct AddrRange {
  50. Int128 start;
  51. Int128 size;
  52. };
  53. static AddrRange addrrange_make(Int128 start, Int128 size)
  54. {
  55. return (AddrRange) { start, size };
  56. }
  57. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  58. {
  59. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  60. }
  61. static Int128 addrrange_end(AddrRange r)
  62. {
  63. return int128_add(r.start, r.size);
  64. }
  65. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  66. {
  67. int128_addto(&range.start, delta);
  68. return range;
  69. }
  70. static bool addrrange_contains(AddrRange range, Int128 addr)
  71. {
  72. return int128_ge(addr, range.start)
  73. && int128_lt(addr, addrrange_end(range));
  74. }
  75. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  76. {
  77. return addrrange_contains(r1, r2.start)
  78. || addrrange_contains(r2, r1.start);
  79. }
  80. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  81. {
  82. Int128 start = int128_max(r1.start, r2.start);
  83. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  84. return addrrange_make(start, int128_sub(end, start));
  85. }
  86. enum ListenerDirection { Forward, Reverse };
  87. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  88. do { \
  89. MemoryListener *_listener; \
  90. \
  91. switch (_direction) { \
  92. case Forward: \
  93. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  94. if (_listener->_callback) { \
  95. _listener->_callback(_listener, ##_args); \
  96. } \
  97. } \
  98. break; \
  99. case Reverse: \
  100. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
  101. memory_listeners, link) { \
  102. if (_listener->_callback) { \
  103. _listener->_callback(_listener, ##_args); \
  104. } \
  105. } \
  106. break; \
  107. default: \
  108. abort(); \
  109. } \
  110. } while (0)
  111. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  112. do { \
  113. MemoryListener *_listener; \
  114. struct memory_listeners_as *list = &(_as)->listeners; \
  115. \
  116. switch (_direction) { \
  117. case Forward: \
  118. QTAILQ_FOREACH(_listener, list, link_as) { \
  119. if (_listener->_callback) { \
  120. _listener->_callback(_listener, _section, ##_args); \
  121. } \
  122. } \
  123. break; \
  124. case Reverse: \
  125. QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
  126. link_as) { \
  127. if (_listener->_callback) { \
  128. _listener->_callback(_listener, _section, ##_args); \
  129. } \
  130. } \
  131. break; \
  132. default: \
  133. abort(); \
  134. } \
  135. } while (0)
  136. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  137. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  138. do { \
  139. MemoryRegionSection mrs = section_from_flat_range(fr, \
  140. address_space_to_flatview(as)); \
  141. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  142. } while(0)
  143. struct CoalescedMemoryRange {
  144. AddrRange addr;
  145. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  146. };
  147. struct MemoryRegionIoeventfd {
  148. AddrRange addr;
  149. bool match_data;
  150. uint64_t data;
  151. EventNotifier *e;
  152. };
  153. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
  154. MemoryRegionIoeventfd b)
  155. {
  156. if (int128_lt(a.addr.start, b.addr.start)) {
  157. return true;
  158. } else if (int128_gt(a.addr.start, b.addr.start)) {
  159. return false;
  160. } else if (int128_lt(a.addr.size, b.addr.size)) {
  161. return true;
  162. } else if (int128_gt(a.addr.size, b.addr.size)) {
  163. return false;
  164. } else if (a.match_data < b.match_data) {
  165. return true;
  166. } else if (a.match_data > b.match_data) {
  167. return false;
  168. } else if (a.match_data) {
  169. if (a.data < b.data) {
  170. return true;
  171. } else if (a.data > b.data) {
  172. return false;
  173. }
  174. }
  175. if (a.e < b.e) {
  176. return true;
  177. } else if (a.e > b.e) {
  178. return false;
  179. }
  180. return false;
  181. }
  182. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
  183. MemoryRegionIoeventfd b)
  184. {
  185. return !memory_region_ioeventfd_before(a, b)
  186. && !memory_region_ioeventfd_before(b, a);
  187. }
  188. /* Range of memory in the global map. Addresses are absolute. */
  189. struct FlatRange {
  190. MemoryRegion *mr;
  191. hwaddr offset_in_region;
  192. AddrRange addr;
  193. uint8_t dirty_log_mask;
  194. bool romd_mode;
  195. bool readonly;
  196. };
  197. typedef struct AddressSpaceOps AddressSpaceOps;
  198. #define FOR_EACH_FLAT_RANGE(var, view) \
  199. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  200. static inline MemoryRegionSection
  201. section_from_flat_range(FlatRange *fr, FlatView *fv)
  202. {
  203. return (MemoryRegionSection) {
  204. .mr = fr->mr,
  205. .fv = fv,
  206. .offset_within_region = fr->offset_in_region,
  207. .size = fr->addr.size,
  208. .offset_within_address_space = int128_get64(fr->addr.start),
  209. .readonly = fr->readonly,
  210. };
  211. }
  212. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  213. {
  214. return a->mr == b->mr
  215. && addrrange_equal(a->addr, b->addr)
  216. && a->offset_in_region == b->offset_in_region
  217. && a->romd_mode == b->romd_mode
  218. && a->readonly == b->readonly;
  219. }
  220. static FlatView *flatview_new(MemoryRegion *mr_root)
  221. {
  222. FlatView *view;
  223. view = g_new0(FlatView, 1);
  224. view->ref = 1;
  225. view->root = mr_root;
  226. memory_region_ref(mr_root);
  227. trace_flatview_new(view, mr_root);
  228. return view;
  229. }
  230. /* Insert a range into a given position. Caller is responsible for maintaining
  231. * sorting order.
  232. */
  233. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  234. {
  235. if (view->nr == view->nr_allocated) {
  236. view->nr_allocated = MAX(2 * view->nr, 10);
  237. view->ranges = g_realloc(view->ranges,
  238. view->nr_allocated * sizeof(*view->ranges));
  239. }
  240. memmove(view->ranges + pos + 1, view->ranges + pos,
  241. (view->nr - pos) * sizeof(FlatRange));
  242. view->ranges[pos] = *range;
  243. memory_region_ref(range->mr);
  244. ++view->nr;
  245. }
  246. static void flatview_destroy(FlatView *view)
  247. {
  248. int i;
  249. trace_flatview_destroy(view, view->root);
  250. if (view->dispatch) {
  251. address_space_dispatch_free(view->dispatch);
  252. }
  253. for (i = 0; i < view->nr; i++) {
  254. memory_region_unref(view->ranges[i].mr);
  255. }
  256. g_free(view->ranges);
  257. memory_region_unref(view->root);
  258. g_free(view);
  259. }
  260. static bool flatview_ref(FlatView *view)
  261. {
  262. return atomic_fetch_inc_nonzero(&view->ref) > 0;
  263. }
  264. static void flatview_unref(FlatView *view)
  265. {
  266. if (atomic_fetch_dec(&view->ref) == 1) {
  267. trace_flatview_destroy_rcu(view, view->root);
  268. assert(view->root);
  269. call_rcu(view, flatview_destroy, rcu);
  270. }
  271. }
  272. static bool can_merge(FlatRange *r1, FlatRange *r2)
  273. {
  274. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  275. && r1->mr == r2->mr
  276. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  277. r1->addr.size),
  278. int128_make64(r2->offset_in_region))
  279. && r1->dirty_log_mask == r2->dirty_log_mask
  280. && r1->romd_mode == r2->romd_mode
  281. && r1->readonly == r2->readonly;
  282. }
  283. /* Attempt to simplify a view by merging adjacent ranges */
  284. static void flatview_simplify(FlatView *view)
  285. {
  286. unsigned i, j;
  287. i = 0;
  288. while (i < view->nr) {
  289. j = i + 1;
  290. while (j < view->nr
  291. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  292. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  293. ++j;
  294. }
  295. ++i;
  296. memmove(&view->ranges[i], &view->ranges[j],
  297. (view->nr - j) * sizeof(view->ranges[j]));
  298. view->nr -= j - i;
  299. }
  300. }
  301. static bool memory_region_big_endian(MemoryRegion *mr)
  302. {
  303. #ifdef TARGET_WORDS_BIGENDIAN
  304. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  305. #else
  306. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  307. #endif
  308. }
  309. static bool memory_region_wrong_endianness(MemoryRegion *mr)
  310. {
  311. #ifdef TARGET_WORDS_BIGENDIAN
  312. return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
  313. #else
  314. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  315. #endif
  316. }
  317. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
  318. {
  319. if (memory_region_wrong_endianness(mr)) {
  320. switch (size) {
  321. case 1:
  322. break;
  323. case 2:
  324. *data = bswap16(*data);
  325. break;
  326. case 4:
  327. *data = bswap32(*data);
  328. break;
  329. case 8:
  330. *data = bswap64(*data);
  331. break;
  332. default:
  333. abort();
  334. }
  335. }
  336. }
  337. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  338. {
  339. MemoryRegion *root;
  340. hwaddr abs_addr = offset;
  341. abs_addr += mr->addr;
  342. for (root = mr; root->container; ) {
  343. root = root->container;
  344. abs_addr += root->addr;
  345. }
  346. return abs_addr;
  347. }
  348. static int get_cpu_index(void)
  349. {
  350. if (current_cpu) {
  351. return current_cpu->cpu_index;
  352. }
  353. return -1;
  354. }
  355. static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
  356. hwaddr addr,
  357. uint64_t *value,
  358. unsigned size,
  359. unsigned shift,
  360. uint64_t mask,
  361. MemTxAttrs attrs)
  362. {
  363. uint64_t tmp;
  364. tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
  365. if (mr->subpage) {
  366. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  367. } else if (mr == &io_mem_notdirty) {
  368. /* Accesses to code which has previously been translated into a TB show
  369. * up in the MMIO path, as accesses to the io_mem_notdirty
  370. * MemoryRegion. */
  371. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  372. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  373. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  374. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  375. }
  376. *value |= (tmp & mask) << shift;
  377. return MEMTX_OK;
  378. }
  379. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  380. hwaddr addr,
  381. uint64_t *value,
  382. unsigned size,
  383. unsigned shift,
  384. uint64_t mask,
  385. MemTxAttrs attrs)
  386. {
  387. uint64_t tmp;
  388. tmp = mr->ops->read(mr->opaque, addr, size);
  389. if (mr->subpage) {
  390. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  391. } else if (mr == &io_mem_notdirty) {
  392. /* Accesses to code which has previously been translated into a TB show
  393. * up in the MMIO path, as accesses to the io_mem_notdirty
  394. * MemoryRegion. */
  395. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  396. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  397. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  398. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  399. }
  400. *value |= (tmp & mask) << shift;
  401. return MEMTX_OK;
  402. }
  403. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  404. hwaddr addr,
  405. uint64_t *value,
  406. unsigned size,
  407. unsigned shift,
  408. uint64_t mask,
  409. MemTxAttrs attrs)
  410. {
  411. uint64_t tmp = 0;
  412. MemTxResult r;
  413. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  414. if (mr->subpage) {
  415. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  416. } else if (mr == &io_mem_notdirty) {
  417. /* Accesses to code which has previously been translated into a TB show
  418. * up in the MMIO path, as accesses to the io_mem_notdirty
  419. * MemoryRegion. */
  420. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  421. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  422. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  423. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  424. }
  425. *value |= (tmp & mask) << shift;
  426. return r;
  427. }
  428. static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
  429. hwaddr addr,
  430. uint64_t *value,
  431. unsigned size,
  432. unsigned shift,
  433. uint64_t mask,
  434. MemTxAttrs attrs)
  435. {
  436. uint64_t tmp;
  437. tmp = (*value >> shift) & mask;
  438. if (mr->subpage) {
  439. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  440. } else if (mr == &io_mem_notdirty) {
  441. /* Accesses to code which has previously been translated into a TB show
  442. * up in the MMIO path, as accesses to the io_mem_notdirty
  443. * MemoryRegion. */
  444. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  445. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  446. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  447. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  448. }
  449. mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
  450. return MEMTX_OK;
  451. }
  452. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  453. hwaddr addr,
  454. uint64_t *value,
  455. unsigned size,
  456. unsigned shift,
  457. uint64_t mask,
  458. MemTxAttrs attrs)
  459. {
  460. uint64_t tmp;
  461. tmp = (*value >> shift) & mask;
  462. if (mr->subpage) {
  463. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  464. } else if (mr == &io_mem_notdirty) {
  465. /* Accesses to code which has previously been translated into a TB show
  466. * up in the MMIO path, as accesses to the io_mem_notdirty
  467. * MemoryRegion. */
  468. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  469. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  470. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  471. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  472. }
  473. mr->ops->write(mr->opaque, addr, tmp, size);
  474. return MEMTX_OK;
  475. }
  476. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  477. hwaddr addr,
  478. uint64_t *value,
  479. unsigned size,
  480. unsigned shift,
  481. uint64_t mask,
  482. MemTxAttrs attrs)
  483. {
  484. uint64_t tmp;
  485. tmp = (*value >> shift) & mask;
  486. if (mr->subpage) {
  487. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  488. } else if (mr == &io_mem_notdirty) {
  489. /* Accesses to code which has previously been translated into a TB show
  490. * up in the MMIO path, as accesses to the io_mem_notdirty
  491. * MemoryRegion. */
  492. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  493. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  494. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  495. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  496. }
  497. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  498. }
  499. static MemTxResult access_with_adjusted_size(hwaddr addr,
  500. uint64_t *value,
  501. unsigned size,
  502. unsigned access_size_min,
  503. unsigned access_size_max,
  504. MemTxResult (*access_fn)
  505. (MemoryRegion *mr,
  506. hwaddr addr,
  507. uint64_t *value,
  508. unsigned size,
  509. unsigned shift,
  510. uint64_t mask,
  511. MemTxAttrs attrs),
  512. MemoryRegion *mr,
  513. MemTxAttrs attrs)
  514. {
  515. uint64_t access_mask;
  516. unsigned access_size;
  517. unsigned i;
  518. MemTxResult r = MEMTX_OK;
  519. if (!access_size_min) {
  520. access_size_min = 1;
  521. }
  522. if (!access_size_max) {
  523. access_size_max = 4;
  524. }
  525. /* FIXME: support unaligned access? */
  526. access_size = MAX(MIN(size, access_size_max), access_size_min);
  527. access_mask = -1ULL >> (64 - access_size * 8);
  528. if (memory_region_big_endian(mr)) {
  529. for (i = 0; i < size; i += access_size) {
  530. r |= access_fn(mr, addr + i, value, access_size,
  531. (size - access_size - i) * 8, access_mask, attrs);
  532. }
  533. } else {
  534. for (i = 0; i < size; i += access_size) {
  535. r |= access_fn(mr, addr + i, value, access_size, i * 8,
  536. access_mask, attrs);
  537. }
  538. }
  539. return r;
  540. }
  541. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  542. {
  543. AddressSpace *as;
  544. while (mr->container) {
  545. mr = mr->container;
  546. }
  547. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  548. if (mr == as->root) {
  549. return as;
  550. }
  551. }
  552. return NULL;
  553. }
  554. /* Render a memory region into the global view. Ranges in @view obscure
  555. * ranges in @mr.
  556. */
  557. static void render_memory_region(FlatView *view,
  558. MemoryRegion *mr,
  559. Int128 base,
  560. AddrRange clip,
  561. bool readonly)
  562. {
  563. MemoryRegion *subregion;
  564. unsigned i;
  565. hwaddr offset_in_region;
  566. Int128 remain;
  567. Int128 now;
  568. FlatRange fr;
  569. AddrRange tmp;
  570. if (!mr->enabled) {
  571. return;
  572. }
  573. int128_addto(&base, int128_make64(mr->addr));
  574. readonly |= mr->readonly;
  575. tmp = addrrange_make(base, mr->size);
  576. if (!addrrange_intersects(tmp, clip)) {
  577. return;
  578. }
  579. clip = addrrange_intersection(tmp, clip);
  580. if (mr->alias) {
  581. int128_subfrom(&base, int128_make64(mr->alias->addr));
  582. int128_subfrom(&base, int128_make64(mr->alias_offset));
  583. render_memory_region(view, mr->alias, base, clip, readonly);
  584. return;
  585. }
  586. /* Render subregions in priority order. */
  587. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  588. render_memory_region(view, subregion, base, clip, readonly);
  589. }
  590. if (!mr->terminates) {
  591. return;
  592. }
  593. offset_in_region = int128_get64(int128_sub(clip.start, base));
  594. base = clip.start;
  595. remain = clip.size;
  596. fr.mr = mr;
  597. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  598. fr.romd_mode = mr->romd_mode;
  599. fr.readonly = readonly;
  600. /* Render the region itself into any gaps left by the current view. */
  601. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  602. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  603. continue;
  604. }
  605. if (int128_lt(base, view->ranges[i].addr.start)) {
  606. now = int128_min(remain,
  607. int128_sub(view->ranges[i].addr.start, base));
  608. fr.offset_in_region = offset_in_region;
  609. fr.addr = addrrange_make(base, now);
  610. flatview_insert(view, i, &fr);
  611. ++i;
  612. int128_addto(&base, now);
  613. offset_in_region += int128_get64(now);
  614. int128_subfrom(&remain, now);
  615. }
  616. now = int128_sub(int128_min(int128_add(base, remain),
  617. addrrange_end(view->ranges[i].addr)),
  618. base);
  619. int128_addto(&base, now);
  620. offset_in_region += int128_get64(now);
  621. int128_subfrom(&remain, now);
  622. }
  623. if (int128_nz(remain)) {
  624. fr.offset_in_region = offset_in_region;
  625. fr.addr = addrrange_make(base, remain);
  626. flatview_insert(view, i, &fr);
  627. }
  628. }
  629. static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
  630. {
  631. while (mr->enabled) {
  632. if (mr->alias) {
  633. if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
  634. /* The alias is included in its entirety. Use it as
  635. * the "real" root, so that we can share more FlatViews.
  636. */
  637. mr = mr->alias;
  638. continue;
  639. }
  640. } else if (!mr->terminates) {
  641. unsigned int found = 0;
  642. MemoryRegion *child, *next = NULL;
  643. QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
  644. if (child->enabled) {
  645. if (++found > 1) {
  646. next = NULL;
  647. break;
  648. }
  649. if (!child->addr && int128_ge(mr->size, child->size)) {
  650. /* A child is included in its entirety. If it's the only
  651. * enabled one, use it in the hope of finding an alias down the
  652. * way. This will also let us share FlatViews.
  653. */
  654. next = child;
  655. }
  656. }
  657. }
  658. if (found == 0) {
  659. return NULL;
  660. }
  661. if (next) {
  662. mr = next;
  663. continue;
  664. }
  665. }
  666. return mr;
  667. }
  668. return NULL;
  669. }
  670. /* Render a memory topology into a list of disjoint absolute ranges. */
  671. static FlatView *generate_memory_topology(MemoryRegion *mr)
  672. {
  673. int i;
  674. FlatView *view;
  675. view = flatview_new(mr);
  676. if (mr) {
  677. render_memory_region(view, mr, int128_zero(),
  678. addrrange_make(int128_zero(), int128_2_64()), false);
  679. }
  680. flatview_simplify(view);
  681. view->dispatch = address_space_dispatch_new(view);
  682. for (i = 0; i < view->nr; i++) {
  683. MemoryRegionSection mrs =
  684. section_from_flat_range(&view->ranges[i], view);
  685. flatview_add_to_dispatch(view, &mrs);
  686. }
  687. address_space_dispatch_compact(view->dispatch);
  688. g_hash_table_replace(flat_views, mr, view);
  689. return view;
  690. }
  691. static void address_space_add_del_ioeventfds(AddressSpace *as,
  692. MemoryRegionIoeventfd *fds_new,
  693. unsigned fds_new_nb,
  694. MemoryRegionIoeventfd *fds_old,
  695. unsigned fds_old_nb)
  696. {
  697. unsigned iold, inew;
  698. MemoryRegionIoeventfd *fd;
  699. MemoryRegionSection section;
  700. /* Generate a symmetric difference of the old and new fd sets, adding
  701. * and deleting as necessary.
  702. */
  703. iold = inew = 0;
  704. while (iold < fds_old_nb || inew < fds_new_nb) {
  705. if (iold < fds_old_nb
  706. && (inew == fds_new_nb
  707. || memory_region_ioeventfd_before(fds_old[iold],
  708. fds_new[inew]))) {
  709. fd = &fds_old[iold];
  710. section = (MemoryRegionSection) {
  711. .fv = address_space_to_flatview(as),
  712. .offset_within_address_space = int128_get64(fd->addr.start),
  713. .size = fd->addr.size,
  714. };
  715. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  716. fd->match_data, fd->data, fd->e);
  717. ++iold;
  718. } else if (inew < fds_new_nb
  719. && (iold == fds_old_nb
  720. || memory_region_ioeventfd_before(fds_new[inew],
  721. fds_old[iold]))) {
  722. fd = &fds_new[inew];
  723. section = (MemoryRegionSection) {
  724. .fv = address_space_to_flatview(as),
  725. .offset_within_address_space = int128_get64(fd->addr.start),
  726. .size = fd->addr.size,
  727. };
  728. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  729. fd->match_data, fd->data, fd->e);
  730. ++inew;
  731. } else {
  732. ++iold;
  733. ++inew;
  734. }
  735. }
  736. }
  737. static FlatView *address_space_get_flatview(AddressSpace *as)
  738. {
  739. FlatView *view;
  740. rcu_read_lock();
  741. do {
  742. view = address_space_to_flatview(as);
  743. /* If somebody has replaced as->current_map concurrently,
  744. * flatview_ref returns false.
  745. */
  746. } while (!flatview_ref(view));
  747. rcu_read_unlock();
  748. return view;
  749. }
  750. static void address_space_update_ioeventfds(AddressSpace *as)
  751. {
  752. FlatView *view;
  753. FlatRange *fr;
  754. unsigned ioeventfd_nb = 0;
  755. MemoryRegionIoeventfd *ioeventfds = NULL;
  756. AddrRange tmp;
  757. unsigned i;
  758. view = address_space_get_flatview(as);
  759. FOR_EACH_FLAT_RANGE(fr, view) {
  760. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  761. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  762. int128_sub(fr->addr.start,
  763. int128_make64(fr->offset_in_region)));
  764. if (addrrange_intersects(fr->addr, tmp)) {
  765. ++ioeventfd_nb;
  766. ioeventfds = g_realloc(ioeventfds,
  767. ioeventfd_nb * sizeof(*ioeventfds));
  768. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  769. ioeventfds[ioeventfd_nb-1].addr = tmp;
  770. }
  771. }
  772. }
  773. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  774. as->ioeventfds, as->ioeventfd_nb);
  775. g_free(as->ioeventfds);
  776. as->ioeventfds = ioeventfds;
  777. as->ioeventfd_nb = ioeventfd_nb;
  778. flatview_unref(view);
  779. }
  780. static void address_space_update_topology_pass(AddressSpace *as,
  781. const FlatView *old_view,
  782. const FlatView *new_view,
  783. bool adding)
  784. {
  785. unsigned iold, inew;
  786. FlatRange *frold, *frnew;
  787. /* Generate a symmetric difference of the old and new memory maps.
  788. * Kill ranges in the old map, and instantiate ranges in the new map.
  789. */
  790. iold = inew = 0;
  791. while (iold < old_view->nr || inew < new_view->nr) {
  792. if (iold < old_view->nr) {
  793. frold = &old_view->ranges[iold];
  794. } else {
  795. frold = NULL;
  796. }
  797. if (inew < new_view->nr) {
  798. frnew = &new_view->ranges[inew];
  799. } else {
  800. frnew = NULL;
  801. }
  802. if (frold
  803. && (!frnew
  804. || int128_lt(frold->addr.start, frnew->addr.start)
  805. || (int128_eq(frold->addr.start, frnew->addr.start)
  806. && !flatrange_equal(frold, frnew)))) {
  807. /* In old but not in new, or in both but attributes changed. */
  808. if (!adding) {
  809. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  810. }
  811. ++iold;
  812. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  813. /* In both and unchanged (except logging may have changed) */
  814. if (adding) {
  815. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  816. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  817. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  818. frold->dirty_log_mask,
  819. frnew->dirty_log_mask);
  820. }
  821. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  822. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  823. frold->dirty_log_mask,
  824. frnew->dirty_log_mask);
  825. }
  826. }
  827. ++iold;
  828. ++inew;
  829. } else {
  830. /* In new */
  831. if (adding) {
  832. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  833. }
  834. ++inew;
  835. }
  836. }
  837. }
  838. static void flatviews_init(void)
  839. {
  840. static FlatView *empty_view;
  841. if (flat_views) {
  842. return;
  843. }
  844. flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
  845. (GDestroyNotify) flatview_unref);
  846. if (!empty_view) {
  847. empty_view = generate_memory_topology(NULL);
  848. /* We keep it alive forever in the global variable. */
  849. flatview_ref(empty_view);
  850. } else {
  851. g_hash_table_replace(flat_views, NULL, empty_view);
  852. flatview_ref(empty_view);
  853. }
  854. }
  855. static void flatviews_reset(void)
  856. {
  857. AddressSpace *as;
  858. if (flat_views) {
  859. g_hash_table_unref(flat_views);
  860. flat_views = NULL;
  861. }
  862. flatviews_init();
  863. /* Render unique FVs */
  864. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  865. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  866. if (g_hash_table_lookup(flat_views, physmr)) {
  867. continue;
  868. }
  869. generate_memory_topology(physmr);
  870. }
  871. }
  872. static void address_space_set_flatview(AddressSpace *as)
  873. {
  874. FlatView *old_view = address_space_to_flatview(as);
  875. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  876. FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
  877. assert(new_view);
  878. if (old_view == new_view) {
  879. return;
  880. }
  881. if (old_view) {
  882. flatview_ref(old_view);
  883. }
  884. flatview_ref(new_view);
  885. if (!QTAILQ_EMPTY(&as->listeners)) {
  886. FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
  887. if (!old_view2) {
  888. old_view2 = &tmpview;
  889. }
  890. address_space_update_topology_pass(as, old_view2, new_view, false);
  891. address_space_update_topology_pass(as, old_view2, new_view, true);
  892. }
  893. /* Writes are protected by the BQL. */
  894. atomic_rcu_set(&as->current_map, new_view);
  895. if (old_view) {
  896. flatview_unref(old_view);
  897. }
  898. /* Note that all the old MemoryRegions are still alive up to this
  899. * point. This relieves most MemoryListeners from the need to
  900. * ref/unref the MemoryRegions they get---unless they use them
  901. * outside the iothread mutex, in which case precise reference
  902. * counting is necessary.
  903. */
  904. if (old_view) {
  905. flatview_unref(old_view);
  906. }
  907. }
  908. static void address_space_update_topology(AddressSpace *as)
  909. {
  910. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  911. flatviews_init();
  912. if (!g_hash_table_lookup(flat_views, physmr)) {
  913. generate_memory_topology(physmr);
  914. }
  915. address_space_set_flatview(as);
  916. }
  917. void memory_region_transaction_begin(void)
  918. {
  919. qemu_flush_coalesced_mmio_buffer();
  920. ++memory_region_transaction_depth;
  921. }
  922. void memory_region_transaction_commit(void)
  923. {
  924. AddressSpace *as;
  925. assert(memory_region_transaction_depth);
  926. assert(qemu_mutex_iothread_locked());
  927. --memory_region_transaction_depth;
  928. if (!memory_region_transaction_depth) {
  929. if (memory_region_update_pending) {
  930. flatviews_reset();
  931. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  932. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  933. address_space_set_flatview(as);
  934. address_space_update_ioeventfds(as);
  935. }
  936. memory_region_update_pending = false;
  937. ioeventfd_update_pending = false;
  938. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  939. } else if (ioeventfd_update_pending) {
  940. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  941. address_space_update_ioeventfds(as);
  942. }
  943. ioeventfd_update_pending = false;
  944. }
  945. }
  946. }
  947. static void memory_region_destructor_none(MemoryRegion *mr)
  948. {
  949. }
  950. static void memory_region_destructor_ram(MemoryRegion *mr)
  951. {
  952. qemu_ram_free(mr->ram_block);
  953. }
  954. static bool memory_region_need_escape(char c)
  955. {
  956. return c == '/' || c == '[' || c == '\\' || c == ']';
  957. }
  958. static char *memory_region_escape_name(const char *name)
  959. {
  960. const char *p;
  961. char *escaped, *q;
  962. uint8_t c;
  963. size_t bytes = 0;
  964. for (p = name; *p; p++) {
  965. bytes += memory_region_need_escape(*p) ? 4 : 1;
  966. }
  967. if (bytes == p - name) {
  968. return g_memdup(name, bytes + 1);
  969. }
  970. escaped = g_malloc(bytes + 1);
  971. for (p = name, q = escaped; *p; p++) {
  972. c = *p;
  973. if (unlikely(memory_region_need_escape(c))) {
  974. *q++ = '\\';
  975. *q++ = 'x';
  976. *q++ = "0123456789abcdef"[c >> 4];
  977. c = "0123456789abcdef"[c & 15];
  978. }
  979. *q++ = c;
  980. }
  981. *q = 0;
  982. return escaped;
  983. }
  984. static void memory_region_do_init(MemoryRegion *mr,
  985. Object *owner,
  986. const char *name,
  987. uint64_t size)
  988. {
  989. mr->size = int128_make64(size);
  990. if (size == UINT64_MAX) {
  991. mr->size = int128_2_64();
  992. }
  993. mr->name = g_strdup(name);
  994. mr->owner = owner;
  995. mr->ram_block = NULL;
  996. if (name) {
  997. char *escaped_name = memory_region_escape_name(name);
  998. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  999. if (!owner) {
  1000. owner = container_get(qdev_get_machine(), "/unattached");
  1001. }
  1002. object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
  1003. object_unref(OBJECT(mr));
  1004. g_free(name_array);
  1005. g_free(escaped_name);
  1006. }
  1007. }
  1008. void memory_region_init(MemoryRegion *mr,
  1009. Object *owner,
  1010. const char *name,
  1011. uint64_t size)
  1012. {
  1013. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  1014. memory_region_do_init(mr, owner, name, size);
  1015. }
  1016. static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
  1017. void *opaque, Error **errp)
  1018. {
  1019. MemoryRegion *mr = MEMORY_REGION(obj);
  1020. uint64_t value = mr->addr;
  1021. visit_type_uint64(v, name, &value, errp);
  1022. }
  1023. static void memory_region_get_container(Object *obj, Visitor *v,
  1024. const char *name, void *opaque,
  1025. Error **errp)
  1026. {
  1027. MemoryRegion *mr = MEMORY_REGION(obj);
  1028. gchar *path = (gchar *)"";
  1029. if (mr->container) {
  1030. path = object_get_canonical_path(OBJECT(mr->container));
  1031. }
  1032. visit_type_str(v, name, &path, errp);
  1033. if (mr->container) {
  1034. g_free(path);
  1035. }
  1036. }
  1037. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  1038. const char *part)
  1039. {
  1040. MemoryRegion *mr = MEMORY_REGION(obj);
  1041. return OBJECT(mr->container);
  1042. }
  1043. static void memory_region_get_priority(Object *obj, Visitor *v,
  1044. const char *name, void *opaque,
  1045. Error **errp)
  1046. {
  1047. MemoryRegion *mr = MEMORY_REGION(obj);
  1048. int32_t value = mr->priority;
  1049. visit_type_int32(v, name, &value, errp);
  1050. }
  1051. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  1052. void *opaque, Error **errp)
  1053. {
  1054. MemoryRegion *mr = MEMORY_REGION(obj);
  1055. uint64_t value = memory_region_size(mr);
  1056. visit_type_uint64(v, name, &value, errp);
  1057. }
  1058. static void memory_region_initfn(Object *obj)
  1059. {
  1060. MemoryRegion *mr = MEMORY_REGION(obj);
  1061. ObjectProperty *op;
  1062. mr->ops = &unassigned_mem_ops;
  1063. mr->enabled = true;
  1064. mr->romd_mode = true;
  1065. mr->global_locking = true;
  1066. mr->destructor = memory_region_destructor_none;
  1067. QTAILQ_INIT(&mr->subregions);
  1068. QTAILQ_INIT(&mr->coalesced);
  1069. op = object_property_add(OBJECT(mr), "container",
  1070. "link<" TYPE_MEMORY_REGION ">",
  1071. memory_region_get_container,
  1072. NULL, /* memory_region_set_container */
  1073. NULL, NULL, &error_abort);
  1074. op->resolve = memory_region_resolve_container;
  1075. object_property_add(OBJECT(mr), "addr", "uint64",
  1076. memory_region_get_addr,
  1077. NULL, /* memory_region_set_addr */
  1078. NULL, NULL, &error_abort);
  1079. object_property_add(OBJECT(mr), "priority", "uint32",
  1080. memory_region_get_priority,
  1081. NULL, /* memory_region_set_priority */
  1082. NULL, NULL, &error_abort);
  1083. object_property_add(OBJECT(mr), "size", "uint64",
  1084. memory_region_get_size,
  1085. NULL, /* memory_region_set_size, */
  1086. NULL, NULL, &error_abort);
  1087. }
  1088. static void iommu_memory_region_initfn(Object *obj)
  1089. {
  1090. MemoryRegion *mr = MEMORY_REGION(obj);
  1091. mr->is_iommu = true;
  1092. }
  1093. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  1094. unsigned size)
  1095. {
  1096. #ifdef DEBUG_UNASSIGNED
  1097. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  1098. #endif
  1099. if (current_cpu != NULL) {
  1100. cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
  1101. }
  1102. return 0;
  1103. }
  1104. static void unassigned_mem_write(void *opaque, hwaddr addr,
  1105. uint64_t val, unsigned size)
  1106. {
  1107. #ifdef DEBUG_UNASSIGNED
  1108. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  1109. #endif
  1110. if (current_cpu != NULL) {
  1111. cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
  1112. }
  1113. }
  1114. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  1115. unsigned size, bool is_write)
  1116. {
  1117. return false;
  1118. }
  1119. const MemoryRegionOps unassigned_mem_ops = {
  1120. .valid.accepts = unassigned_mem_accepts,
  1121. .endianness = DEVICE_NATIVE_ENDIAN,
  1122. };
  1123. static uint64_t memory_region_ram_device_read(void *opaque,
  1124. hwaddr addr, unsigned size)
  1125. {
  1126. MemoryRegion *mr = opaque;
  1127. uint64_t data = (uint64_t)~0;
  1128. switch (size) {
  1129. case 1:
  1130. data = *(uint8_t *)(mr->ram_block->host + addr);
  1131. break;
  1132. case 2:
  1133. data = *(uint16_t *)(mr->ram_block->host + addr);
  1134. break;
  1135. case 4:
  1136. data = *(uint32_t *)(mr->ram_block->host + addr);
  1137. break;
  1138. case 8:
  1139. data = *(uint64_t *)(mr->ram_block->host + addr);
  1140. break;
  1141. }
  1142. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1143. return data;
  1144. }
  1145. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1146. uint64_t data, unsigned size)
  1147. {
  1148. MemoryRegion *mr = opaque;
  1149. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1150. switch (size) {
  1151. case 1:
  1152. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1153. break;
  1154. case 2:
  1155. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1156. break;
  1157. case 4:
  1158. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1159. break;
  1160. case 8:
  1161. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1162. break;
  1163. }
  1164. }
  1165. static const MemoryRegionOps ram_device_mem_ops = {
  1166. .read = memory_region_ram_device_read,
  1167. .write = memory_region_ram_device_write,
  1168. .endianness = DEVICE_HOST_ENDIAN,
  1169. .valid = {
  1170. .min_access_size = 1,
  1171. .max_access_size = 8,
  1172. .unaligned = true,
  1173. },
  1174. .impl = {
  1175. .min_access_size = 1,
  1176. .max_access_size = 8,
  1177. .unaligned = true,
  1178. },
  1179. };
  1180. bool memory_region_access_valid(MemoryRegion *mr,
  1181. hwaddr addr,
  1182. unsigned size,
  1183. bool is_write)
  1184. {
  1185. int access_size_min, access_size_max;
  1186. int access_size, i;
  1187. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1188. return false;
  1189. }
  1190. if (!mr->ops->valid.accepts) {
  1191. return true;
  1192. }
  1193. access_size_min = mr->ops->valid.min_access_size;
  1194. if (!mr->ops->valid.min_access_size) {
  1195. access_size_min = 1;
  1196. }
  1197. access_size_max = mr->ops->valid.max_access_size;
  1198. if (!mr->ops->valid.max_access_size) {
  1199. access_size_max = 4;
  1200. }
  1201. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1202. for (i = 0; i < size; i += access_size) {
  1203. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1204. is_write)) {
  1205. return false;
  1206. }
  1207. }
  1208. return true;
  1209. }
  1210. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1211. hwaddr addr,
  1212. uint64_t *pval,
  1213. unsigned size,
  1214. MemTxAttrs attrs)
  1215. {
  1216. *pval = 0;
  1217. if (mr->ops->read) {
  1218. return access_with_adjusted_size(addr, pval, size,
  1219. mr->ops->impl.min_access_size,
  1220. mr->ops->impl.max_access_size,
  1221. memory_region_read_accessor,
  1222. mr, attrs);
  1223. } else if (mr->ops->read_with_attrs) {
  1224. return access_with_adjusted_size(addr, pval, size,
  1225. mr->ops->impl.min_access_size,
  1226. mr->ops->impl.max_access_size,
  1227. memory_region_read_with_attrs_accessor,
  1228. mr, attrs);
  1229. } else {
  1230. return access_with_adjusted_size(addr, pval, size, 1, 4,
  1231. memory_region_oldmmio_read_accessor,
  1232. mr, attrs);
  1233. }
  1234. }
  1235. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1236. hwaddr addr,
  1237. uint64_t *pval,
  1238. unsigned size,
  1239. MemTxAttrs attrs)
  1240. {
  1241. MemTxResult r;
  1242. if (!memory_region_access_valid(mr, addr, size, false)) {
  1243. *pval = unassigned_mem_read(mr, addr, size);
  1244. return MEMTX_DECODE_ERROR;
  1245. }
  1246. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1247. adjust_endianness(mr, pval, size);
  1248. return r;
  1249. }
  1250. /* Return true if an eventfd was signalled */
  1251. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1252. hwaddr addr,
  1253. uint64_t data,
  1254. unsigned size,
  1255. MemTxAttrs attrs)
  1256. {
  1257. MemoryRegionIoeventfd ioeventfd = {
  1258. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1259. .data = data,
  1260. };
  1261. unsigned i;
  1262. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1263. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1264. ioeventfd.e = mr->ioeventfds[i].e;
  1265. if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
  1266. event_notifier_set(ioeventfd.e);
  1267. return true;
  1268. }
  1269. }
  1270. return false;
  1271. }
  1272. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1273. hwaddr addr,
  1274. uint64_t data,
  1275. unsigned size,
  1276. MemTxAttrs attrs)
  1277. {
  1278. if (!memory_region_access_valid(mr, addr, size, true)) {
  1279. unassigned_mem_write(mr, addr, data, size);
  1280. return MEMTX_DECODE_ERROR;
  1281. }
  1282. adjust_endianness(mr, &data, size);
  1283. if ((!kvm_eventfds_enabled()) &&
  1284. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1285. return MEMTX_OK;
  1286. }
  1287. if (mr->ops->write) {
  1288. return access_with_adjusted_size(addr, &data, size,
  1289. mr->ops->impl.min_access_size,
  1290. mr->ops->impl.max_access_size,
  1291. memory_region_write_accessor, mr,
  1292. attrs);
  1293. } else if (mr->ops->write_with_attrs) {
  1294. return
  1295. access_with_adjusted_size(addr, &data, size,
  1296. mr->ops->impl.min_access_size,
  1297. mr->ops->impl.max_access_size,
  1298. memory_region_write_with_attrs_accessor,
  1299. mr, attrs);
  1300. } else {
  1301. return access_with_adjusted_size(addr, &data, size, 1, 4,
  1302. memory_region_oldmmio_write_accessor,
  1303. mr, attrs);
  1304. }
  1305. }
  1306. void memory_region_init_io(MemoryRegion *mr,
  1307. Object *owner,
  1308. const MemoryRegionOps *ops,
  1309. void *opaque,
  1310. const char *name,
  1311. uint64_t size)
  1312. {
  1313. memory_region_init(mr, owner, name, size);
  1314. mr->ops = ops ? ops : &unassigned_mem_ops;
  1315. mr->opaque = opaque;
  1316. mr->terminates = true;
  1317. }
  1318. void memory_region_init_ram_nomigrate(MemoryRegion *mr,
  1319. Object *owner,
  1320. const char *name,
  1321. uint64_t size,
  1322. Error **errp)
  1323. {
  1324. memory_region_init(mr, owner, name, size);
  1325. mr->ram = true;
  1326. mr->terminates = true;
  1327. mr->destructor = memory_region_destructor_ram;
  1328. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1329. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1330. }
  1331. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1332. Object *owner,
  1333. const char *name,
  1334. uint64_t size,
  1335. uint64_t max_size,
  1336. void (*resized)(const char*,
  1337. uint64_t length,
  1338. void *host),
  1339. Error **errp)
  1340. {
  1341. memory_region_init(mr, owner, name, size);
  1342. mr->ram = true;
  1343. mr->terminates = true;
  1344. mr->destructor = memory_region_destructor_ram;
  1345. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1346. mr, errp);
  1347. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1348. }
  1349. #ifdef __linux__
  1350. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1351. struct Object *owner,
  1352. const char *name,
  1353. uint64_t size,
  1354. bool share,
  1355. const char *path,
  1356. Error **errp)
  1357. {
  1358. memory_region_init(mr, owner, name, size);
  1359. mr->ram = true;
  1360. mr->terminates = true;
  1361. mr->destructor = memory_region_destructor_ram;
  1362. mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
  1363. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1364. }
  1365. void memory_region_init_ram_from_fd(MemoryRegion *mr,
  1366. struct Object *owner,
  1367. const char *name,
  1368. uint64_t size,
  1369. bool share,
  1370. int fd,
  1371. Error **errp)
  1372. {
  1373. memory_region_init(mr, owner, name, size);
  1374. mr->ram = true;
  1375. mr->terminates = true;
  1376. mr->destructor = memory_region_destructor_ram;
  1377. mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
  1378. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1379. }
  1380. #endif
  1381. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1382. Object *owner,
  1383. const char *name,
  1384. uint64_t size,
  1385. void *ptr)
  1386. {
  1387. memory_region_init(mr, owner, name, size);
  1388. mr->ram = true;
  1389. mr->terminates = true;
  1390. mr->destructor = memory_region_destructor_ram;
  1391. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1392. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1393. assert(ptr != NULL);
  1394. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1395. }
  1396. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1397. Object *owner,
  1398. const char *name,
  1399. uint64_t size,
  1400. void *ptr)
  1401. {
  1402. memory_region_init_ram_ptr(mr, owner, name, size, ptr);
  1403. mr->ram_device = true;
  1404. mr->ops = &ram_device_mem_ops;
  1405. mr->opaque = mr;
  1406. }
  1407. void memory_region_init_alias(MemoryRegion *mr,
  1408. Object *owner,
  1409. const char *name,
  1410. MemoryRegion *orig,
  1411. hwaddr offset,
  1412. uint64_t size)
  1413. {
  1414. memory_region_init(mr, owner, name, size);
  1415. mr->alias = orig;
  1416. mr->alias_offset = offset;
  1417. }
  1418. void memory_region_init_rom_nomigrate(MemoryRegion *mr,
  1419. struct Object *owner,
  1420. const char *name,
  1421. uint64_t size,
  1422. Error **errp)
  1423. {
  1424. memory_region_init(mr, owner, name, size);
  1425. mr->ram = true;
  1426. mr->readonly = true;
  1427. mr->terminates = true;
  1428. mr->destructor = memory_region_destructor_ram;
  1429. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1430. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1431. }
  1432. void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
  1433. Object *owner,
  1434. const MemoryRegionOps *ops,
  1435. void *opaque,
  1436. const char *name,
  1437. uint64_t size,
  1438. Error **errp)
  1439. {
  1440. assert(ops);
  1441. memory_region_init(mr, owner, name, size);
  1442. mr->ops = ops;
  1443. mr->opaque = opaque;
  1444. mr->terminates = true;
  1445. mr->rom_device = true;
  1446. mr->destructor = memory_region_destructor_ram;
  1447. mr->ram_block = qemu_ram_alloc(size, mr, errp);
  1448. }
  1449. void memory_region_init_iommu(void *_iommu_mr,
  1450. size_t instance_size,
  1451. const char *mrtypename,
  1452. Object *owner,
  1453. const char *name,
  1454. uint64_t size)
  1455. {
  1456. struct IOMMUMemoryRegion *iommu_mr;
  1457. struct MemoryRegion *mr;
  1458. object_initialize(_iommu_mr, instance_size, mrtypename);
  1459. mr = MEMORY_REGION(_iommu_mr);
  1460. memory_region_do_init(mr, owner, name, size);
  1461. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1462. mr->terminates = true; /* then re-forwards */
  1463. QLIST_INIT(&iommu_mr->iommu_notify);
  1464. iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1465. }
  1466. static void memory_region_finalize(Object *obj)
  1467. {
  1468. MemoryRegion *mr = MEMORY_REGION(obj);
  1469. assert(!mr->container);
  1470. /* We know the region is not visible in any address space (it
  1471. * does not have a container and cannot be a root either because
  1472. * it has no references, so we can blindly clear mr->enabled.
  1473. * memory_region_set_enabled instead could trigger a transaction
  1474. * and cause an infinite loop.
  1475. */
  1476. mr->enabled = false;
  1477. memory_region_transaction_begin();
  1478. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1479. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1480. memory_region_del_subregion(mr, subregion);
  1481. }
  1482. memory_region_transaction_commit();
  1483. mr->destructor(mr);
  1484. memory_region_clear_coalescing(mr);
  1485. g_free((char *)mr->name);
  1486. g_free(mr->ioeventfds);
  1487. }
  1488. Object *memory_region_owner(MemoryRegion *mr)
  1489. {
  1490. Object *obj = OBJECT(mr);
  1491. return obj->parent;
  1492. }
  1493. void memory_region_ref(MemoryRegion *mr)
  1494. {
  1495. /* MMIO callbacks most likely will access data that belongs
  1496. * to the owner, hence the need to ref/unref the owner whenever
  1497. * the memory region is in use.
  1498. *
  1499. * The memory region is a child of its owner. As long as the
  1500. * owner doesn't call unparent itself on the memory region,
  1501. * ref-ing the owner will also keep the memory region alive.
  1502. * Memory regions without an owner are supposed to never go away;
  1503. * we do not ref/unref them because it slows down DMA sensibly.
  1504. */
  1505. if (mr && mr->owner) {
  1506. object_ref(mr->owner);
  1507. }
  1508. }
  1509. void memory_region_unref(MemoryRegion *mr)
  1510. {
  1511. if (mr && mr->owner) {
  1512. object_unref(mr->owner);
  1513. }
  1514. }
  1515. uint64_t memory_region_size(MemoryRegion *mr)
  1516. {
  1517. if (int128_eq(mr->size, int128_2_64())) {
  1518. return UINT64_MAX;
  1519. }
  1520. return int128_get64(mr->size);
  1521. }
  1522. const char *memory_region_name(const MemoryRegion *mr)
  1523. {
  1524. if (!mr->name) {
  1525. ((MemoryRegion *)mr)->name =
  1526. object_get_canonical_path_component(OBJECT(mr));
  1527. }
  1528. return mr->name;
  1529. }
  1530. bool memory_region_is_ram_device(MemoryRegion *mr)
  1531. {
  1532. return mr->ram_device;
  1533. }
  1534. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1535. {
  1536. uint8_t mask = mr->dirty_log_mask;
  1537. if (global_dirty_log && mr->ram_block) {
  1538. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1539. }
  1540. return mask;
  1541. }
  1542. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1543. {
  1544. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1545. }
  1546. static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
  1547. {
  1548. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1549. IOMMUNotifier *iommu_notifier;
  1550. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1551. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1552. flags |= iommu_notifier->notifier_flags;
  1553. }
  1554. if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
  1555. imrc->notify_flag_changed(iommu_mr,
  1556. iommu_mr->iommu_notify_flags,
  1557. flags);
  1558. }
  1559. iommu_mr->iommu_notify_flags = flags;
  1560. }
  1561. void memory_region_register_iommu_notifier(MemoryRegion *mr,
  1562. IOMMUNotifier *n)
  1563. {
  1564. IOMMUMemoryRegion *iommu_mr;
  1565. if (mr->alias) {
  1566. memory_region_register_iommu_notifier(mr->alias, n);
  1567. return;
  1568. }
  1569. /* We need to register for at least one bitfield */
  1570. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1571. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1572. assert(n->start <= n->end);
  1573. QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
  1574. memory_region_update_iommu_notify_flags(iommu_mr);
  1575. }
  1576. uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
  1577. {
  1578. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1579. if (imrc->get_min_page_size) {
  1580. return imrc->get_min_page_size(iommu_mr);
  1581. }
  1582. return TARGET_PAGE_SIZE;
  1583. }
  1584. void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
  1585. {
  1586. MemoryRegion *mr = MEMORY_REGION(iommu_mr);
  1587. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1588. hwaddr addr, granularity;
  1589. IOMMUTLBEntry iotlb;
  1590. /* If the IOMMU has its own replay callback, override */
  1591. if (imrc->replay) {
  1592. imrc->replay(iommu_mr, n);
  1593. return;
  1594. }
  1595. granularity = memory_region_iommu_get_min_page_size(iommu_mr);
  1596. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1597. iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
  1598. if (iotlb.perm != IOMMU_NONE) {
  1599. n->notify(n, &iotlb);
  1600. }
  1601. /* if (2^64 - MR size) < granularity, it's possible to get an
  1602. * infinite loop here. This should catch such a wraparound */
  1603. if ((addr + granularity) < addr) {
  1604. break;
  1605. }
  1606. }
  1607. }
  1608. void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
  1609. {
  1610. IOMMUNotifier *notifier;
  1611. IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
  1612. memory_region_iommu_replay(iommu_mr, notifier);
  1613. }
  1614. }
  1615. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1616. IOMMUNotifier *n)
  1617. {
  1618. IOMMUMemoryRegion *iommu_mr;
  1619. if (mr->alias) {
  1620. memory_region_unregister_iommu_notifier(mr->alias, n);
  1621. return;
  1622. }
  1623. QLIST_REMOVE(n, node);
  1624. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1625. memory_region_update_iommu_notify_flags(iommu_mr);
  1626. }
  1627. void memory_region_notify_one(IOMMUNotifier *notifier,
  1628. IOMMUTLBEntry *entry)
  1629. {
  1630. IOMMUNotifierFlag request_flags;
  1631. /*
  1632. * Skip the notification if the notification does not overlap
  1633. * with registered range.
  1634. */
  1635. if (notifier->start > entry->iova + entry->addr_mask ||
  1636. notifier->end < entry->iova) {
  1637. return;
  1638. }
  1639. if (entry->perm & IOMMU_RW) {
  1640. request_flags = IOMMU_NOTIFIER_MAP;
  1641. } else {
  1642. request_flags = IOMMU_NOTIFIER_UNMAP;
  1643. }
  1644. if (notifier->notifier_flags & request_flags) {
  1645. notifier->notify(notifier, entry);
  1646. }
  1647. }
  1648. void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
  1649. IOMMUTLBEntry entry)
  1650. {
  1651. IOMMUNotifier *iommu_notifier;
  1652. assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
  1653. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1654. memory_region_notify_one(iommu_notifier, &entry);
  1655. }
  1656. }
  1657. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1658. {
  1659. uint8_t mask = 1 << client;
  1660. uint8_t old_logging;
  1661. assert(client == DIRTY_MEMORY_VGA);
  1662. old_logging = mr->vga_logging_count;
  1663. mr->vga_logging_count += log ? 1 : -1;
  1664. if (!!old_logging == !!mr->vga_logging_count) {
  1665. return;
  1666. }
  1667. memory_region_transaction_begin();
  1668. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1669. memory_region_update_pending |= mr->enabled;
  1670. memory_region_transaction_commit();
  1671. }
  1672. bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
  1673. hwaddr size, unsigned client)
  1674. {
  1675. assert(mr->ram_block);
  1676. return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
  1677. size, client);
  1678. }
  1679. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1680. hwaddr size)
  1681. {
  1682. assert(mr->ram_block);
  1683. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1684. size,
  1685. memory_region_get_dirty_log_mask(mr));
  1686. }
  1687. bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
  1688. hwaddr size, unsigned client)
  1689. {
  1690. assert(mr->ram_block);
  1691. return cpu_physical_memory_test_and_clear_dirty(
  1692. memory_region_get_ram_addr(mr) + addr, size, client);
  1693. }
  1694. DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
  1695. hwaddr addr,
  1696. hwaddr size,
  1697. unsigned client)
  1698. {
  1699. assert(mr->ram_block);
  1700. return cpu_physical_memory_snapshot_and_clear_dirty(
  1701. memory_region_get_ram_addr(mr) + addr, size, client);
  1702. }
  1703. bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
  1704. hwaddr addr, hwaddr size)
  1705. {
  1706. assert(mr->ram_block);
  1707. return cpu_physical_memory_snapshot_get_dirty(snap,
  1708. memory_region_get_ram_addr(mr) + addr, size);
  1709. }
  1710. void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1711. {
  1712. MemoryListener *listener;
  1713. AddressSpace *as;
  1714. FlatView *view;
  1715. FlatRange *fr;
  1716. /* If the same address space has multiple log_sync listeners, we
  1717. * visit that address space's FlatView multiple times. But because
  1718. * log_sync listeners are rare, it's still cheaper than walking each
  1719. * address space once.
  1720. */
  1721. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1722. if (!listener->log_sync) {
  1723. continue;
  1724. }
  1725. as = listener->address_space;
  1726. view = address_space_get_flatview(as);
  1727. FOR_EACH_FLAT_RANGE(fr, view) {
  1728. if (fr->mr == mr) {
  1729. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  1730. listener->log_sync(listener, &mrs);
  1731. }
  1732. }
  1733. flatview_unref(view);
  1734. }
  1735. }
  1736. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1737. {
  1738. if (mr->readonly != readonly) {
  1739. memory_region_transaction_begin();
  1740. mr->readonly = readonly;
  1741. memory_region_update_pending |= mr->enabled;
  1742. memory_region_transaction_commit();
  1743. }
  1744. }
  1745. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1746. {
  1747. if (mr->romd_mode != romd_mode) {
  1748. memory_region_transaction_begin();
  1749. mr->romd_mode = romd_mode;
  1750. memory_region_update_pending |= mr->enabled;
  1751. memory_region_transaction_commit();
  1752. }
  1753. }
  1754. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1755. hwaddr size, unsigned client)
  1756. {
  1757. assert(mr->ram_block);
  1758. cpu_physical_memory_test_and_clear_dirty(
  1759. memory_region_get_ram_addr(mr) + addr, size, client);
  1760. }
  1761. int memory_region_get_fd(MemoryRegion *mr)
  1762. {
  1763. int fd;
  1764. rcu_read_lock();
  1765. while (mr->alias) {
  1766. mr = mr->alias;
  1767. }
  1768. fd = mr->ram_block->fd;
  1769. rcu_read_unlock();
  1770. return fd;
  1771. }
  1772. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1773. {
  1774. void *ptr;
  1775. uint64_t offset = 0;
  1776. rcu_read_lock();
  1777. while (mr->alias) {
  1778. offset += mr->alias_offset;
  1779. mr = mr->alias;
  1780. }
  1781. assert(mr->ram_block);
  1782. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1783. rcu_read_unlock();
  1784. return ptr;
  1785. }
  1786. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1787. {
  1788. RAMBlock *block;
  1789. block = qemu_ram_block_from_host(ptr, false, offset);
  1790. if (!block) {
  1791. return NULL;
  1792. }
  1793. return block->mr;
  1794. }
  1795. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1796. {
  1797. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1798. }
  1799. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1800. {
  1801. assert(mr->ram_block);
  1802. qemu_ram_resize(mr->ram_block, newsize, errp);
  1803. }
  1804. static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
  1805. {
  1806. FlatView *view;
  1807. FlatRange *fr;
  1808. CoalescedMemoryRange *cmr;
  1809. AddrRange tmp;
  1810. MemoryRegionSection section;
  1811. view = address_space_get_flatview(as);
  1812. FOR_EACH_FLAT_RANGE(fr, view) {
  1813. if (fr->mr == mr) {
  1814. section = (MemoryRegionSection) {
  1815. .fv = view,
  1816. .offset_within_address_space = int128_get64(fr->addr.start),
  1817. .size = fr->addr.size,
  1818. };
  1819. MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
  1820. int128_get64(fr->addr.start),
  1821. int128_get64(fr->addr.size));
  1822. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  1823. tmp = addrrange_shift(cmr->addr,
  1824. int128_sub(fr->addr.start,
  1825. int128_make64(fr->offset_in_region)));
  1826. if (!addrrange_intersects(tmp, fr->addr)) {
  1827. continue;
  1828. }
  1829. tmp = addrrange_intersection(tmp, fr->addr);
  1830. MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
  1831. int128_get64(tmp.start),
  1832. int128_get64(tmp.size));
  1833. }
  1834. }
  1835. }
  1836. flatview_unref(view);
  1837. }
  1838. static void memory_region_update_coalesced_range(MemoryRegion *mr)
  1839. {
  1840. AddressSpace *as;
  1841. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1842. memory_region_update_coalesced_range_as(mr, as);
  1843. }
  1844. }
  1845. void memory_region_set_coalescing(MemoryRegion *mr)
  1846. {
  1847. memory_region_clear_coalescing(mr);
  1848. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1849. }
  1850. void memory_region_add_coalescing(MemoryRegion *mr,
  1851. hwaddr offset,
  1852. uint64_t size)
  1853. {
  1854. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1855. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1856. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1857. memory_region_update_coalesced_range(mr);
  1858. memory_region_set_flush_coalesced(mr);
  1859. }
  1860. void memory_region_clear_coalescing(MemoryRegion *mr)
  1861. {
  1862. CoalescedMemoryRange *cmr;
  1863. bool updated = false;
  1864. qemu_flush_coalesced_mmio_buffer();
  1865. mr->flush_coalesced_mmio = false;
  1866. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1867. cmr = QTAILQ_FIRST(&mr->coalesced);
  1868. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1869. g_free(cmr);
  1870. updated = true;
  1871. }
  1872. if (updated) {
  1873. memory_region_update_coalesced_range(mr);
  1874. }
  1875. }
  1876. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1877. {
  1878. mr->flush_coalesced_mmio = true;
  1879. }
  1880. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  1881. {
  1882. qemu_flush_coalesced_mmio_buffer();
  1883. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1884. mr->flush_coalesced_mmio = false;
  1885. }
  1886. }
  1887. void memory_region_set_global_locking(MemoryRegion *mr)
  1888. {
  1889. mr->global_locking = true;
  1890. }
  1891. void memory_region_clear_global_locking(MemoryRegion *mr)
  1892. {
  1893. mr->global_locking = false;
  1894. }
  1895. static bool userspace_eventfd_warning;
  1896. void memory_region_add_eventfd(MemoryRegion *mr,
  1897. hwaddr addr,
  1898. unsigned size,
  1899. bool match_data,
  1900. uint64_t data,
  1901. EventNotifier *e)
  1902. {
  1903. MemoryRegionIoeventfd mrfd = {
  1904. .addr.start = int128_make64(addr),
  1905. .addr.size = int128_make64(size),
  1906. .match_data = match_data,
  1907. .data = data,
  1908. .e = e,
  1909. };
  1910. unsigned i;
  1911. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  1912. userspace_eventfd_warning))) {
  1913. userspace_eventfd_warning = true;
  1914. error_report("Using eventfd without MMIO binding in KVM. "
  1915. "Suboptimal performance expected");
  1916. }
  1917. if (size) {
  1918. adjust_endianness(mr, &mrfd.data, size);
  1919. }
  1920. memory_region_transaction_begin();
  1921. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1922. if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
  1923. break;
  1924. }
  1925. }
  1926. ++mr->ioeventfd_nb;
  1927. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1928. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  1929. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  1930. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  1931. mr->ioeventfds[i] = mrfd;
  1932. ioeventfd_update_pending |= mr->enabled;
  1933. memory_region_transaction_commit();
  1934. }
  1935. void memory_region_del_eventfd(MemoryRegion *mr,
  1936. hwaddr addr,
  1937. unsigned size,
  1938. bool match_data,
  1939. uint64_t data,
  1940. EventNotifier *e)
  1941. {
  1942. MemoryRegionIoeventfd mrfd = {
  1943. .addr.start = int128_make64(addr),
  1944. .addr.size = int128_make64(size),
  1945. .match_data = match_data,
  1946. .data = data,
  1947. .e = e,
  1948. };
  1949. unsigned i;
  1950. if (size) {
  1951. adjust_endianness(mr, &mrfd.data, size);
  1952. }
  1953. memory_region_transaction_begin();
  1954. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1955. if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
  1956. break;
  1957. }
  1958. }
  1959. assert(i != mr->ioeventfd_nb);
  1960. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  1961. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  1962. --mr->ioeventfd_nb;
  1963. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1964. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  1965. ioeventfd_update_pending |= mr->enabled;
  1966. memory_region_transaction_commit();
  1967. }
  1968. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  1969. {
  1970. MemoryRegion *mr = subregion->container;
  1971. MemoryRegion *other;
  1972. memory_region_transaction_begin();
  1973. memory_region_ref(subregion);
  1974. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  1975. if (subregion->priority >= other->priority) {
  1976. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  1977. goto done;
  1978. }
  1979. }
  1980. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  1981. done:
  1982. memory_region_update_pending |= mr->enabled && subregion->enabled;
  1983. memory_region_transaction_commit();
  1984. }
  1985. static void memory_region_add_subregion_common(MemoryRegion *mr,
  1986. hwaddr offset,
  1987. MemoryRegion *subregion)
  1988. {
  1989. assert(!subregion->container);
  1990. subregion->container = mr;
  1991. subregion->addr = offset;
  1992. memory_region_update_container_subregions(subregion);
  1993. }
  1994. void memory_region_add_subregion(MemoryRegion *mr,
  1995. hwaddr offset,
  1996. MemoryRegion *subregion)
  1997. {
  1998. subregion->priority = 0;
  1999. memory_region_add_subregion_common(mr, offset, subregion);
  2000. }
  2001. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  2002. hwaddr offset,
  2003. MemoryRegion *subregion,
  2004. int priority)
  2005. {
  2006. subregion->priority = priority;
  2007. memory_region_add_subregion_common(mr, offset, subregion);
  2008. }
  2009. void memory_region_del_subregion(MemoryRegion *mr,
  2010. MemoryRegion *subregion)
  2011. {
  2012. memory_region_transaction_begin();
  2013. assert(subregion->container == mr);
  2014. subregion->container = NULL;
  2015. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  2016. memory_region_unref(subregion);
  2017. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2018. memory_region_transaction_commit();
  2019. }
  2020. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  2021. {
  2022. if (enabled == mr->enabled) {
  2023. return;
  2024. }
  2025. memory_region_transaction_begin();
  2026. mr->enabled = enabled;
  2027. memory_region_update_pending = true;
  2028. memory_region_transaction_commit();
  2029. }
  2030. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  2031. {
  2032. Int128 s = int128_make64(size);
  2033. if (size == UINT64_MAX) {
  2034. s = int128_2_64();
  2035. }
  2036. if (int128_eq(s, mr->size)) {
  2037. return;
  2038. }
  2039. memory_region_transaction_begin();
  2040. mr->size = s;
  2041. memory_region_update_pending = true;
  2042. memory_region_transaction_commit();
  2043. }
  2044. static void memory_region_readd_subregion(MemoryRegion *mr)
  2045. {
  2046. MemoryRegion *container = mr->container;
  2047. if (container) {
  2048. memory_region_transaction_begin();
  2049. memory_region_ref(mr);
  2050. memory_region_del_subregion(container, mr);
  2051. mr->container = container;
  2052. memory_region_update_container_subregions(mr);
  2053. memory_region_unref(mr);
  2054. memory_region_transaction_commit();
  2055. }
  2056. }
  2057. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  2058. {
  2059. if (addr != mr->addr) {
  2060. mr->addr = addr;
  2061. memory_region_readd_subregion(mr);
  2062. }
  2063. }
  2064. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  2065. {
  2066. assert(mr->alias);
  2067. if (offset == mr->alias_offset) {
  2068. return;
  2069. }
  2070. memory_region_transaction_begin();
  2071. mr->alias_offset = offset;
  2072. memory_region_update_pending |= mr->enabled;
  2073. memory_region_transaction_commit();
  2074. }
  2075. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  2076. {
  2077. return mr->align;
  2078. }
  2079. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  2080. {
  2081. const AddrRange *addr = addr_;
  2082. const FlatRange *fr = fr_;
  2083. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  2084. return -1;
  2085. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  2086. return 1;
  2087. }
  2088. return 0;
  2089. }
  2090. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  2091. {
  2092. return bsearch(&addr, view->ranges, view->nr,
  2093. sizeof(FlatRange), cmp_flatrange_addr);
  2094. }
  2095. bool memory_region_is_mapped(MemoryRegion *mr)
  2096. {
  2097. return mr->container ? true : false;
  2098. }
  2099. /* Same as memory_region_find, but it does not add a reference to the
  2100. * returned region. It must be called from an RCU critical section.
  2101. */
  2102. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  2103. hwaddr addr, uint64_t size)
  2104. {
  2105. MemoryRegionSection ret = { .mr = NULL };
  2106. MemoryRegion *root;
  2107. AddressSpace *as;
  2108. AddrRange range;
  2109. FlatView *view;
  2110. FlatRange *fr;
  2111. addr += mr->addr;
  2112. for (root = mr; root->container; ) {
  2113. root = root->container;
  2114. addr += root->addr;
  2115. }
  2116. as = memory_region_to_address_space(root);
  2117. if (!as) {
  2118. return ret;
  2119. }
  2120. range = addrrange_make(int128_make64(addr), int128_make64(size));
  2121. view = address_space_to_flatview(as);
  2122. fr = flatview_lookup(view, range);
  2123. if (!fr) {
  2124. return ret;
  2125. }
  2126. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  2127. --fr;
  2128. }
  2129. ret.mr = fr->mr;
  2130. ret.fv = view;
  2131. range = addrrange_intersection(range, fr->addr);
  2132. ret.offset_within_region = fr->offset_in_region;
  2133. ret.offset_within_region += int128_get64(int128_sub(range.start,
  2134. fr->addr.start));
  2135. ret.size = range.size;
  2136. ret.offset_within_address_space = int128_get64(range.start);
  2137. ret.readonly = fr->readonly;
  2138. return ret;
  2139. }
  2140. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  2141. hwaddr addr, uint64_t size)
  2142. {
  2143. MemoryRegionSection ret;
  2144. rcu_read_lock();
  2145. ret = memory_region_find_rcu(mr, addr, size);
  2146. if (ret.mr) {
  2147. memory_region_ref(ret.mr);
  2148. }
  2149. rcu_read_unlock();
  2150. return ret;
  2151. }
  2152. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  2153. {
  2154. MemoryRegion *mr;
  2155. rcu_read_lock();
  2156. mr = memory_region_find_rcu(container, addr, 1).mr;
  2157. rcu_read_unlock();
  2158. return mr && mr != container;
  2159. }
  2160. void memory_global_dirty_log_sync(void)
  2161. {
  2162. MemoryListener *listener;
  2163. AddressSpace *as;
  2164. FlatView *view;
  2165. FlatRange *fr;
  2166. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  2167. if (!listener->log_sync) {
  2168. continue;
  2169. }
  2170. as = listener->address_space;
  2171. view = address_space_get_flatview(as);
  2172. FOR_EACH_FLAT_RANGE(fr, view) {
  2173. if (fr->dirty_log_mask) {
  2174. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  2175. listener->log_sync(listener, &mrs);
  2176. }
  2177. }
  2178. flatview_unref(view);
  2179. }
  2180. }
  2181. static VMChangeStateEntry *vmstate_change;
  2182. void memory_global_dirty_log_start(void)
  2183. {
  2184. if (vmstate_change) {
  2185. qemu_del_vm_change_state_handler(vmstate_change);
  2186. vmstate_change = NULL;
  2187. }
  2188. global_dirty_log = true;
  2189. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  2190. /* Refresh DIRTY_LOG_MIGRATION bit. */
  2191. memory_region_transaction_begin();
  2192. memory_region_update_pending = true;
  2193. memory_region_transaction_commit();
  2194. }
  2195. static void memory_global_dirty_log_do_stop(void)
  2196. {
  2197. global_dirty_log = false;
  2198. /* Refresh DIRTY_LOG_MIGRATION bit. */
  2199. memory_region_transaction_begin();
  2200. memory_region_update_pending = true;
  2201. memory_region_transaction_commit();
  2202. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2203. }
  2204. static void memory_vm_change_state_handler(void *opaque, int running,
  2205. RunState state)
  2206. {
  2207. if (running) {
  2208. memory_global_dirty_log_do_stop();
  2209. if (vmstate_change) {
  2210. qemu_del_vm_change_state_handler(vmstate_change);
  2211. vmstate_change = NULL;
  2212. }
  2213. }
  2214. }
  2215. void memory_global_dirty_log_stop(void)
  2216. {
  2217. if (!runstate_is_running()) {
  2218. if (vmstate_change) {
  2219. return;
  2220. }
  2221. vmstate_change = qemu_add_vm_change_state_handler(
  2222. memory_vm_change_state_handler, NULL);
  2223. return;
  2224. }
  2225. memory_global_dirty_log_do_stop();
  2226. }
  2227. static void listener_add_address_space(MemoryListener *listener,
  2228. AddressSpace *as)
  2229. {
  2230. FlatView *view;
  2231. FlatRange *fr;
  2232. if (listener->begin) {
  2233. listener->begin(listener);
  2234. }
  2235. if (global_dirty_log) {
  2236. if (listener->log_global_start) {
  2237. listener->log_global_start(listener);
  2238. }
  2239. }
  2240. view = address_space_get_flatview(as);
  2241. FOR_EACH_FLAT_RANGE(fr, view) {
  2242. MemoryRegionSection section = section_from_flat_range(fr, view);
  2243. if (listener->region_add) {
  2244. listener->region_add(listener, &section);
  2245. }
  2246. if (fr->dirty_log_mask && listener->log_start) {
  2247. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2248. }
  2249. }
  2250. if (listener->commit) {
  2251. listener->commit(listener);
  2252. }
  2253. flatview_unref(view);
  2254. }
  2255. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2256. {
  2257. MemoryListener *other = NULL;
  2258. listener->address_space = as;
  2259. if (QTAILQ_EMPTY(&memory_listeners)
  2260. || listener->priority >= QTAILQ_LAST(&memory_listeners,
  2261. memory_listeners)->priority) {
  2262. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2263. } else {
  2264. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2265. if (listener->priority < other->priority) {
  2266. break;
  2267. }
  2268. }
  2269. QTAILQ_INSERT_BEFORE(other, listener, link);
  2270. }
  2271. if (QTAILQ_EMPTY(&as->listeners)
  2272. || listener->priority >= QTAILQ_LAST(&as->listeners,
  2273. memory_listeners)->priority) {
  2274. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2275. } else {
  2276. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2277. if (listener->priority < other->priority) {
  2278. break;
  2279. }
  2280. }
  2281. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2282. }
  2283. listener_add_address_space(listener, as);
  2284. }
  2285. void memory_listener_unregister(MemoryListener *listener)
  2286. {
  2287. if (!listener->address_space) {
  2288. return;
  2289. }
  2290. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2291. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2292. listener->address_space = NULL;
  2293. }
  2294. bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
  2295. {
  2296. void *host;
  2297. unsigned size = 0;
  2298. unsigned offset = 0;
  2299. Object *new_interface;
  2300. if (!mr || !mr->ops->request_ptr) {
  2301. return false;
  2302. }
  2303. /*
  2304. * Avoid an update if the request_ptr call
  2305. * memory_region_invalidate_mmio_ptr which seems to be likely when we use
  2306. * a cache.
  2307. */
  2308. memory_region_transaction_begin();
  2309. host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
  2310. if (!host || !size) {
  2311. memory_region_transaction_commit();
  2312. return false;
  2313. }
  2314. new_interface = object_new("mmio_interface");
  2315. qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
  2316. qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
  2317. qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
  2318. qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
  2319. qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
  2320. object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
  2321. memory_region_transaction_commit();
  2322. return true;
  2323. }
  2324. typedef struct MMIOPtrInvalidate {
  2325. MemoryRegion *mr;
  2326. hwaddr offset;
  2327. unsigned size;
  2328. int busy;
  2329. int allocated;
  2330. } MMIOPtrInvalidate;
  2331. #define MAX_MMIO_INVALIDATE 10
  2332. static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
  2333. static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
  2334. run_on_cpu_data data)
  2335. {
  2336. MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
  2337. MemoryRegion *mr = invalidate_data->mr;
  2338. hwaddr offset = invalidate_data->offset;
  2339. unsigned size = invalidate_data->size;
  2340. MemoryRegionSection section = memory_region_find(mr, offset, size);
  2341. qemu_mutex_lock_iothread();
  2342. /* Reset dirty so this doesn't happen later. */
  2343. cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
  2344. if (section.mr != mr) {
  2345. /* memory_region_find add a ref on section.mr */
  2346. memory_region_unref(section.mr);
  2347. if (MMIO_INTERFACE(section.mr->owner)) {
  2348. /* We found the interface just drop it. */
  2349. object_property_set_bool(section.mr->owner, false, "realized",
  2350. NULL);
  2351. object_unref(section.mr->owner);
  2352. object_unparent(section.mr->owner);
  2353. }
  2354. }
  2355. qemu_mutex_unlock_iothread();
  2356. if (invalidate_data->allocated) {
  2357. g_free(invalidate_data);
  2358. } else {
  2359. invalidate_data->busy = 0;
  2360. }
  2361. }
  2362. void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
  2363. unsigned size)
  2364. {
  2365. size_t i;
  2366. MMIOPtrInvalidate *invalidate_data = NULL;
  2367. for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
  2368. if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
  2369. invalidate_data = &mmio_ptr_invalidate_list[i];
  2370. break;
  2371. }
  2372. }
  2373. if (!invalidate_data) {
  2374. invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
  2375. invalidate_data->allocated = 1;
  2376. }
  2377. invalidate_data->mr = mr;
  2378. invalidate_data->offset = offset;
  2379. invalidate_data->size = size;
  2380. async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
  2381. RUN_ON_CPU_HOST_PTR(invalidate_data));
  2382. }
  2383. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2384. {
  2385. memory_region_ref(root);
  2386. as->root = root;
  2387. as->current_map = NULL;
  2388. as->ioeventfd_nb = 0;
  2389. as->ioeventfds = NULL;
  2390. QTAILQ_INIT(&as->listeners);
  2391. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2392. as->name = g_strdup(name ? name : "anonymous");
  2393. address_space_update_topology(as);
  2394. address_space_update_ioeventfds(as);
  2395. }
  2396. static void do_address_space_destroy(AddressSpace *as)
  2397. {
  2398. assert(QTAILQ_EMPTY(&as->listeners));
  2399. flatview_unref(as->current_map);
  2400. g_free(as->name);
  2401. g_free(as->ioeventfds);
  2402. memory_region_unref(as->root);
  2403. }
  2404. void address_space_destroy(AddressSpace *as)
  2405. {
  2406. MemoryRegion *root = as->root;
  2407. /* Flush out anything from MemoryListeners listening in on this */
  2408. memory_region_transaction_begin();
  2409. as->root = NULL;
  2410. memory_region_transaction_commit();
  2411. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2412. /* At this point, as->dispatch and as->current_map are dummy
  2413. * entries that the guest should never use. Wait for the old
  2414. * values to expire before freeing the data.
  2415. */
  2416. as->root = root;
  2417. call_rcu(as, do_address_space_destroy, rcu);
  2418. }
  2419. static const char *memory_region_type(MemoryRegion *mr)
  2420. {
  2421. if (memory_region_is_ram_device(mr)) {
  2422. return "ramd";
  2423. } else if (memory_region_is_romd(mr)) {
  2424. return "romd";
  2425. } else if (memory_region_is_rom(mr)) {
  2426. return "rom";
  2427. } else if (memory_region_is_ram(mr)) {
  2428. return "ram";
  2429. } else {
  2430. return "i/o";
  2431. }
  2432. }
  2433. typedef struct MemoryRegionList MemoryRegionList;
  2434. struct MemoryRegionList {
  2435. const MemoryRegion *mr;
  2436. QTAILQ_ENTRY(MemoryRegionList) mrqueue;
  2437. };
  2438. typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
  2439. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2440. int128_sub((size), int128_one())) : 0)
  2441. #define MTREE_INDENT " "
  2442. static void mtree_print_mr(fprintf_function mon_printf, void *f,
  2443. const MemoryRegion *mr, unsigned int level,
  2444. hwaddr base,
  2445. MemoryRegionListHead *alias_print_queue)
  2446. {
  2447. MemoryRegionList *new_ml, *ml, *next_ml;
  2448. MemoryRegionListHead submr_print_queue;
  2449. const MemoryRegion *submr;
  2450. unsigned int i;
  2451. hwaddr cur_start, cur_end;
  2452. if (!mr) {
  2453. return;
  2454. }
  2455. for (i = 0; i < level; i++) {
  2456. mon_printf(f, MTREE_INDENT);
  2457. }
  2458. cur_start = base + mr->addr;
  2459. cur_end = cur_start + MR_SIZE(mr->size);
  2460. /*
  2461. * Try to detect overflow of memory region. This should never
  2462. * happen normally. When it happens, we dump something to warn the
  2463. * user who is observing this.
  2464. */
  2465. if (cur_start < base || cur_end < cur_start) {
  2466. mon_printf(f, "[DETECTED OVERFLOW!] ");
  2467. }
  2468. if (mr->alias) {
  2469. MemoryRegionList *ml;
  2470. bool found = false;
  2471. /* check if the alias is already in the queue */
  2472. QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
  2473. if (ml->mr == mr->alias) {
  2474. found = true;
  2475. }
  2476. }
  2477. if (!found) {
  2478. ml = g_new(MemoryRegionList, 1);
  2479. ml->mr = mr->alias;
  2480. QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
  2481. }
  2482. mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
  2483. " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
  2484. "-" TARGET_FMT_plx "%s\n",
  2485. cur_start, cur_end,
  2486. mr->priority,
  2487. memory_region_type((MemoryRegion *)mr),
  2488. memory_region_name(mr),
  2489. memory_region_name(mr->alias),
  2490. mr->alias_offset,
  2491. mr->alias_offset + MR_SIZE(mr->size),
  2492. mr->enabled ? "" : " [disabled]");
  2493. } else {
  2494. mon_printf(f,
  2495. TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
  2496. cur_start, cur_end,
  2497. mr->priority,
  2498. memory_region_type((MemoryRegion *)mr),
  2499. memory_region_name(mr),
  2500. mr->enabled ? "" : " [disabled]");
  2501. }
  2502. QTAILQ_INIT(&submr_print_queue);
  2503. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2504. new_ml = g_new(MemoryRegionList, 1);
  2505. new_ml->mr = submr;
  2506. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2507. if (new_ml->mr->addr < ml->mr->addr ||
  2508. (new_ml->mr->addr == ml->mr->addr &&
  2509. new_ml->mr->priority > ml->mr->priority)) {
  2510. QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
  2511. new_ml = NULL;
  2512. break;
  2513. }
  2514. }
  2515. if (new_ml) {
  2516. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
  2517. }
  2518. }
  2519. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2520. mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
  2521. alias_print_queue);
  2522. }
  2523. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
  2524. g_free(ml);
  2525. }
  2526. }
  2527. struct FlatViewInfo {
  2528. fprintf_function mon_printf;
  2529. void *f;
  2530. int counter;
  2531. bool dispatch_tree;
  2532. };
  2533. static void mtree_print_flatview(gpointer key, gpointer value,
  2534. gpointer user_data)
  2535. {
  2536. FlatView *view = key;
  2537. GArray *fv_address_spaces = value;
  2538. struct FlatViewInfo *fvi = user_data;
  2539. fprintf_function p = fvi->mon_printf;
  2540. void *f = fvi->f;
  2541. FlatRange *range = &view->ranges[0];
  2542. MemoryRegion *mr;
  2543. int n = view->nr;
  2544. int i;
  2545. AddressSpace *as;
  2546. p(f, "FlatView #%d\n", fvi->counter);
  2547. ++fvi->counter;
  2548. for (i = 0; i < fv_address_spaces->len; ++i) {
  2549. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2550. p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
  2551. if (as->root->alias) {
  2552. p(f, ", alias %s", memory_region_name(as->root->alias));
  2553. }
  2554. p(f, "\n");
  2555. }
  2556. p(f, " Root memory region: %s\n",
  2557. view->root ? memory_region_name(view->root) : "(none)");
  2558. if (n <= 0) {
  2559. p(f, MTREE_INDENT "No rendered FlatView\n\n");
  2560. return;
  2561. }
  2562. while (n--) {
  2563. mr = range->mr;
  2564. if (range->offset_in_region) {
  2565. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2566. TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
  2567. int128_get64(range->addr.start),
  2568. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2569. mr->priority,
  2570. range->readonly ? "rom" : memory_region_type(mr),
  2571. memory_region_name(mr),
  2572. range->offset_in_region);
  2573. } else {
  2574. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2575. TARGET_FMT_plx " (prio %d, %s): %s\n",
  2576. int128_get64(range->addr.start),
  2577. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2578. mr->priority,
  2579. range->readonly ? "rom" : memory_region_type(mr),
  2580. memory_region_name(mr));
  2581. }
  2582. range++;
  2583. }
  2584. #if !defined(CONFIG_USER_ONLY)
  2585. if (fvi->dispatch_tree && view->root) {
  2586. mtree_print_dispatch(p, f, view->dispatch, view->root);
  2587. }
  2588. #endif
  2589. p(f, "\n");
  2590. }
  2591. static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
  2592. gpointer user_data)
  2593. {
  2594. FlatView *view = key;
  2595. GArray *fv_address_spaces = value;
  2596. g_array_unref(fv_address_spaces);
  2597. flatview_unref(view);
  2598. return true;
  2599. }
  2600. void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
  2601. bool dispatch_tree)
  2602. {
  2603. MemoryRegionListHead ml_head;
  2604. MemoryRegionList *ml, *ml2;
  2605. AddressSpace *as;
  2606. if (flatview) {
  2607. FlatView *view;
  2608. struct FlatViewInfo fvi = {
  2609. .mon_printf = mon_printf,
  2610. .f = f,
  2611. .counter = 0,
  2612. .dispatch_tree = dispatch_tree
  2613. };
  2614. GArray *fv_address_spaces;
  2615. GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
  2616. /* Gather all FVs in one table */
  2617. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2618. view = address_space_get_flatview(as);
  2619. fv_address_spaces = g_hash_table_lookup(views, view);
  2620. if (!fv_address_spaces) {
  2621. fv_address_spaces = g_array_new(false, false, sizeof(as));
  2622. g_hash_table_insert(views, view, fv_address_spaces);
  2623. }
  2624. g_array_append_val(fv_address_spaces, as);
  2625. }
  2626. /* Print */
  2627. g_hash_table_foreach(views, mtree_print_flatview, &fvi);
  2628. /* Free */
  2629. g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
  2630. g_hash_table_unref(views);
  2631. return;
  2632. }
  2633. QTAILQ_INIT(&ml_head);
  2634. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2635. mon_printf(f, "address-space: %s\n", as->name);
  2636. mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
  2637. mon_printf(f, "\n");
  2638. }
  2639. /* print aliased regions */
  2640. QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
  2641. mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
  2642. mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
  2643. mon_printf(f, "\n");
  2644. }
  2645. QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
  2646. g_free(ml);
  2647. }
  2648. }
  2649. void memory_region_init_ram(MemoryRegion *mr,
  2650. struct Object *owner,
  2651. const char *name,
  2652. uint64_t size,
  2653. Error **errp)
  2654. {
  2655. DeviceState *owner_dev;
  2656. Error *err = NULL;
  2657. memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
  2658. if (err) {
  2659. error_propagate(errp, err);
  2660. return;
  2661. }
  2662. /* This will assert if owner is neither NULL nor a DeviceState.
  2663. * We only want the owner here for the purposes of defining a
  2664. * unique name for migration. TODO: Ideally we should implement
  2665. * a naming scheme for Objects which are not DeviceStates, in
  2666. * which case we can relax this restriction.
  2667. */
  2668. owner_dev = DEVICE(owner);
  2669. vmstate_register_ram(mr, owner_dev);
  2670. }
  2671. void memory_region_init_rom(MemoryRegion *mr,
  2672. struct Object *owner,
  2673. const char *name,
  2674. uint64_t size,
  2675. Error **errp)
  2676. {
  2677. DeviceState *owner_dev;
  2678. Error *err = NULL;
  2679. memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
  2680. if (err) {
  2681. error_propagate(errp, err);
  2682. return;
  2683. }
  2684. /* This will assert if owner is neither NULL nor a DeviceState.
  2685. * We only want the owner here for the purposes of defining a
  2686. * unique name for migration. TODO: Ideally we should implement
  2687. * a naming scheme for Objects which are not DeviceStates, in
  2688. * which case we can relax this restriction.
  2689. */
  2690. owner_dev = DEVICE(owner);
  2691. vmstate_register_ram(mr, owner_dev);
  2692. }
  2693. void memory_region_init_rom_device(MemoryRegion *mr,
  2694. struct Object *owner,
  2695. const MemoryRegionOps *ops,
  2696. void *opaque,
  2697. const char *name,
  2698. uint64_t size,
  2699. Error **errp)
  2700. {
  2701. DeviceState *owner_dev;
  2702. Error *err = NULL;
  2703. memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
  2704. name, size, &err);
  2705. if (err) {
  2706. error_propagate(errp, err);
  2707. return;
  2708. }
  2709. /* This will assert if owner is neither NULL nor a DeviceState.
  2710. * We only want the owner here for the purposes of defining a
  2711. * unique name for migration. TODO: Ideally we should implement
  2712. * a naming scheme for Objects which are not DeviceStates, in
  2713. * which case we can relax this restriction.
  2714. */
  2715. owner_dev = DEVICE(owner);
  2716. vmstate_register_ram(mr, owner_dev);
  2717. }
  2718. static const TypeInfo memory_region_info = {
  2719. .parent = TYPE_OBJECT,
  2720. .name = TYPE_MEMORY_REGION,
  2721. .instance_size = sizeof(MemoryRegion),
  2722. .instance_init = memory_region_initfn,
  2723. .instance_finalize = memory_region_finalize,
  2724. };
  2725. static const TypeInfo iommu_memory_region_info = {
  2726. .parent = TYPE_MEMORY_REGION,
  2727. .name = TYPE_IOMMU_MEMORY_REGION,
  2728. .class_size = sizeof(IOMMUMemoryRegionClass),
  2729. .instance_size = sizeof(IOMMUMemoryRegion),
  2730. .instance_init = iommu_memory_region_initfn,
  2731. .abstract = true,
  2732. };
  2733. static void memory_register_types(void)
  2734. {
  2735. type_register_static(&memory_region_info);
  2736. type_register_static(&iommu_memory_region_info);
  2737. }
  2738. type_init(memory_register_types)