digic-timer.c 4.2 KB

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  1. /*
  2. * QEMU model of the Canon DIGIC timer block.
  3. *
  4. * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
  5. *
  6. * This model is based on reverse engineering efforts
  7. * made by CHDK (http://chdk.wikia.com) and
  8. * Magic Lantern (http://www.magiclantern.fm) projects
  9. * contributors.
  10. *
  11. * See "Timer/Clock Module" docs here:
  12. * http://magiclantern.wikia.com/wiki/Register_Map
  13. *
  14. * The QEMU model of the OSTimer in PKUnity SoC by Guan Xuetao
  15. * is used as a template.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. */
  28. #include "hw/sysbus.h"
  29. #include "hw/ptimer.h"
  30. #include "qemu/main-loop.h"
  31. #include "hw/timer/digic-timer.h"
  32. static const VMStateDescription vmstate_digic_timer = {
  33. .name = "digic.timer",
  34. .version_id = 1,
  35. .minimum_version_id = 1,
  36. .fields = (VMStateField[]) {
  37. VMSTATE_PTIMER(ptimer, DigicTimerState),
  38. VMSTATE_UINT32(control, DigicTimerState),
  39. VMSTATE_UINT32(relvalue, DigicTimerState),
  40. VMSTATE_END_OF_LIST()
  41. }
  42. };
  43. static void digic_timer_reset(DeviceState *dev)
  44. {
  45. DigicTimerState *s = DIGIC_TIMER(dev);
  46. ptimer_stop(s->ptimer);
  47. s->control = 0;
  48. s->relvalue = 0;
  49. }
  50. static uint64_t digic_timer_read(void *opaque, hwaddr offset, unsigned size)
  51. {
  52. DigicTimerState *s = opaque;
  53. uint64_t ret = 0;
  54. switch (offset) {
  55. case DIGIC_TIMER_CONTROL:
  56. ret = s->control;
  57. break;
  58. case DIGIC_TIMER_RELVALUE:
  59. ret = s->relvalue;
  60. break;
  61. case DIGIC_TIMER_VALUE:
  62. ret = ptimer_get_count(s->ptimer) & 0xffff;
  63. break;
  64. default:
  65. qemu_log_mask(LOG_UNIMP,
  66. "digic-timer: read access to unknown register 0x"
  67. TARGET_FMT_plx, offset);
  68. }
  69. return ret;
  70. }
  71. static void digic_timer_write(void *opaque, hwaddr offset,
  72. uint64_t value, unsigned size)
  73. {
  74. DigicTimerState *s = opaque;
  75. switch (offset) {
  76. case DIGIC_TIMER_CONTROL:
  77. if (value & DIGIC_TIMER_CONTROL_RST) {
  78. digic_timer_reset((DeviceState *)s);
  79. break;
  80. }
  81. if (value & DIGIC_TIMER_CONTROL_EN) {
  82. ptimer_run(s->ptimer, 0);
  83. }
  84. s->control = (uint32_t)value;
  85. break;
  86. case DIGIC_TIMER_RELVALUE:
  87. s->relvalue = extract32(value, 0, 16);
  88. ptimer_set_limit(s->ptimer, s->relvalue, 1);
  89. break;
  90. case DIGIC_TIMER_VALUE:
  91. break;
  92. default:
  93. qemu_log_mask(LOG_UNIMP,
  94. "digic-timer: read access to unknown register 0x"
  95. TARGET_FMT_plx, offset);
  96. }
  97. }
  98. static const MemoryRegionOps digic_timer_ops = {
  99. .read = digic_timer_read,
  100. .write = digic_timer_write,
  101. .impl = {
  102. .min_access_size = 4,
  103. .max_access_size = 4,
  104. },
  105. .endianness = DEVICE_NATIVE_ENDIAN,
  106. };
  107. static void digic_timer_init(Object *obj)
  108. {
  109. DigicTimerState *s = DIGIC_TIMER(obj);
  110. s->ptimer = ptimer_init(NULL);
  111. /*
  112. * FIXME: there is no documentation on Digic timer
  113. * frequency setup so let it always run at 1 MHz
  114. */
  115. ptimer_set_freq(s->ptimer, 1 * 1000 * 1000);
  116. memory_region_init_io(&s->iomem, OBJECT(s), &digic_timer_ops, s,
  117. TYPE_DIGIC_TIMER, 0x100);
  118. sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
  119. }
  120. static void digic_timer_class_init(ObjectClass *klass, void *class_data)
  121. {
  122. DeviceClass *dc = DEVICE_CLASS(klass);
  123. dc->reset = digic_timer_reset;
  124. dc->vmsd = &vmstate_digic_timer;
  125. }
  126. static const TypeInfo digic_timer_info = {
  127. .name = TYPE_DIGIC_TIMER,
  128. .parent = TYPE_SYS_BUS_DEVICE,
  129. .instance_size = sizeof(DigicTimerState),
  130. .instance_init = digic_timer_init,
  131. .class_init = digic_timer_class_init,
  132. };
  133. static void digic_timer_register_type(void)
  134. {
  135. type_register_static(&digic_timer_info);
  136. }
  137. type_init(digic_timer_register_type)