xics_kvm.c 14 KB

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  1. /*
  2. * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
  3. *
  4. * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
  5. *
  6. * Copyright (c) 2013 David Gibson, IBM Corporation.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. *
  26. */
  27. #include "hw/hw.h"
  28. #include "trace.h"
  29. #include "hw/ppc/spapr.h"
  30. #include "hw/ppc/xics.h"
  31. #include "kvm_ppc.h"
  32. #include "qemu/config-file.h"
  33. #include "qemu/error-report.h"
  34. #include <sys/ioctl.h>
  35. typedef struct KVMXICSState {
  36. XICSState parent_obj;
  37. int kernel_xics_fd;
  38. } KVMXICSState;
  39. /*
  40. * ICP-KVM
  41. */
  42. static void icp_get_kvm_state(ICPState *ss)
  43. {
  44. uint64_t state;
  45. struct kvm_one_reg reg = {
  46. .id = KVM_REG_PPC_ICP_STATE,
  47. .addr = (uintptr_t)&state,
  48. };
  49. int ret;
  50. /* ICP for this CPU thread is not in use, exiting */
  51. if (!ss->cs) {
  52. return;
  53. }
  54. ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
  55. if (ret != 0) {
  56. error_report("Unable to retrieve KVM interrupt controller state"
  57. " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
  58. exit(1);
  59. }
  60. ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
  61. ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
  62. & KVM_REG_PPC_ICP_MFRR_MASK;
  63. ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
  64. & KVM_REG_PPC_ICP_PPRI_MASK;
  65. }
  66. static int icp_set_kvm_state(ICPState *ss, int version_id)
  67. {
  68. uint64_t state;
  69. struct kvm_one_reg reg = {
  70. .id = KVM_REG_PPC_ICP_STATE,
  71. .addr = (uintptr_t)&state,
  72. };
  73. int ret;
  74. /* ICP for this CPU thread is not in use, exiting */
  75. if (!ss->cs) {
  76. return 0;
  77. }
  78. state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
  79. | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
  80. | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
  81. ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
  82. if (ret != 0) {
  83. error_report("Unable to restore KVM interrupt controller state (0x%"
  84. PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
  85. strerror(errno));
  86. return ret;
  87. }
  88. return 0;
  89. }
  90. static void icp_kvm_reset(DeviceState *dev)
  91. {
  92. ICPState *icp = ICP(dev);
  93. icp->xirr = 0;
  94. icp->pending_priority = 0xff;
  95. icp->mfrr = 0xff;
  96. /* Make all outputs are deasserted */
  97. qemu_set_irq(icp->output, 0);
  98. icp_set_kvm_state(icp, 1);
  99. }
  100. static void icp_kvm_class_init(ObjectClass *klass, void *data)
  101. {
  102. DeviceClass *dc = DEVICE_CLASS(klass);
  103. ICPStateClass *icpc = ICP_CLASS(klass);
  104. dc->reset = icp_kvm_reset;
  105. icpc->pre_save = icp_get_kvm_state;
  106. icpc->post_load = icp_set_kvm_state;
  107. }
  108. static const TypeInfo icp_kvm_info = {
  109. .name = TYPE_KVM_ICP,
  110. .parent = TYPE_ICP,
  111. .instance_size = sizeof(ICPState),
  112. .class_init = icp_kvm_class_init,
  113. .class_size = sizeof(ICPStateClass),
  114. };
  115. /*
  116. * ICS-KVM
  117. */
  118. static void ics_get_kvm_state(ICSState *ics)
  119. {
  120. KVMXICSState *icpkvm = KVM_XICS(ics->icp);
  121. uint64_t state;
  122. struct kvm_device_attr attr = {
  123. .flags = 0,
  124. .group = KVM_DEV_XICS_GRP_SOURCES,
  125. .addr = (uint64_t)(uintptr_t)&state,
  126. };
  127. int i;
  128. for (i = 0; i < ics->nr_irqs; i++) {
  129. ICSIRQState *irq = &ics->irqs[i];
  130. int ret;
  131. attr.attr = i + ics->offset;
  132. ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
  133. if (ret != 0) {
  134. error_report("Unable to retrieve KVM interrupt controller state"
  135. " for IRQ %d: %s", i + ics->offset, strerror(errno));
  136. exit(1);
  137. }
  138. irq->server = state & KVM_XICS_DESTINATION_MASK;
  139. irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
  140. & KVM_XICS_PRIORITY_MASK;
  141. /*
  142. * To be consistent with the software emulation in xics.c, we
  143. * split out the masked state + priority that we get from the
  144. * kernel into 'current priority' (0xff if masked) and
  145. * 'saved priority' (if masked, this is the priority the
  146. * interrupt had before it was masked). Masking and unmasking
  147. * are done with the ibm,int-off and ibm,int-on RTAS calls.
  148. */
  149. if (state & KVM_XICS_MASKED) {
  150. irq->priority = 0xff;
  151. } else {
  152. irq->priority = irq->saved_priority;
  153. }
  154. if (state & KVM_XICS_PENDING) {
  155. if (state & KVM_XICS_LEVEL_SENSITIVE) {
  156. irq->status |= XICS_STATUS_ASSERTED;
  157. } else {
  158. /*
  159. * A pending edge-triggered interrupt (or MSI)
  160. * must have been rejected previously when we
  161. * first detected it and tried to deliver it,
  162. * so mark it as pending and previously rejected
  163. * for consistency with how xics.c works.
  164. */
  165. irq->status |= XICS_STATUS_MASKED_PENDING
  166. | XICS_STATUS_REJECTED;
  167. }
  168. }
  169. }
  170. }
  171. static int ics_set_kvm_state(ICSState *ics, int version_id)
  172. {
  173. KVMXICSState *icpkvm = KVM_XICS(ics->icp);
  174. uint64_t state;
  175. struct kvm_device_attr attr = {
  176. .flags = 0,
  177. .group = KVM_DEV_XICS_GRP_SOURCES,
  178. .addr = (uint64_t)(uintptr_t)&state,
  179. };
  180. int i;
  181. for (i = 0; i < ics->nr_irqs; i++) {
  182. ICSIRQState *irq = &ics->irqs[i];
  183. int ret;
  184. attr.attr = i + ics->offset;
  185. state = irq->server;
  186. state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
  187. << KVM_XICS_PRIORITY_SHIFT;
  188. if (irq->priority != irq->saved_priority) {
  189. assert(irq->priority == 0xff);
  190. state |= KVM_XICS_MASKED;
  191. }
  192. if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
  193. state |= KVM_XICS_LEVEL_SENSITIVE;
  194. if (irq->status & XICS_STATUS_ASSERTED) {
  195. state |= KVM_XICS_PENDING;
  196. }
  197. } else {
  198. if (irq->status & XICS_STATUS_MASKED_PENDING) {
  199. state |= KVM_XICS_PENDING;
  200. }
  201. }
  202. ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
  203. if (ret != 0) {
  204. error_report("Unable to restore KVM interrupt controller state"
  205. " for IRQs %d: %s", i + ics->offset, strerror(errno));
  206. return ret;
  207. }
  208. }
  209. return 0;
  210. }
  211. static void ics_kvm_set_irq(void *opaque, int srcno, int val)
  212. {
  213. ICSState *ics = opaque;
  214. struct kvm_irq_level args;
  215. int rc;
  216. args.irq = srcno + ics->offset;
  217. if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
  218. if (!val) {
  219. return;
  220. }
  221. args.level = KVM_INTERRUPT_SET;
  222. } else {
  223. args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
  224. }
  225. rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
  226. if (rc < 0) {
  227. perror("kvm_irq_line");
  228. }
  229. }
  230. static void ics_kvm_reset(DeviceState *dev)
  231. {
  232. ICSState *ics = ICS(dev);
  233. int i;
  234. uint8_t flags[ics->nr_irqs];
  235. for (i = 0; i < ics->nr_irqs; i++) {
  236. flags[i] = ics->irqs[i].flags;
  237. }
  238. memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
  239. for (i = 0; i < ics->nr_irqs; i++) {
  240. ics->irqs[i].priority = 0xff;
  241. ics->irqs[i].saved_priority = 0xff;
  242. ics->irqs[i].flags = flags[i];
  243. }
  244. ics_set_kvm_state(ics, 1);
  245. }
  246. static void ics_kvm_realize(DeviceState *dev, Error **errp)
  247. {
  248. ICSState *ics = ICS(dev);
  249. if (!ics->nr_irqs) {
  250. error_setg(errp, "Number of interrupts needs to be greater 0");
  251. return;
  252. }
  253. ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
  254. ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
  255. }
  256. static void ics_kvm_class_init(ObjectClass *klass, void *data)
  257. {
  258. DeviceClass *dc = DEVICE_CLASS(klass);
  259. ICSStateClass *icsc = ICS_CLASS(klass);
  260. dc->realize = ics_kvm_realize;
  261. dc->reset = ics_kvm_reset;
  262. icsc->pre_save = ics_get_kvm_state;
  263. icsc->post_load = ics_set_kvm_state;
  264. }
  265. static const TypeInfo ics_kvm_info = {
  266. .name = TYPE_KVM_ICS,
  267. .parent = TYPE_ICS,
  268. .instance_size = sizeof(ICSState),
  269. .class_init = ics_kvm_class_init,
  270. };
  271. /*
  272. * XICS-KVM
  273. */
  274. static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
  275. {
  276. CPUState *cs;
  277. ICPState *ss;
  278. KVMXICSState *icpkvm = KVM_XICS(icp);
  279. cs = CPU(cpu);
  280. ss = &icp->ss[cs->cpu_index];
  281. assert(cs->cpu_index < icp->nr_servers);
  282. if (icpkvm->kernel_xics_fd == -1) {
  283. abort();
  284. }
  285. if (icpkvm->kernel_xics_fd != -1) {
  286. int ret;
  287. ss->cs = cs;
  288. ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
  289. icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
  290. if (ret < 0) {
  291. error_report("Unable to connect CPU%ld to kernel XICS: %s",
  292. kvm_arch_vcpu_id(cs), strerror(errno));
  293. exit(1);
  294. }
  295. }
  296. }
  297. static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
  298. {
  299. icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
  300. }
  301. static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
  302. Error **errp)
  303. {
  304. int i;
  305. icp->nr_servers = nr_servers;
  306. icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
  307. for (i = 0; i < icp->nr_servers; i++) {
  308. char buffer[32];
  309. object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
  310. snprintf(buffer, sizeof(buffer), "icp[%d]", i);
  311. object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
  312. errp);
  313. }
  314. }
  315. static void rtas_dummy(PowerPCCPU *cpu, sPAPREnvironment *spapr,
  316. uint32_t token,
  317. uint32_t nargs, target_ulong args,
  318. uint32_t nret, target_ulong rets)
  319. {
  320. error_report("pseries: %s must never be called for in-kernel XICS",
  321. __func__);
  322. }
  323. static void xics_kvm_realize(DeviceState *dev, Error **errp)
  324. {
  325. KVMXICSState *icpkvm = KVM_XICS(dev);
  326. XICSState *icp = XICS_COMMON(dev);
  327. int i, rc;
  328. Error *error = NULL;
  329. struct kvm_create_device xics_create_device = {
  330. .type = KVM_DEV_TYPE_XICS,
  331. .flags = 0,
  332. };
  333. if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
  334. error_setg(errp,
  335. "KVM and IRQ_XICS capability must be present for in-kernel XICS");
  336. goto fail;
  337. }
  338. spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
  339. spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
  340. spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
  341. spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
  342. rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
  343. if (rc < 0) {
  344. error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
  345. goto fail;
  346. }
  347. rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
  348. if (rc < 0) {
  349. error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
  350. goto fail;
  351. }
  352. rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
  353. if (rc < 0) {
  354. error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
  355. goto fail;
  356. }
  357. rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
  358. if (rc < 0) {
  359. error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
  360. goto fail;
  361. }
  362. /* Create the kernel ICP */
  363. rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
  364. if (rc < 0) {
  365. error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
  366. goto fail;
  367. }
  368. icpkvm->kernel_xics_fd = xics_create_device.fd;
  369. object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
  370. if (error) {
  371. error_propagate(errp, error);
  372. goto fail;
  373. }
  374. assert(icp->nr_servers);
  375. for (i = 0; i < icp->nr_servers; i++) {
  376. object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
  377. if (error) {
  378. error_propagate(errp, error);
  379. goto fail;
  380. }
  381. }
  382. kvm_kernel_irqchip = true;
  383. kvm_irqfds_allowed = true;
  384. kvm_msi_via_irqfd_allowed = true;
  385. kvm_gsi_direct_mapping = true;
  386. return;
  387. fail:
  388. kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
  389. kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
  390. kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
  391. kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
  392. }
  393. static void xics_kvm_initfn(Object *obj)
  394. {
  395. XICSState *xics = XICS_COMMON(obj);
  396. xics->ics = ICS(object_new(TYPE_KVM_ICS));
  397. object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
  398. xics->ics->icp = xics;
  399. }
  400. static void xics_kvm_class_init(ObjectClass *oc, void *data)
  401. {
  402. DeviceClass *dc = DEVICE_CLASS(oc);
  403. XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
  404. dc->realize = xics_kvm_realize;
  405. xsc->cpu_setup = xics_kvm_cpu_setup;
  406. xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
  407. xsc->set_nr_servers = xics_kvm_set_nr_servers;
  408. }
  409. static const TypeInfo xics_kvm_info = {
  410. .name = TYPE_KVM_XICS,
  411. .parent = TYPE_XICS_COMMON,
  412. .instance_size = sizeof(KVMXICSState),
  413. .class_init = xics_kvm_class_init,
  414. .instance_init = xics_kvm_initfn,
  415. };
  416. static void xics_kvm_register_types(void)
  417. {
  418. type_register_static(&xics_kvm_info);
  419. type_register_static(&ics_kvm_info);
  420. type_register_static(&icp_kvm_info);
  421. }
  422. type_init(xics_kvm_register_types)