ssd0303.c 9.0 KB

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  1. /*
  2. * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
  3. *
  4. * Copyright (c) 2006-2007 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GPL.
  8. */
  9. /* The controller can support a variety of different displays, but we only
  10. implement one. Most of the commends relating to brightness and geometry
  11. setup are ignored. */
  12. #include "hw/i2c/i2c.h"
  13. #include "ui/console.h"
  14. //#define DEBUG_SSD0303 1
  15. #ifdef DEBUG_SSD0303
  16. #define DPRINTF(fmt, ...) \
  17. do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
  18. #define BADF(fmt, ...) \
  19. do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
  20. #else
  21. #define DPRINTF(fmt, ...) do {} while(0)
  22. #define BADF(fmt, ...) \
  23. do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
  24. #endif
  25. /* Scaling factor for pixels. */
  26. #define MAGNIFY 4
  27. enum ssd0303_mode
  28. {
  29. SSD0303_IDLE,
  30. SSD0303_DATA,
  31. SSD0303_CMD
  32. };
  33. enum ssd0303_cmd {
  34. SSD0303_CMD_NONE,
  35. SSD0303_CMD_SKIP1
  36. };
  37. #define TYPE_SSD0303 "ssd0303"
  38. #define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)
  39. typedef struct {
  40. I2CSlave parent_obj;
  41. QemuConsole *con;
  42. int row;
  43. int col;
  44. int start_line;
  45. int mirror;
  46. int flash;
  47. int enabled;
  48. int inverse;
  49. int redraw;
  50. enum ssd0303_mode mode;
  51. enum ssd0303_cmd cmd_state;
  52. uint8_t framebuffer[132*8];
  53. } ssd0303_state;
  54. static int ssd0303_recv(I2CSlave *i2c)
  55. {
  56. BADF("Reads not implemented\n");
  57. return -1;
  58. }
  59. static int ssd0303_send(I2CSlave *i2c, uint8_t data)
  60. {
  61. ssd0303_state *s = SSD0303(i2c);
  62. enum ssd0303_cmd old_cmd_state;
  63. switch (s->mode) {
  64. case SSD0303_IDLE:
  65. DPRINTF("byte 0x%02x\n", data);
  66. if (data == 0x80)
  67. s->mode = SSD0303_CMD;
  68. else if (data == 0x40)
  69. s->mode = SSD0303_DATA;
  70. else
  71. BADF("Unexpected byte 0x%x\n", data);
  72. break;
  73. case SSD0303_DATA:
  74. DPRINTF("data 0x%02x\n", data);
  75. if (s->col < 132) {
  76. s->framebuffer[s->col + s->row * 132] = data;
  77. s->col++;
  78. s->redraw = 1;
  79. }
  80. break;
  81. case SSD0303_CMD:
  82. old_cmd_state = s->cmd_state;
  83. s->cmd_state = SSD0303_CMD_NONE;
  84. switch (old_cmd_state) {
  85. case SSD0303_CMD_NONE:
  86. DPRINTF("cmd 0x%02x\n", data);
  87. s->mode = SSD0303_IDLE;
  88. switch (data) {
  89. case 0x00 ... 0x0f: /* Set lower column address. */
  90. s->col = (s->col & 0xf0) | (data & 0xf);
  91. break;
  92. case 0x10 ... 0x20: /* Set higher column address. */
  93. s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
  94. break;
  95. case 0x40 ... 0x7f: /* Set start line. */
  96. s->start_line = 0;
  97. break;
  98. case 0x81: /* Set contrast (Ignored). */
  99. s->cmd_state = SSD0303_CMD_SKIP1;
  100. break;
  101. case 0xa0: /* Mirror off. */
  102. s->mirror = 0;
  103. break;
  104. case 0xa1: /* Mirror off. */
  105. s->mirror = 1;
  106. break;
  107. case 0xa4: /* Entire display off. */
  108. s->flash = 0;
  109. break;
  110. case 0xa5: /* Entire display on. */
  111. s->flash = 1;
  112. break;
  113. case 0xa6: /* Inverse off. */
  114. s->inverse = 0;
  115. break;
  116. case 0xa7: /* Inverse on. */
  117. s->inverse = 1;
  118. break;
  119. case 0xa8: /* Set multiplied ratio (Ignored). */
  120. s->cmd_state = SSD0303_CMD_SKIP1;
  121. break;
  122. case 0xad: /* DC-DC power control. */
  123. s->cmd_state = SSD0303_CMD_SKIP1;
  124. break;
  125. case 0xae: /* Display off. */
  126. s->enabled = 0;
  127. break;
  128. case 0xaf: /* Display on. */
  129. s->enabled = 1;
  130. break;
  131. case 0xb0 ... 0xbf: /* Set Page address. */
  132. s->row = data & 7;
  133. break;
  134. case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
  135. break;
  136. case 0xd3: /* Set display offset (Ignored). */
  137. s->cmd_state = SSD0303_CMD_SKIP1;
  138. break;
  139. case 0xd5: /* Set display clock (Ignored). */
  140. s->cmd_state = SSD0303_CMD_SKIP1;
  141. break;
  142. case 0xd8: /* Set color and power mode (Ignored). */
  143. s->cmd_state = SSD0303_CMD_SKIP1;
  144. break;
  145. case 0xd9: /* Set pre-charge period (Ignored). */
  146. s->cmd_state = SSD0303_CMD_SKIP1;
  147. break;
  148. case 0xda: /* Set COM pin configuration (Ignored). */
  149. s->cmd_state = SSD0303_CMD_SKIP1;
  150. break;
  151. case 0xdb: /* Set VCOM dselect level (Ignored). */
  152. s->cmd_state = SSD0303_CMD_SKIP1;
  153. break;
  154. case 0xe3: /* no-op. */
  155. break;
  156. default:
  157. BADF("Unknown command: 0x%x\n", data);
  158. }
  159. break;
  160. case SSD0303_CMD_SKIP1:
  161. DPRINTF("skip 0x%02x\n", data);
  162. break;
  163. }
  164. break;
  165. }
  166. return 0;
  167. }
  168. static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
  169. {
  170. ssd0303_state *s = SSD0303(i2c);
  171. switch (event) {
  172. case I2C_FINISH:
  173. s->mode = SSD0303_IDLE;
  174. break;
  175. case I2C_START_RECV:
  176. case I2C_START_SEND:
  177. case I2C_NACK:
  178. /* Nothing to do. */
  179. break;
  180. }
  181. }
  182. static void ssd0303_update_display(void *opaque)
  183. {
  184. ssd0303_state *s = (ssd0303_state *)opaque;
  185. DisplaySurface *surface = qemu_console_surface(s->con);
  186. uint8_t *dest;
  187. uint8_t *src;
  188. int x;
  189. int y;
  190. int line;
  191. char *colors[2];
  192. char colortab[MAGNIFY * 8];
  193. int dest_width;
  194. uint8_t mask;
  195. if (!s->redraw)
  196. return;
  197. switch (surface_bits_per_pixel(surface)) {
  198. case 0:
  199. return;
  200. case 15:
  201. dest_width = 2;
  202. break;
  203. case 16:
  204. dest_width = 2;
  205. break;
  206. case 24:
  207. dest_width = 3;
  208. break;
  209. case 32:
  210. dest_width = 4;
  211. break;
  212. default:
  213. BADF("Bad color depth\n");
  214. return;
  215. }
  216. dest_width *= MAGNIFY;
  217. memset(colortab, 0xff, dest_width);
  218. memset(colortab + dest_width, 0, dest_width);
  219. if (s->flash) {
  220. colors[0] = colortab;
  221. colors[1] = colortab;
  222. } else if (s->inverse) {
  223. colors[0] = colortab;
  224. colors[1] = colortab + dest_width;
  225. } else {
  226. colors[0] = colortab + dest_width;
  227. colors[1] = colortab;
  228. }
  229. dest = surface_data(surface);
  230. for (y = 0; y < 16; y++) {
  231. line = (y + s->start_line) & 63;
  232. src = s->framebuffer + 132 * (line >> 3) + 36;
  233. mask = 1 << (line & 7);
  234. for (x = 0; x < 96; x++) {
  235. memcpy(dest, colors[(*src & mask) != 0], dest_width);
  236. dest += dest_width;
  237. src++;
  238. }
  239. for (x = 1; x < MAGNIFY; x++) {
  240. memcpy(dest, dest - dest_width * 96, dest_width * 96);
  241. dest += dest_width * 96;
  242. }
  243. }
  244. s->redraw = 0;
  245. dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
  246. }
  247. static void ssd0303_invalidate_display(void * opaque)
  248. {
  249. ssd0303_state *s = (ssd0303_state *)opaque;
  250. s->redraw = 1;
  251. }
  252. static const VMStateDescription vmstate_ssd0303 = {
  253. .name = "ssd0303_oled",
  254. .version_id = 1,
  255. .minimum_version_id = 1,
  256. .fields = (VMStateField[]) {
  257. VMSTATE_INT32(row, ssd0303_state),
  258. VMSTATE_INT32(col, ssd0303_state),
  259. VMSTATE_INT32(start_line, ssd0303_state),
  260. VMSTATE_INT32(mirror, ssd0303_state),
  261. VMSTATE_INT32(flash, ssd0303_state),
  262. VMSTATE_INT32(enabled, ssd0303_state),
  263. VMSTATE_INT32(inverse, ssd0303_state),
  264. VMSTATE_INT32(redraw, ssd0303_state),
  265. VMSTATE_UINT32(mode, ssd0303_state),
  266. VMSTATE_UINT32(cmd_state, ssd0303_state),
  267. VMSTATE_BUFFER(framebuffer, ssd0303_state),
  268. VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
  269. VMSTATE_END_OF_LIST()
  270. }
  271. };
  272. static const GraphicHwOps ssd0303_ops = {
  273. .invalidate = ssd0303_invalidate_display,
  274. .gfx_update = ssd0303_update_display,
  275. };
  276. static int ssd0303_init(I2CSlave *i2c)
  277. {
  278. ssd0303_state *s = SSD0303(i2c);
  279. s->con = graphic_console_init(DEVICE(i2c), 0, &ssd0303_ops, s);
  280. qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
  281. return 0;
  282. }
  283. static void ssd0303_class_init(ObjectClass *klass, void *data)
  284. {
  285. DeviceClass *dc = DEVICE_CLASS(klass);
  286. I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
  287. k->init = ssd0303_init;
  288. k->event = ssd0303_event;
  289. k->recv = ssd0303_recv;
  290. k->send = ssd0303_send;
  291. dc->vmsd = &vmstate_ssd0303;
  292. }
  293. static const TypeInfo ssd0303_info = {
  294. .name = TYPE_SSD0303,
  295. .parent = TYPE_I2C_SLAVE,
  296. .instance_size = sizeof(ssd0303_state),
  297. .class_init = ssd0303_class_init,
  298. };
  299. static void ssd0303_register_types(void)
  300. {
  301. type_register_static(&ssd0303_info);
  302. }
  303. type_init(ssd0303_register_types)