ivshmem.c 23 KB

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  1. /*
  2. * Inter-VM Shared Memory PCI device.
  3. *
  4. * Author:
  5. * Cam Macdonell <cam@cs.ualberta.ca>
  6. *
  7. * Based On: cirrus_vga.c
  8. * Copyright (c) 2004 Fabrice Bellard
  9. * Copyright (c) 2004 Makoto Suzuki (suzu)
  10. *
  11. * and rtl8139.c
  12. * Copyright (c) 2006 Igor Kovalenko
  13. *
  14. * This code is licensed under the GNU GPL v2.
  15. *
  16. * Contributions after 2012-01-13 are licensed under the terms of the
  17. * GNU GPL, version 2 or (at your option) any later version.
  18. */
  19. #include "hw/hw.h"
  20. #include "hw/i386/pc.h"
  21. #include "hw/pci/pci.h"
  22. #include "hw/pci/msix.h"
  23. #include "sysemu/kvm.h"
  24. #include "migration/migration.h"
  25. #include "qapi/qmp/qerror.h"
  26. #include "qemu/event_notifier.h"
  27. #include "sysemu/char.h"
  28. #include <sys/mman.h>
  29. #include <sys/types.h>
  30. #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
  31. #define PCI_DEVICE_ID_IVSHMEM 0x1110
  32. #define IVSHMEM_IOEVENTFD 0
  33. #define IVSHMEM_MSI 1
  34. #define IVSHMEM_PEER 0
  35. #define IVSHMEM_MASTER 1
  36. #define IVSHMEM_REG_BAR_SIZE 0x100
  37. //#define DEBUG_IVSHMEM
  38. #ifdef DEBUG_IVSHMEM
  39. #define IVSHMEM_DPRINTF(fmt, ...) \
  40. do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
  41. #else
  42. #define IVSHMEM_DPRINTF(fmt, ...)
  43. #endif
  44. #define TYPE_IVSHMEM "ivshmem"
  45. #define IVSHMEM(obj) \
  46. OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
  47. typedef struct Peer {
  48. int nb_eventfds;
  49. EventNotifier *eventfds;
  50. } Peer;
  51. typedef struct EventfdEntry {
  52. PCIDevice *pdev;
  53. int vector;
  54. } EventfdEntry;
  55. typedef struct IVShmemState {
  56. /*< private >*/
  57. PCIDevice parent_obj;
  58. /*< public >*/
  59. uint32_t intrmask;
  60. uint32_t intrstatus;
  61. uint32_t doorbell;
  62. CharDriverState **eventfd_chr;
  63. CharDriverState *server_chr;
  64. MemoryRegion ivshmem_mmio;
  65. /* We might need to register the BAR before we actually have the memory.
  66. * So prepare a container MemoryRegion for the BAR immediately and
  67. * add a subregion when we have the memory.
  68. */
  69. MemoryRegion bar;
  70. MemoryRegion ivshmem;
  71. uint64_t ivshmem_size; /* size of shared memory region */
  72. uint32_t ivshmem_attr;
  73. uint32_t ivshmem_64bit;
  74. int shm_fd; /* shared memory file descriptor */
  75. Peer *peers;
  76. int nb_peers; /* how many guests we have space for */
  77. int max_peer; /* maximum numbered peer */
  78. int vm_id;
  79. uint32_t vectors;
  80. uint32_t features;
  81. EventfdEntry *eventfd_table;
  82. Error *migration_blocker;
  83. char * shmobj;
  84. char * sizearg;
  85. char * role;
  86. int role_val; /* scalar to avoid multiple string comparisons */
  87. } IVShmemState;
  88. /* registers for the Inter-VM shared memory device */
  89. enum ivshmem_registers {
  90. INTRMASK = 0,
  91. INTRSTATUS = 4,
  92. IVPOSITION = 8,
  93. DOORBELL = 12,
  94. };
  95. static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
  96. unsigned int feature) {
  97. return (ivs->features & (1 << feature));
  98. }
  99. static inline bool is_power_of_two(uint64_t x) {
  100. return (x & (x - 1)) == 0;
  101. }
  102. /* accessing registers - based on rtl8139 */
  103. static void ivshmem_update_irq(IVShmemState *s, int val)
  104. {
  105. PCIDevice *d = PCI_DEVICE(s);
  106. int isr;
  107. isr = (s->intrstatus & s->intrmask) & 0xffffffff;
  108. /* don't print ISR resets */
  109. if (isr) {
  110. IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
  111. isr ? 1 : 0, s->intrstatus, s->intrmask);
  112. }
  113. pci_set_irq(d, (isr != 0));
  114. }
  115. static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
  116. {
  117. IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
  118. s->intrmask = val;
  119. ivshmem_update_irq(s, val);
  120. }
  121. static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
  122. {
  123. uint32_t ret = s->intrmask;
  124. IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
  125. return ret;
  126. }
  127. static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
  128. {
  129. IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
  130. s->intrstatus = val;
  131. ivshmem_update_irq(s, val);
  132. }
  133. static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
  134. {
  135. uint32_t ret = s->intrstatus;
  136. /* reading ISR clears all interrupts */
  137. s->intrstatus = 0;
  138. ivshmem_update_irq(s, 0);
  139. return ret;
  140. }
  141. static void ivshmem_io_write(void *opaque, hwaddr addr,
  142. uint64_t val, unsigned size)
  143. {
  144. IVShmemState *s = opaque;
  145. uint16_t dest = val >> 16;
  146. uint16_t vector = val & 0xff;
  147. addr &= 0xfc;
  148. IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
  149. switch (addr)
  150. {
  151. case INTRMASK:
  152. ivshmem_IntrMask_write(s, val);
  153. break;
  154. case INTRSTATUS:
  155. ivshmem_IntrStatus_write(s, val);
  156. break;
  157. case DOORBELL:
  158. /* check that dest VM ID is reasonable */
  159. if (dest > s->max_peer) {
  160. IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
  161. break;
  162. }
  163. /* check doorbell range */
  164. if (vector < s->peers[dest].nb_eventfds) {
  165. IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
  166. event_notifier_set(&s->peers[dest].eventfds[vector]);
  167. }
  168. break;
  169. default:
  170. IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
  171. }
  172. }
  173. static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
  174. unsigned size)
  175. {
  176. IVShmemState *s = opaque;
  177. uint32_t ret;
  178. switch (addr)
  179. {
  180. case INTRMASK:
  181. ret = ivshmem_IntrMask_read(s);
  182. break;
  183. case INTRSTATUS:
  184. ret = ivshmem_IntrStatus_read(s);
  185. break;
  186. case IVPOSITION:
  187. /* return my VM ID if the memory is mapped */
  188. if (s->shm_fd > 0) {
  189. ret = s->vm_id;
  190. } else {
  191. ret = -1;
  192. }
  193. break;
  194. default:
  195. IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
  196. ret = 0;
  197. }
  198. return ret;
  199. }
  200. static const MemoryRegionOps ivshmem_mmio_ops = {
  201. .read = ivshmem_io_read,
  202. .write = ivshmem_io_write,
  203. .endianness = DEVICE_NATIVE_ENDIAN,
  204. .impl = {
  205. .min_access_size = 4,
  206. .max_access_size = 4,
  207. },
  208. };
  209. static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
  210. {
  211. IVShmemState *s = opaque;
  212. ivshmem_IntrStatus_write(s, *buf);
  213. IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
  214. }
  215. static int ivshmem_can_receive(void * opaque)
  216. {
  217. return 8;
  218. }
  219. static void ivshmem_event(void *opaque, int event)
  220. {
  221. IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
  222. }
  223. static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
  224. EventfdEntry *entry = opaque;
  225. PCIDevice *pdev = entry->pdev;
  226. IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
  227. msix_notify(pdev, entry->vector);
  228. }
  229. static CharDriverState* create_eventfd_chr_device(void * opaque, EventNotifier *n,
  230. int vector)
  231. {
  232. /* create a event character device based on the passed eventfd */
  233. IVShmemState *s = opaque;
  234. CharDriverState * chr;
  235. int eventfd = event_notifier_get_fd(n);
  236. chr = qemu_chr_open_eventfd(eventfd);
  237. if (chr == NULL) {
  238. fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
  239. exit(-1);
  240. }
  241. qemu_chr_fe_claim_no_fail(chr);
  242. /* if MSI is supported we need multiple interrupts */
  243. if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
  244. s->eventfd_table[vector].pdev = PCI_DEVICE(s);
  245. s->eventfd_table[vector].vector = vector;
  246. qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
  247. ivshmem_event, &s->eventfd_table[vector]);
  248. } else {
  249. qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
  250. ivshmem_event, s);
  251. }
  252. return chr;
  253. }
  254. static int check_shm_size(IVShmemState *s, int fd) {
  255. /* check that the guest isn't going to try and map more memory than the
  256. * the object has allocated return -1 to indicate error */
  257. struct stat buf;
  258. fstat(fd, &buf);
  259. if (s->ivshmem_size > buf.st_size) {
  260. fprintf(stderr,
  261. "IVSHMEM ERROR: Requested memory size greater"
  262. " than shared object size (%" PRIu64 " > %" PRIu64")\n",
  263. s->ivshmem_size, (uint64_t)buf.st_size);
  264. return -1;
  265. } else {
  266. return 0;
  267. }
  268. }
  269. /* create the shared memory BAR when we are not using the server, so we can
  270. * create the BAR and map the memory immediately */
  271. static void create_shared_memory_BAR(IVShmemState *s, int fd) {
  272. void * ptr;
  273. s->shm_fd = fd;
  274. ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
  275. memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
  276. s->ivshmem_size, ptr);
  277. vmstate_register_ram(&s->ivshmem, DEVICE(s));
  278. memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
  279. /* region for shared memory */
  280. pci_register_bar(PCI_DEVICE(s), 2, s->ivshmem_attr, &s->bar);
  281. }
  282. static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
  283. {
  284. memory_region_add_eventfd(&s->ivshmem_mmio,
  285. DOORBELL,
  286. 4,
  287. true,
  288. (posn << 16) | i,
  289. &s->peers[posn].eventfds[i]);
  290. }
  291. static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
  292. {
  293. memory_region_del_eventfd(&s->ivshmem_mmio,
  294. DOORBELL,
  295. 4,
  296. true,
  297. (posn << 16) | i,
  298. &s->peers[posn].eventfds[i]);
  299. }
  300. static void close_guest_eventfds(IVShmemState *s, int posn)
  301. {
  302. int i, guest_curr_max;
  303. if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
  304. return;
  305. }
  306. guest_curr_max = s->peers[posn].nb_eventfds;
  307. memory_region_transaction_begin();
  308. for (i = 0; i < guest_curr_max; i++) {
  309. ivshmem_del_eventfd(s, posn, i);
  310. }
  311. memory_region_transaction_commit();
  312. for (i = 0; i < guest_curr_max; i++) {
  313. event_notifier_cleanup(&s->peers[posn].eventfds[i]);
  314. }
  315. g_free(s->peers[posn].eventfds);
  316. s->peers[posn].nb_eventfds = 0;
  317. }
  318. /* this function increase the dynamic storage need to store data about other
  319. * guests */
  320. static void increase_dynamic_storage(IVShmemState *s, int new_min_size) {
  321. int j, old_nb_alloc;
  322. old_nb_alloc = s->nb_peers;
  323. while (new_min_size >= s->nb_peers)
  324. s->nb_peers = s->nb_peers * 2;
  325. IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
  326. s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
  327. /* zero out new pointers */
  328. for (j = old_nb_alloc; j < s->nb_peers; j++) {
  329. s->peers[j].eventfds = NULL;
  330. s->peers[j].nb_eventfds = 0;
  331. }
  332. }
  333. static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
  334. {
  335. IVShmemState *s = opaque;
  336. int incoming_fd, tmp_fd;
  337. int guest_max_eventfd;
  338. long incoming_posn;
  339. memcpy(&incoming_posn, buf, sizeof(long));
  340. /* pick off s->server_chr->msgfd and store it, posn should accompany msg */
  341. tmp_fd = qemu_chr_fe_get_msgfd(s->server_chr);
  342. IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
  343. /* make sure we have enough space for this guest */
  344. if (incoming_posn >= s->nb_peers) {
  345. increase_dynamic_storage(s, incoming_posn);
  346. }
  347. if (tmp_fd == -1) {
  348. /* if posn is positive and unseen before then this is our posn*/
  349. if ((incoming_posn >= 0) &&
  350. (s->peers[incoming_posn].eventfds == NULL)) {
  351. /* receive our posn */
  352. s->vm_id = incoming_posn;
  353. return;
  354. } else {
  355. /* otherwise an fd == -1 means an existing guest has gone away */
  356. IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
  357. close_guest_eventfds(s, incoming_posn);
  358. return;
  359. }
  360. }
  361. /* because of the implementation of get_msgfd, we need a dup */
  362. incoming_fd = dup(tmp_fd);
  363. if (incoming_fd == -1) {
  364. fprintf(stderr, "could not allocate file descriptor %s\n",
  365. strerror(errno));
  366. return;
  367. }
  368. /* if the position is -1, then it's shared memory region fd */
  369. if (incoming_posn == -1) {
  370. void * map_ptr;
  371. s->max_peer = 0;
  372. if (check_shm_size(s, incoming_fd) == -1) {
  373. exit(-1);
  374. }
  375. /* mmap the region and map into the BAR2 */
  376. map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
  377. incoming_fd, 0);
  378. memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
  379. "ivshmem.bar2", s->ivshmem_size, map_ptr);
  380. vmstate_register_ram(&s->ivshmem, DEVICE(s));
  381. IVSHMEM_DPRINTF("guest h/w addr = %" PRIu64 ", size = %" PRIu64 "\n",
  382. s->ivshmem_offset, s->ivshmem_size);
  383. memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
  384. /* only store the fd if it is successfully mapped */
  385. s->shm_fd = incoming_fd;
  386. return;
  387. }
  388. /* each guest has an array of eventfds, and we keep track of how many
  389. * guests for each VM */
  390. guest_max_eventfd = s->peers[incoming_posn].nb_eventfds;
  391. if (guest_max_eventfd == 0) {
  392. /* one eventfd per MSI vector */
  393. s->peers[incoming_posn].eventfds = g_new(EventNotifier, s->vectors);
  394. }
  395. /* this is an eventfd for a particular guest VM */
  396. IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
  397. guest_max_eventfd, incoming_fd);
  398. event_notifier_init_fd(&s->peers[incoming_posn].eventfds[guest_max_eventfd],
  399. incoming_fd);
  400. /* increment count for particular guest */
  401. s->peers[incoming_posn].nb_eventfds++;
  402. /* keep track of the maximum VM ID */
  403. if (incoming_posn > s->max_peer) {
  404. s->max_peer = incoming_posn;
  405. }
  406. if (incoming_posn == s->vm_id) {
  407. s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s,
  408. &s->peers[s->vm_id].eventfds[guest_max_eventfd],
  409. guest_max_eventfd);
  410. }
  411. if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
  412. ivshmem_add_eventfd(s, incoming_posn, guest_max_eventfd);
  413. }
  414. }
  415. /* Select the MSI-X vectors used by device.
  416. * ivshmem maps events to vectors statically, so
  417. * we just enable all vectors on init and after reset. */
  418. static void ivshmem_use_msix(IVShmemState * s)
  419. {
  420. PCIDevice *d = PCI_DEVICE(s);
  421. int i;
  422. if (!msix_present(d)) {
  423. return;
  424. }
  425. for (i = 0; i < s->vectors; i++) {
  426. msix_vector_use(d, i);
  427. }
  428. }
  429. static void ivshmem_reset(DeviceState *d)
  430. {
  431. IVShmemState *s = IVSHMEM(d);
  432. s->intrstatus = 0;
  433. ivshmem_use_msix(s);
  434. }
  435. static uint64_t ivshmem_get_size(IVShmemState * s) {
  436. uint64_t value;
  437. char *ptr;
  438. value = strtoull(s->sizearg, &ptr, 10);
  439. switch (*ptr) {
  440. case 0: case 'M': case 'm':
  441. value <<= 20;
  442. break;
  443. case 'G': case 'g':
  444. value <<= 30;
  445. break;
  446. default:
  447. fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
  448. exit(1);
  449. }
  450. /* BARs must be a power of 2 */
  451. if (!is_power_of_two(value)) {
  452. fprintf(stderr, "ivshmem: size must be power of 2\n");
  453. exit(1);
  454. }
  455. return value;
  456. }
  457. static void ivshmem_setup_msi(IVShmemState * s)
  458. {
  459. if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
  460. IVSHMEM_DPRINTF("msix initialization failed\n");
  461. exit(1);
  462. }
  463. IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
  464. /* allocate QEMU char devices for receiving interrupts */
  465. s->eventfd_table = g_malloc0(s->vectors * sizeof(EventfdEntry));
  466. ivshmem_use_msix(s);
  467. }
  468. static void ivshmem_save(QEMUFile* f, void *opaque)
  469. {
  470. IVShmemState *proxy = opaque;
  471. PCIDevice *pci_dev = PCI_DEVICE(proxy);
  472. IVSHMEM_DPRINTF("ivshmem_save\n");
  473. pci_device_save(pci_dev, f);
  474. if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
  475. msix_save(pci_dev, f);
  476. } else {
  477. qemu_put_be32(f, proxy->intrstatus);
  478. qemu_put_be32(f, proxy->intrmask);
  479. }
  480. }
  481. static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
  482. {
  483. IVSHMEM_DPRINTF("ivshmem_load\n");
  484. IVShmemState *proxy = opaque;
  485. PCIDevice *pci_dev = PCI_DEVICE(proxy);
  486. int ret;
  487. if (version_id > 0) {
  488. return -EINVAL;
  489. }
  490. if (proxy->role_val == IVSHMEM_PEER) {
  491. fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
  492. return -EINVAL;
  493. }
  494. ret = pci_device_load(pci_dev, f);
  495. if (ret) {
  496. return ret;
  497. }
  498. if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
  499. msix_load(pci_dev, f);
  500. ivshmem_use_msix(proxy);
  501. } else {
  502. proxy->intrstatus = qemu_get_be32(f);
  503. proxy->intrmask = qemu_get_be32(f);
  504. }
  505. return 0;
  506. }
  507. static void ivshmem_write_config(PCIDevice *pci_dev, uint32_t address,
  508. uint32_t val, int len)
  509. {
  510. pci_default_write_config(pci_dev, address, val, len);
  511. msix_write_config(pci_dev, address, val, len);
  512. }
  513. static int pci_ivshmem_init(PCIDevice *dev)
  514. {
  515. IVShmemState *s = IVSHMEM(dev);
  516. uint8_t *pci_conf;
  517. if (s->sizearg == NULL)
  518. s->ivshmem_size = 4 << 20; /* 4 MB default */
  519. else {
  520. s->ivshmem_size = ivshmem_get_size(s);
  521. }
  522. register_savevm(DEVICE(dev), "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
  523. dev);
  524. /* IRQFD requires MSI */
  525. if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
  526. !ivshmem_has_feature(s, IVSHMEM_MSI)) {
  527. fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
  528. exit(1);
  529. }
  530. /* check that role is reasonable */
  531. if (s->role) {
  532. if (strncmp(s->role, "peer", 5) == 0) {
  533. s->role_val = IVSHMEM_PEER;
  534. } else if (strncmp(s->role, "master", 7) == 0) {
  535. s->role_val = IVSHMEM_MASTER;
  536. } else {
  537. fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
  538. exit(1);
  539. }
  540. } else {
  541. s->role_val = IVSHMEM_MASTER; /* default */
  542. }
  543. if (s->role_val == IVSHMEM_PEER) {
  544. error_set(&s->migration_blocker, QERR_DEVICE_FEATURE_BLOCKS_MIGRATION,
  545. "peer mode", "ivshmem");
  546. migrate_add_blocker(s->migration_blocker);
  547. }
  548. pci_conf = dev->config;
  549. pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
  550. pci_config_set_interrupt_pin(pci_conf, 1);
  551. s->shm_fd = 0;
  552. memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
  553. "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
  554. /* region for registers*/
  555. pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
  556. &s->ivshmem_mmio);
  557. memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
  558. s->ivshmem_attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
  559. PCI_BASE_ADDRESS_MEM_PREFETCH;
  560. if (s->ivshmem_64bit) {
  561. s->ivshmem_attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
  562. }
  563. if ((s->server_chr != NULL) &&
  564. (strncmp(s->server_chr->filename, "unix:", 5) == 0)) {
  565. /* if we get a UNIX socket as the parameter we will talk
  566. * to the ivshmem server to receive the memory region */
  567. if (s->shmobj != NULL) {
  568. fprintf(stderr, "WARNING: do not specify both 'chardev' "
  569. "and 'shm' with ivshmem\n");
  570. }
  571. IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
  572. s->server_chr->filename);
  573. if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
  574. ivshmem_setup_msi(s);
  575. }
  576. /* we allocate enough space for 16 guests and grow as needed */
  577. s->nb_peers = 16;
  578. s->vm_id = -1;
  579. /* allocate/initialize space for interrupt handling */
  580. s->peers = g_malloc0(s->nb_peers * sizeof(Peer));
  581. pci_register_bar(dev, 2, s->ivshmem_attr, &s->bar);
  582. s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
  583. qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
  584. ivshmem_event, s);
  585. } else {
  586. /* just map the file immediately, we're not using a server */
  587. int fd;
  588. if (s->shmobj == NULL) {
  589. fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
  590. exit(1);
  591. }
  592. IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
  593. /* try opening with O_EXCL and if it succeeds zero the memory
  594. * by truncating to 0 */
  595. if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
  596. S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
  597. /* truncate file to length PCI device's memory */
  598. if (ftruncate(fd, s->ivshmem_size) != 0) {
  599. fprintf(stderr, "ivshmem: could not truncate shared file\n");
  600. }
  601. } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
  602. S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
  603. fprintf(stderr, "ivshmem: could not open shared file\n");
  604. exit(-1);
  605. }
  606. if (check_shm_size(s, fd) == -1) {
  607. exit(-1);
  608. }
  609. create_shared_memory_BAR(s, fd);
  610. }
  611. dev->config_write = ivshmem_write_config;
  612. return 0;
  613. }
  614. static void pci_ivshmem_uninit(PCIDevice *dev)
  615. {
  616. IVShmemState *s = IVSHMEM(dev);
  617. if (s->migration_blocker) {
  618. migrate_del_blocker(s->migration_blocker);
  619. error_free(s->migration_blocker);
  620. }
  621. memory_region_destroy(&s->ivshmem_mmio);
  622. memory_region_del_subregion(&s->bar, &s->ivshmem);
  623. vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
  624. memory_region_destroy(&s->ivshmem);
  625. memory_region_destroy(&s->bar);
  626. unregister_savevm(DEVICE(dev), "ivshmem", s);
  627. }
  628. static Property ivshmem_properties[] = {
  629. DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
  630. DEFINE_PROP_STRING("size", IVShmemState, sizearg),
  631. DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
  632. DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
  633. DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
  634. DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
  635. DEFINE_PROP_STRING("role", IVShmemState, role),
  636. DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
  637. DEFINE_PROP_END_OF_LIST(),
  638. };
  639. static void ivshmem_class_init(ObjectClass *klass, void *data)
  640. {
  641. DeviceClass *dc = DEVICE_CLASS(klass);
  642. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  643. k->init = pci_ivshmem_init;
  644. k->exit = pci_ivshmem_uninit;
  645. k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
  646. k->device_id = PCI_DEVICE_ID_IVSHMEM;
  647. k->class_id = PCI_CLASS_MEMORY_RAM;
  648. dc->reset = ivshmem_reset;
  649. dc->props = ivshmem_properties;
  650. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  651. }
  652. static const TypeInfo ivshmem_info = {
  653. .name = TYPE_IVSHMEM,
  654. .parent = TYPE_PCI_DEVICE,
  655. .instance_size = sizeof(IVShmemState),
  656. .class_init = ivshmem_class_init,
  657. };
  658. static void ivshmem_register_types(void)
  659. {
  660. type_register_static(&ivshmem_info);
  661. }
  662. type_init(ivshmem_register_types)