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arm_integrator_debug.c 2.9 KB

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  1. /*
  2. * LED, Switch and Debug control registers for ARM Integrator Boards
  3. *
  4. * This is currently a stub for this functionality but at least
  5. * ensures something other than unassigned_mem_read() handles access
  6. * to this area.
  7. *
  8. * The real h/w is described at:
  9. * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
  10. *
  11. * Copyright (c) 2013 Alex Bennée <alex@bennee.com>
  12. *
  13. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  14. * See the COPYING file in the top-level directory.
  15. */
  16. #include "hw/hw.h"
  17. #include "hw/sysbus.h"
  18. #include "exec/address-spaces.h"
  19. #include "hw/misc/arm_integrator_debug.h"
  20. #define INTEGRATOR_DEBUG(obj) \
  21. OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG)
  22. typedef struct {
  23. SysBusDevice parent_obj;
  24. MemoryRegion iomem;
  25. } IntegratorDebugState;
  26. static uint64_t intdbg_control_read(void *opaque, hwaddr offset,
  27. unsigned size)
  28. {
  29. switch (offset >> 2) {
  30. case 0: /* ALPHA */
  31. case 1: /* LEDS */
  32. case 2: /* SWITCHES */
  33. qemu_log_mask(LOG_UNIMP,
  34. "%s: returning zero from %" HWADDR_PRIx ":%u\n",
  35. __func__, offset, size);
  36. return 0;
  37. default:
  38. qemu_log_mask(LOG_GUEST_ERROR,
  39. "%s: Bad offset %" HWADDR_PRIx,
  40. __func__, offset);
  41. return 0;
  42. }
  43. }
  44. static void intdbg_control_write(void *opaque, hwaddr offset,
  45. uint64_t value, unsigned size)
  46. {
  47. switch (offset >> 2) {
  48. case 1: /* ALPHA */
  49. case 2: /* LEDS */
  50. case 3: /* SWITCHES */
  51. /* Nothing interesting implemented yet. */
  52. qemu_log_mask(LOG_UNIMP,
  53. "%s: ignoring write of %" PRIu64
  54. " to %" HWADDR_PRIx ":%u\n",
  55. __func__, value, offset, size);
  56. break;
  57. default:
  58. qemu_log_mask(LOG_GUEST_ERROR,
  59. "%s: write of %" PRIu64
  60. " to bad offset %" HWADDR_PRIx "\n",
  61. __func__, value, offset);
  62. }
  63. }
  64. static const MemoryRegionOps intdbg_control_ops = {
  65. .read = intdbg_control_read,
  66. .write = intdbg_control_write,
  67. .endianness = DEVICE_NATIVE_ENDIAN,
  68. };
  69. static void intdbg_control_init(Object *obj)
  70. {
  71. SysBusDevice *sd = SYS_BUS_DEVICE(obj);
  72. IntegratorDebugState *s = INTEGRATOR_DEBUG(obj);
  73. memory_region_init_io(&s->iomem, NULL, &intdbg_control_ops,
  74. NULL, "dbg-leds", 0x1000000);
  75. sysbus_init_mmio(sd, &s->iomem);
  76. }
  77. static const TypeInfo intdbg_info = {
  78. .name = TYPE_INTEGRATOR_DEBUG,
  79. .parent = TYPE_SYS_BUS_DEVICE,
  80. .instance_size = sizeof(IntegratorDebugState),
  81. .instance_init = intdbg_control_init,
  82. };
  83. static void intdbg_register_types(void)
  84. {
  85. type_register_static(&intdbg_info);
  86. }
  87. type_init(intdbg_register_types)