blizzard.c 28 KB

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  1. /*
  2. * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) version 3 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu-common.h"
  21. #include "ui/console.h"
  22. #include "hw/devices.h"
  23. #include "vga_int.h"
  24. #include "ui/pixel_ops.h"
  25. typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
  26. typedef struct {
  27. uint8_t reg;
  28. uint32_t addr;
  29. int swallow;
  30. int pll;
  31. int pll_range;
  32. int pll_ctrl;
  33. uint8_t pll_mode;
  34. uint8_t clksel;
  35. int memenable;
  36. int memrefresh;
  37. uint8_t timing[3];
  38. int priority;
  39. uint8_t lcd_config;
  40. int x;
  41. int y;
  42. int skipx;
  43. int skipy;
  44. uint8_t hndp;
  45. uint8_t vndp;
  46. uint8_t hsync;
  47. uint8_t vsync;
  48. uint8_t pclk;
  49. uint8_t u;
  50. uint8_t v;
  51. uint8_t yrc[2];
  52. int ix[2];
  53. int iy[2];
  54. int ox[2];
  55. int oy[2];
  56. int enable;
  57. int blank;
  58. int bpp;
  59. int invalidate;
  60. int mx[2];
  61. int my[2];
  62. uint8_t mode;
  63. uint8_t effect;
  64. uint8_t iformat;
  65. uint8_t source;
  66. QemuConsole *con;
  67. blizzard_fn_t *line_fn_tab[2];
  68. void *fb;
  69. uint8_t hssi_config[3];
  70. uint8_t tv_config;
  71. uint8_t tv_timing[4];
  72. uint8_t vbi;
  73. uint8_t tv_x;
  74. uint8_t tv_y;
  75. uint8_t tv_test;
  76. uint8_t tv_filter_config;
  77. uint8_t tv_filter_idx;
  78. uint8_t tv_filter_coeff[0x20];
  79. uint8_t border_r;
  80. uint8_t border_g;
  81. uint8_t border_b;
  82. uint8_t gamma_config;
  83. uint8_t gamma_idx;
  84. uint8_t gamma_lut[0x100];
  85. uint8_t matrix_ena;
  86. uint8_t matrix_coeff[0x12];
  87. uint8_t matrix_r;
  88. uint8_t matrix_g;
  89. uint8_t matrix_b;
  90. uint8_t pm;
  91. uint8_t status;
  92. uint8_t rgbgpio_dir;
  93. uint8_t rgbgpio;
  94. uint8_t gpio_dir;
  95. uint8_t gpio;
  96. uint8_t gpio_edge[2];
  97. uint8_t gpio_irq;
  98. uint8_t gpio_pdown;
  99. struct {
  100. int x;
  101. int y;
  102. int dx;
  103. int dy;
  104. int len;
  105. int buflen;
  106. void *buf;
  107. void *data;
  108. uint16_t *ptr;
  109. int angle;
  110. int pitch;
  111. blizzard_fn_t line_fn;
  112. } data;
  113. } BlizzardState;
  114. /* Bytes(!) per pixel */
  115. static const int blizzard_iformat_bpp[0x10] = {
  116. 0,
  117. 2, /* RGB 5:6:5*/
  118. 3, /* RGB 6:6:6 mode 1 */
  119. 3, /* RGB 8:8:8 mode 1 */
  120. 0, 0,
  121. 4, /* RGB 6:6:6 mode 2 */
  122. 4, /* RGB 8:8:8 mode 2 */
  123. 0, /* YUV 4:2:2 */
  124. 0, /* YUV 4:2:0 */
  125. 0, 0, 0, 0, 0, 0,
  126. };
  127. static inline void blizzard_rgb2yuv(int r, int g, int b,
  128. int *y, int *u, int *v)
  129. {
  130. *y = 0x10 + ((0x838 * r + 0x1022 * g + 0x322 * b) >> 13);
  131. *u = 0x80 + ((0xe0e * b - 0x04c1 * r - 0x94e * g) >> 13);
  132. *v = 0x80 + ((0xe0e * r - 0x0bc7 * g - 0x247 * b) >> 13);
  133. }
  134. static void blizzard_window(BlizzardState *s)
  135. {
  136. DisplaySurface *surface = qemu_console_surface(s->con);
  137. uint8_t *src, *dst;
  138. int bypp[2];
  139. int bypl[3];
  140. int y;
  141. blizzard_fn_t fn = s->data.line_fn;
  142. if (!fn)
  143. return;
  144. if (s->mx[0] > s->data.x)
  145. s->mx[0] = s->data.x;
  146. if (s->my[0] > s->data.y)
  147. s->my[0] = s->data.y;
  148. if (s->mx[1] < s->data.x + s->data.dx)
  149. s->mx[1] = s->data.x + s->data.dx;
  150. if (s->my[1] < s->data.y + s->data.dy)
  151. s->my[1] = s->data.y + s->data.dy;
  152. bypp[0] = s->bpp;
  153. bypp[1] = surface_bytes_per_pixel(surface);
  154. bypl[0] = bypp[0] * s->data.pitch;
  155. bypl[1] = bypp[1] * s->x;
  156. bypl[2] = bypp[0] * s->data.dx;
  157. src = s->data.data;
  158. dst = s->fb + bypl[1] * s->data.y + bypp[1] * s->data.x;
  159. for (y = s->data.dy; y > 0; y --, src += bypl[0], dst += bypl[1])
  160. fn(dst, src, bypl[2]);
  161. }
  162. static int blizzard_transfer_setup(BlizzardState *s)
  163. {
  164. if (s->source > 3 || !s->bpp ||
  165. s->ix[1] < s->ix[0] || s->iy[1] < s->iy[0])
  166. return 0;
  167. s->data.angle = s->effect & 3;
  168. s->data.line_fn = s->line_fn_tab[!!s->data.angle][s->iformat];
  169. s->data.x = s->ix[0];
  170. s->data.y = s->iy[0];
  171. s->data.dx = s->ix[1] - s->ix[0] + 1;
  172. s->data.dy = s->iy[1] - s->iy[0] + 1;
  173. s->data.len = s->bpp * s->data.dx * s->data.dy;
  174. s->data.pitch = s->data.dx;
  175. if (s->data.len > s->data.buflen) {
  176. s->data.buf = g_realloc(s->data.buf, s->data.len);
  177. s->data.buflen = s->data.len;
  178. }
  179. s->data.ptr = s->data.buf;
  180. s->data.data = s->data.buf;
  181. s->data.len /= 2;
  182. return 1;
  183. }
  184. static void blizzard_reset(BlizzardState *s)
  185. {
  186. s->reg = 0;
  187. s->swallow = 0;
  188. s->pll = 9;
  189. s->pll_range = 1;
  190. s->pll_ctrl = 0x14;
  191. s->pll_mode = 0x32;
  192. s->clksel = 0x00;
  193. s->memenable = 0;
  194. s->memrefresh = 0x25c;
  195. s->timing[0] = 0x3f;
  196. s->timing[1] = 0x13;
  197. s->timing[2] = 0x21;
  198. s->priority = 0;
  199. s->lcd_config = 0x74;
  200. s->x = 8;
  201. s->y = 1;
  202. s->skipx = 0;
  203. s->skipy = 0;
  204. s->hndp = 3;
  205. s->vndp = 2;
  206. s->hsync = 1;
  207. s->vsync = 1;
  208. s->pclk = 0x80;
  209. s->ix[0] = 0;
  210. s->ix[1] = 0;
  211. s->iy[0] = 0;
  212. s->iy[1] = 0;
  213. s->ox[0] = 0;
  214. s->ox[1] = 0;
  215. s->oy[0] = 0;
  216. s->oy[1] = 0;
  217. s->yrc[0] = 0x00;
  218. s->yrc[1] = 0x30;
  219. s->u = 0;
  220. s->v = 0;
  221. s->iformat = 3;
  222. s->source = 0;
  223. s->bpp = blizzard_iformat_bpp[s->iformat];
  224. s->hssi_config[0] = 0x00;
  225. s->hssi_config[1] = 0x00;
  226. s->hssi_config[2] = 0x01;
  227. s->tv_config = 0x00;
  228. s->tv_timing[0] = 0x00;
  229. s->tv_timing[1] = 0x00;
  230. s->tv_timing[2] = 0x00;
  231. s->tv_timing[3] = 0x00;
  232. s->vbi = 0x10;
  233. s->tv_x = 0x14;
  234. s->tv_y = 0x03;
  235. s->tv_test = 0x00;
  236. s->tv_filter_config = 0x80;
  237. s->tv_filter_idx = 0x00;
  238. s->border_r = 0x10;
  239. s->border_g = 0x80;
  240. s->border_b = 0x80;
  241. s->gamma_config = 0x00;
  242. s->gamma_idx = 0x00;
  243. s->matrix_ena = 0x00;
  244. memset(&s->matrix_coeff, 0, sizeof(s->matrix_coeff));
  245. s->matrix_r = 0x00;
  246. s->matrix_g = 0x00;
  247. s->matrix_b = 0x00;
  248. s->pm = 0x02;
  249. s->status = 0x00;
  250. s->rgbgpio_dir = 0x00;
  251. s->gpio_dir = 0x00;
  252. s->gpio_edge[0] = 0x00;
  253. s->gpio_edge[1] = 0x00;
  254. s->gpio_irq = 0x00;
  255. s->gpio_pdown = 0xff;
  256. }
  257. static inline void blizzard_invalidate_display(void *opaque) {
  258. BlizzardState *s = (BlizzardState *) opaque;
  259. s->invalidate = 1;
  260. }
  261. static uint16_t blizzard_reg_read(void *opaque, uint8_t reg)
  262. {
  263. BlizzardState *s = (BlizzardState *) opaque;
  264. switch (reg) {
  265. case 0x00: /* Revision Code */
  266. return 0xa5;
  267. case 0x02: /* Configuration Readback */
  268. return 0x83; /* Macrovision OK, CNF[2:0] = 3 */
  269. case 0x04: /* PLL M-Divider */
  270. return (s->pll - 1) | (1 << 7);
  271. case 0x06: /* PLL Lock Range Control */
  272. return s->pll_range;
  273. case 0x08: /* PLL Lock Synthesis Control 0 */
  274. return s->pll_ctrl & 0xff;
  275. case 0x0a: /* PLL Lock Synthesis Control 1 */
  276. return s->pll_ctrl >> 8;
  277. case 0x0c: /* PLL Mode Control 0 */
  278. return s->pll_mode;
  279. case 0x0e: /* Clock-Source Select */
  280. return s->clksel;
  281. case 0x10: /* Memory Controller Activate */
  282. case 0x14: /* Memory Controller Bank 0 Status Flag */
  283. return s->memenable;
  284. case 0x18: /* Auto-Refresh Interval Setting 0 */
  285. return s->memrefresh & 0xff;
  286. case 0x1a: /* Auto-Refresh Interval Setting 1 */
  287. return s->memrefresh >> 8;
  288. case 0x1c: /* Power-On Sequence Timing Control */
  289. return s->timing[0];
  290. case 0x1e: /* Timing Control 0 */
  291. return s->timing[1];
  292. case 0x20: /* Timing Control 1 */
  293. return s->timing[2];
  294. case 0x24: /* Arbitration Priority Control */
  295. return s->priority;
  296. case 0x28: /* LCD Panel Configuration */
  297. return s->lcd_config;
  298. case 0x2a: /* LCD Horizontal Display Width */
  299. return s->x >> 3;
  300. case 0x2c: /* LCD Horizontal Non-display Period */
  301. return s->hndp;
  302. case 0x2e: /* LCD Vertical Display Height 0 */
  303. return s->y & 0xff;
  304. case 0x30: /* LCD Vertical Display Height 1 */
  305. return s->y >> 8;
  306. case 0x32: /* LCD Vertical Non-display Period */
  307. return s->vndp;
  308. case 0x34: /* LCD HS Pulse-width */
  309. return s->hsync;
  310. case 0x36: /* LCd HS Pulse Start Position */
  311. return s->skipx >> 3;
  312. case 0x38: /* LCD VS Pulse-width */
  313. return s->vsync;
  314. case 0x3a: /* LCD VS Pulse Start Position */
  315. return s->skipy;
  316. case 0x3c: /* PCLK Polarity */
  317. return s->pclk;
  318. case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
  319. return s->hssi_config[0];
  320. case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
  321. return s->hssi_config[1];
  322. case 0x42: /* High-speed Serial Interface Tx Mode */
  323. return s->hssi_config[2];
  324. case 0x44: /* TV Display Configuration */
  325. return s->tv_config;
  326. case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits */
  327. return s->tv_timing[(reg - 0x46) >> 1];
  328. case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
  329. return s->vbi;
  330. case 0x50: /* TV Horizontal Start Position */
  331. return s->tv_x;
  332. case 0x52: /* TV Vertical Start Position */
  333. return s->tv_y;
  334. case 0x54: /* TV Test Pattern Setting */
  335. return s->tv_test;
  336. case 0x56: /* TV Filter Setting */
  337. return s->tv_filter_config;
  338. case 0x58: /* TV Filter Coefficient Index */
  339. return s->tv_filter_idx;
  340. case 0x5a: /* TV Filter Coefficient Data */
  341. if (s->tv_filter_idx < 0x20)
  342. return s->tv_filter_coeff[s->tv_filter_idx ++];
  343. return 0;
  344. case 0x60: /* Input YUV/RGB Translate Mode 0 */
  345. return s->yrc[0];
  346. case 0x62: /* Input YUV/RGB Translate Mode 1 */
  347. return s->yrc[1];
  348. case 0x64: /* U Data Fix */
  349. return s->u;
  350. case 0x66: /* V Data Fix */
  351. return s->v;
  352. case 0x68: /* Display Mode */
  353. return s->mode;
  354. case 0x6a: /* Special Effects */
  355. return s->effect;
  356. case 0x6c: /* Input Window X Start Position 0 */
  357. return s->ix[0] & 0xff;
  358. case 0x6e: /* Input Window X Start Position 1 */
  359. return s->ix[0] >> 3;
  360. case 0x70: /* Input Window Y Start Position 0 */
  361. return s->ix[0] & 0xff;
  362. case 0x72: /* Input Window Y Start Position 1 */
  363. return s->ix[0] >> 3;
  364. case 0x74: /* Input Window X End Position 0 */
  365. return s->ix[1] & 0xff;
  366. case 0x76: /* Input Window X End Position 1 */
  367. return s->ix[1] >> 3;
  368. case 0x78: /* Input Window Y End Position 0 */
  369. return s->ix[1] & 0xff;
  370. case 0x7a: /* Input Window Y End Position 1 */
  371. return s->ix[1] >> 3;
  372. case 0x7c: /* Output Window X Start Position 0 */
  373. return s->ox[0] & 0xff;
  374. case 0x7e: /* Output Window X Start Position 1 */
  375. return s->ox[0] >> 3;
  376. case 0x80: /* Output Window Y Start Position 0 */
  377. return s->oy[0] & 0xff;
  378. case 0x82: /* Output Window Y Start Position 1 */
  379. return s->oy[0] >> 3;
  380. case 0x84: /* Output Window X End Position 0 */
  381. return s->ox[1] & 0xff;
  382. case 0x86: /* Output Window X End Position 1 */
  383. return s->ox[1] >> 3;
  384. case 0x88: /* Output Window Y End Position 0 */
  385. return s->oy[1] & 0xff;
  386. case 0x8a: /* Output Window Y End Position 1 */
  387. return s->oy[1] >> 3;
  388. case 0x8c: /* Input Data Format */
  389. return s->iformat;
  390. case 0x8e: /* Data Source Select */
  391. return s->source;
  392. case 0x90: /* Display Memory Data Port */
  393. return 0;
  394. case 0xa8: /* Border Color 0 */
  395. return s->border_r;
  396. case 0xaa: /* Border Color 1 */
  397. return s->border_g;
  398. case 0xac: /* Border Color 2 */
  399. return s->border_b;
  400. case 0xb4: /* Gamma Correction Enable */
  401. return s->gamma_config;
  402. case 0xb6: /* Gamma Correction Table Index */
  403. return s->gamma_idx;
  404. case 0xb8: /* Gamma Correction Table Data */
  405. return s->gamma_lut[s->gamma_idx ++];
  406. case 0xba: /* 3x3 Matrix Enable */
  407. return s->matrix_ena;
  408. case 0xbc ... 0xde: /* Coefficient Registers */
  409. return s->matrix_coeff[(reg - 0xbc) >> 1];
  410. case 0xe0: /* 3x3 Matrix Red Offset */
  411. return s->matrix_r;
  412. case 0xe2: /* 3x3 Matrix Green Offset */
  413. return s->matrix_g;
  414. case 0xe4: /* 3x3 Matrix Blue Offset */
  415. return s->matrix_b;
  416. case 0xe6: /* Power-save */
  417. return s->pm;
  418. case 0xe8: /* Non-display Period Control / Status */
  419. return s->status | (1 << 5);
  420. case 0xea: /* RGB Interface Control */
  421. return s->rgbgpio_dir;
  422. case 0xec: /* RGB Interface Status */
  423. return s->rgbgpio;
  424. case 0xee: /* General-purpose IO Pins Configuration */
  425. return s->gpio_dir;
  426. case 0xf0: /* General-purpose IO Pins Status / Control */
  427. return s->gpio;
  428. case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
  429. return s->gpio_edge[0];
  430. case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
  431. return s->gpio_edge[1];
  432. case 0xf6: /* GPIO Interrupt Status */
  433. return s->gpio_irq;
  434. case 0xf8: /* GPIO Pull-down Control */
  435. return s->gpio_pdown;
  436. default:
  437. fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
  438. return 0;
  439. }
  440. }
  441. static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
  442. {
  443. BlizzardState *s = (BlizzardState *) opaque;
  444. switch (reg) {
  445. case 0x04: /* PLL M-Divider */
  446. s->pll = (value & 0x3f) + 1;
  447. break;
  448. case 0x06: /* PLL Lock Range Control */
  449. s->pll_range = value & 3;
  450. break;
  451. case 0x08: /* PLL Lock Synthesis Control 0 */
  452. s->pll_ctrl &= 0xf00;
  453. s->pll_ctrl |= (value << 0) & 0x0ff;
  454. break;
  455. case 0x0a: /* PLL Lock Synthesis Control 1 */
  456. s->pll_ctrl &= 0x0ff;
  457. s->pll_ctrl |= (value << 8) & 0xf00;
  458. break;
  459. case 0x0c: /* PLL Mode Control 0 */
  460. s->pll_mode = value & 0x77;
  461. if ((value & 3) == 0 || (value & 3) == 3)
  462. fprintf(stderr, "%s: wrong PLL Control bits (%i)\n",
  463. __FUNCTION__, value & 3);
  464. break;
  465. case 0x0e: /* Clock-Source Select */
  466. s->clksel = value & 0xff;
  467. break;
  468. case 0x10: /* Memory Controller Activate */
  469. s->memenable = value & 1;
  470. break;
  471. case 0x14: /* Memory Controller Bank 0 Status Flag */
  472. break;
  473. case 0x18: /* Auto-Refresh Interval Setting 0 */
  474. s->memrefresh &= 0xf00;
  475. s->memrefresh |= (value << 0) & 0x0ff;
  476. break;
  477. case 0x1a: /* Auto-Refresh Interval Setting 1 */
  478. s->memrefresh &= 0x0ff;
  479. s->memrefresh |= (value << 8) & 0xf00;
  480. break;
  481. case 0x1c: /* Power-On Sequence Timing Control */
  482. s->timing[0] = value & 0x7f;
  483. break;
  484. case 0x1e: /* Timing Control 0 */
  485. s->timing[1] = value & 0x17;
  486. break;
  487. case 0x20: /* Timing Control 1 */
  488. s->timing[2] = value & 0x35;
  489. break;
  490. case 0x24: /* Arbitration Priority Control */
  491. s->priority = value & 1;
  492. break;
  493. case 0x28: /* LCD Panel Configuration */
  494. s->lcd_config = value & 0xff;
  495. if (value & (1 << 7))
  496. fprintf(stderr, "%s: data swap not supported!\n", __FUNCTION__);
  497. break;
  498. case 0x2a: /* LCD Horizontal Display Width */
  499. s->x = value << 3;
  500. break;
  501. case 0x2c: /* LCD Horizontal Non-display Period */
  502. s->hndp = value & 0xff;
  503. break;
  504. case 0x2e: /* LCD Vertical Display Height 0 */
  505. s->y &= 0x300;
  506. s->y |= (value << 0) & 0x0ff;
  507. break;
  508. case 0x30: /* LCD Vertical Display Height 1 */
  509. s->y &= 0x0ff;
  510. s->y |= (value << 8) & 0x300;
  511. break;
  512. case 0x32: /* LCD Vertical Non-display Period */
  513. s->vndp = value & 0xff;
  514. break;
  515. case 0x34: /* LCD HS Pulse-width */
  516. s->hsync = value & 0xff;
  517. break;
  518. case 0x36: /* LCD HS Pulse Start Position */
  519. s->skipx = value & 0xff;
  520. break;
  521. case 0x38: /* LCD VS Pulse-width */
  522. s->vsync = value & 0xbf;
  523. break;
  524. case 0x3a: /* LCD VS Pulse Start Position */
  525. s->skipy = value & 0xff;
  526. break;
  527. case 0x3c: /* PCLK Polarity */
  528. s->pclk = value & 0x82;
  529. /* Affects calculation of s->hndp, s->hsync and s->skipx. */
  530. break;
  531. case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
  532. s->hssi_config[0] = value;
  533. break;
  534. case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
  535. s->hssi_config[1] = value;
  536. if (((value >> 4) & 3) == 3)
  537. fprintf(stderr, "%s: Illegal active-data-links value\n",
  538. __FUNCTION__);
  539. break;
  540. case 0x42: /* High-speed Serial Interface Tx Mode */
  541. s->hssi_config[2] = value & 0xbd;
  542. break;
  543. case 0x44: /* TV Display Configuration */
  544. s->tv_config = value & 0xfe;
  545. break;
  546. case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits 0 */
  547. s->tv_timing[(reg - 0x46) >> 1] = value;
  548. break;
  549. case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
  550. s->vbi = value;
  551. break;
  552. case 0x50: /* TV Horizontal Start Position */
  553. s->tv_x = value;
  554. break;
  555. case 0x52: /* TV Vertical Start Position */
  556. s->tv_y = value & 0x7f;
  557. break;
  558. case 0x54: /* TV Test Pattern Setting */
  559. s->tv_test = value;
  560. break;
  561. case 0x56: /* TV Filter Setting */
  562. s->tv_filter_config = value & 0xbf;
  563. break;
  564. case 0x58: /* TV Filter Coefficient Index */
  565. s->tv_filter_idx = value & 0x1f;
  566. break;
  567. case 0x5a: /* TV Filter Coefficient Data */
  568. if (s->tv_filter_idx < 0x20)
  569. s->tv_filter_coeff[s->tv_filter_idx ++] = value;
  570. break;
  571. case 0x60: /* Input YUV/RGB Translate Mode 0 */
  572. s->yrc[0] = value & 0xb0;
  573. break;
  574. case 0x62: /* Input YUV/RGB Translate Mode 1 */
  575. s->yrc[1] = value & 0x30;
  576. break;
  577. case 0x64: /* U Data Fix */
  578. s->u = value & 0xff;
  579. break;
  580. case 0x66: /* V Data Fix */
  581. s->v = value & 0xff;
  582. break;
  583. case 0x68: /* Display Mode */
  584. if ((s->mode ^ value) & 3)
  585. s->invalidate = 1;
  586. s->mode = value & 0xb7;
  587. s->enable = value & 1;
  588. s->blank = (value >> 1) & 1;
  589. if (value & (1 << 4))
  590. fprintf(stderr, "%s: Macrovision enable attempt!\n", __FUNCTION__);
  591. break;
  592. case 0x6a: /* Special Effects */
  593. s->effect = value & 0xfb;
  594. break;
  595. case 0x6c: /* Input Window X Start Position 0 */
  596. s->ix[0] &= 0x300;
  597. s->ix[0] |= (value << 0) & 0x0ff;
  598. break;
  599. case 0x6e: /* Input Window X Start Position 1 */
  600. s->ix[0] &= 0x0ff;
  601. s->ix[0] |= (value << 8) & 0x300;
  602. break;
  603. case 0x70: /* Input Window Y Start Position 0 */
  604. s->iy[0] &= 0x300;
  605. s->iy[0] |= (value << 0) & 0x0ff;
  606. break;
  607. case 0x72: /* Input Window Y Start Position 1 */
  608. s->iy[0] &= 0x0ff;
  609. s->iy[0] |= (value << 8) & 0x300;
  610. break;
  611. case 0x74: /* Input Window X End Position 0 */
  612. s->ix[1] &= 0x300;
  613. s->ix[1] |= (value << 0) & 0x0ff;
  614. break;
  615. case 0x76: /* Input Window X End Position 1 */
  616. s->ix[1] &= 0x0ff;
  617. s->ix[1] |= (value << 8) & 0x300;
  618. break;
  619. case 0x78: /* Input Window Y End Position 0 */
  620. s->iy[1] &= 0x300;
  621. s->iy[1] |= (value << 0) & 0x0ff;
  622. break;
  623. case 0x7a: /* Input Window Y End Position 1 */
  624. s->iy[1] &= 0x0ff;
  625. s->iy[1] |= (value << 8) & 0x300;
  626. break;
  627. case 0x7c: /* Output Window X Start Position 0 */
  628. s->ox[0] &= 0x300;
  629. s->ox[0] |= (value << 0) & 0x0ff;
  630. break;
  631. case 0x7e: /* Output Window X Start Position 1 */
  632. s->ox[0] &= 0x0ff;
  633. s->ox[0] |= (value << 8) & 0x300;
  634. break;
  635. case 0x80: /* Output Window Y Start Position 0 */
  636. s->oy[0] &= 0x300;
  637. s->oy[0] |= (value << 0) & 0x0ff;
  638. break;
  639. case 0x82: /* Output Window Y Start Position 1 */
  640. s->oy[0] &= 0x0ff;
  641. s->oy[0] |= (value << 8) & 0x300;
  642. break;
  643. case 0x84: /* Output Window X End Position 0 */
  644. s->ox[1] &= 0x300;
  645. s->ox[1] |= (value << 0) & 0x0ff;
  646. break;
  647. case 0x86: /* Output Window X End Position 1 */
  648. s->ox[1] &= 0x0ff;
  649. s->ox[1] |= (value << 8) & 0x300;
  650. break;
  651. case 0x88: /* Output Window Y End Position 0 */
  652. s->oy[1] &= 0x300;
  653. s->oy[1] |= (value << 0) & 0x0ff;
  654. break;
  655. case 0x8a: /* Output Window Y End Position 1 */
  656. s->oy[1] &= 0x0ff;
  657. s->oy[1] |= (value << 8) & 0x300;
  658. break;
  659. case 0x8c: /* Input Data Format */
  660. s->iformat = value & 0xf;
  661. s->bpp = blizzard_iformat_bpp[s->iformat];
  662. if (!s->bpp)
  663. fprintf(stderr, "%s: Illegal or unsupported input format %x\n",
  664. __FUNCTION__, s->iformat);
  665. break;
  666. case 0x8e: /* Data Source Select */
  667. s->source = value & 7;
  668. /* Currently all windows will be "destructive overlays". */
  669. if ((!(s->effect & (1 << 3)) && (s->ix[0] != s->ox[0] ||
  670. s->iy[0] != s->oy[0] ||
  671. s->ix[1] != s->ox[1] ||
  672. s->iy[1] != s->oy[1])) ||
  673. !((s->ix[1] - s->ix[0]) & (s->iy[1] - s->iy[0]) &
  674. (s->ox[1] - s->ox[0]) & (s->oy[1] - s->oy[0]) & 1))
  675. fprintf(stderr, "%s: Illegal input/output window positions\n",
  676. __FUNCTION__);
  677. blizzard_transfer_setup(s);
  678. break;
  679. case 0x90: /* Display Memory Data Port */
  680. if (!s->data.len && !blizzard_transfer_setup(s))
  681. break;
  682. *s->data.ptr ++ = value;
  683. if (-- s->data.len == 0)
  684. blizzard_window(s);
  685. break;
  686. case 0xa8: /* Border Color 0 */
  687. s->border_r = value;
  688. break;
  689. case 0xaa: /* Border Color 1 */
  690. s->border_g = value;
  691. break;
  692. case 0xac: /* Border Color 2 */
  693. s->border_b = value;
  694. break;
  695. case 0xb4: /* Gamma Correction Enable */
  696. s->gamma_config = value & 0x87;
  697. break;
  698. case 0xb6: /* Gamma Correction Table Index */
  699. s->gamma_idx = value;
  700. break;
  701. case 0xb8: /* Gamma Correction Table Data */
  702. s->gamma_lut[s->gamma_idx ++] = value;
  703. break;
  704. case 0xba: /* 3x3 Matrix Enable */
  705. s->matrix_ena = value & 1;
  706. break;
  707. case 0xbc ... 0xde: /* Coefficient Registers */
  708. s->matrix_coeff[(reg - 0xbc) >> 1] = value & ((reg & 2) ? 0x80 : 0xff);
  709. break;
  710. case 0xe0: /* 3x3 Matrix Red Offset */
  711. s->matrix_r = value;
  712. break;
  713. case 0xe2: /* 3x3 Matrix Green Offset */
  714. s->matrix_g = value;
  715. break;
  716. case 0xe4: /* 3x3 Matrix Blue Offset */
  717. s->matrix_b = value;
  718. break;
  719. case 0xe6: /* Power-save */
  720. s->pm = value & 0x83;
  721. if (value & s->mode & 1)
  722. fprintf(stderr, "%s: The display must be disabled before entering "
  723. "Standby Mode\n", __FUNCTION__);
  724. break;
  725. case 0xe8: /* Non-display Period Control / Status */
  726. s->status = value & 0x1b;
  727. break;
  728. case 0xea: /* RGB Interface Control */
  729. s->rgbgpio_dir = value & 0x8f;
  730. break;
  731. case 0xec: /* RGB Interface Status */
  732. s->rgbgpio = value & 0xcf;
  733. break;
  734. case 0xee: /* General-purpose IO Pins Configuration */
  735. s->gpio_dir = value;
  736. break;
  737. case 0xf0: /* General-purpose IO Pins Status / Control */
  738. s->gpio = value;
  739. break;
  740. case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
  741. s->gpio_edge[0] = value;
  742. break;
  743. case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
  744. s->gpio_edge[1] = value;
  745. break;
  746. case 0xf6: /* GPIO Interrupt Status */
  747. s->gpio_irq &= value;
  748. break;
  749. case 0xf8: /* GPIO Pull-down Control */
  750. s->gpio_pdown = value;
  751. break;
  752. default:
  753. fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
  754. break;
  755. }
  756. }
  757. uint16_t s1d13745_read(void *opaque, int dc)
  758. {
  759. BlizzardState *s = (BlizzardState *) opaque;
  760. uint16_t value = blizzard_reg_read(s, s->reg);
  761. if (s->swallow -- > 0)
  762. return 0;
  763. if (dc)
  764. s->reg ++;
  765. return value;
  766. }
  767. void s1d13745_write(void *opaque, int dc, uint16_t value)
  768. {
  769. BlizzardState *s = (BlizzardState *) opaque;
  770. if (s->swallow -- > 0)
  771. return;
  772. if (dc) {
  773. blizzard_reg_write(s, s->reg, value);
  774. if (s->reg != 0x90 && s->reg != 0x5a && s->reg != 0xb8)
  775. s->reg += 2;
  776. } else
  777. s->reg = value & 0xff;
  778. }
  779. void s1d13745_write_block(void *opaque, int dc,
  780. void *buf, size_t len, int pitch)
  781. {
  782. BlizzardState *s = (BlizzardState *) opaque;
  783. while (len > 0) {
  784. if (s->reg == 0x90 && dc &&
  785. (s->data.len || blizzard_transfer_setup(s)) &&
  786. len >= (s->data.len << 1)) {
  787. len -= s->data.len << 1;
  788. s->data.len = 0;
  789. s->data.data = buf;
  790. if (pitch)
  791. s->data.pitch = pitch;
  792. blizzard_window(s);
  793. s->data.data = s->data.buf;
  794. continue;
  795. }
  796. s1d13745_write(opaque, dc, *(uint16_t *) buf);
  797. len -= 2;
  798. buf += 2;
  799. }
  800. }
  801. static void blizzard_update_display(void *opaque)
  802. {
  803. BlizzardState *s = (BlizzardState *) opaque;
  804. DisplaySurface *surface = qemu_console_surface(s->con);
  805. int y, bypp, bypl, bwidth;
  806. uint8_t *src, *dst;
  807. if (!s->enable)
  808. return;
  809. if (s->x != surface_width(surface) || s->y != surface_height(surface)) {
  810. s->invalidate = 1;
  811. qemu_console_resize(s->con, s->x, s->y);
  812. surface = qemu_console_surface(s->con);
  813. }
  814. if (s->invalidate) {
  815. s->invalidate = 0;
  816. if (s->blank) {
  817. bypp = surface_bytes_per_pixel(surface);
  818. memset(surface_data(surface), 0, bypp * s->x * s->y);
  819. return;
  820. }
  821. s->mx[0] = 0;
  822. s->mx[1] = s->x;
  823. s->my[0] = 0;
  824. s->my[1] = s->y;
  825. }
  826. if (s->mx[1] <= s->mx[0])
  827. return;
  828. bypp = surface_bytes_per_pixel(surface);
  829. bypl = bypp * s->x;
  830. bwidth = bypp * (s->mx[1] - s->mx[0]);
  831. y = s->my[0];
  832. src = s->fb + bypl * y + bypp * s->mx[0];
  833. dst = surface_data(surface) + bypl * y + bypp * s->mx[0];
  834. for (; y < s->my[1]; y ++, src += bypl, dst += bypl)
  835. memcpy(dst, src, bwidth);
  836. dpy_gfx_update(s->con, s->mx[0], s->my[0],
  837. s->mx[1] - s->mx[0], y - s->my[0]);
  838. s->mx[0] = s->x;
  839. s->mx[1] = 0;
  840. s->my[0] = s->y;
  841. s->my[1] = 0;
  842. }
  843. #define DEPTH 8
  844. #include "blizzard_template.h"
  845. #define DEPTH 15
  846. #include "blizzard_template.h"
  847. #define DEPTH 16
  848. #include "blizzard_template.h"
  849. #define DEPTH 24
  850. #include "blizzard_template.h"
  851. #define DEPTH 32
  852. #include "blizzard_template.h"
  853. static const GraphicHwOps blizzard_ops = {
  854. .invalidate = blizzard_invalidate_display,
  855. .gfx_update = blizzard_update_display,
  856. };
  857. void *s1d13745_init(qemu_irq gpio_int)
  858. {
  859. BlizzardState *s = (BlizzardState *) g_malloc0(sizeof(*s));
  860. DisplaySurface *surface;
  861. s->fb = g_malloc(0x180000);
  862. s->con = graphic_console_init(NULL, 0, &blizzard_ops, s);
  863. surface = qemu_console_surface(s->con);
  864. switch (surface_bits_per_pixel(surface)) {
  865. case 0:
  866. s->line_fn_tab[0] = s->line_fn_tab[1] =
  867. g_malloc0(sizeof(blizzard_fn_t) * 0x10);
  868. break;
  869. case 8:
  870. s->line_fn_tab[0] = blizzard_draw_fn_8;
  871. s->line_fn_tab[1] = blizzard_draw_fn_r_8;
  872. break;
  873. case 15:
  874. s->line_fn_tab[0] = blizzard_draw_fn_15;
  875. s->line_fn_tab[1] = blizzard_draw_fn_r_15;
  876. break;
  877. case 16:
  878. s->line_fn_tab[0] = blizzard_draw_fn_16;
  879. s->line_fn_tab[1] = blizzard_draw_fn_r_16;
  880. break;
  881. case 24:
  882. s->line_fn_tab[0] = blizzard_draw_fn_24;
  883. s->line_fn_tab[1] = blizzard_draw_fn_r_24;
  884. break;
  885. case 32:
  886. s->line_fn_tab[0] = blizzard_draw_fn_32;
  887. s->line_fn_tab[1] = blizzard_draw_fn_r_32;
  888. break;
  889. default:
  890. fprintf(stderr, "%s: Bad color depth\n", __FUNCTION__);
  891. exit(1);
  892. }
  893. blizzard_reset(s);
  894. return s;
  895. }