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Andreas Färber 55e5c28502 cpu: Move cpu_index field to CPUState 12 жил өмнө
..
Makefile.objs 32ac0ca2ec target-lm32: switch to AREG0 free mode 13 жил өмнө
README 45664345fa lm32: todo and documentation 14 жил өмнө
TODO 45664345fa lm32: todo and documentation 14 жил өмнө
cpu-qom.h 14cccb6185 qom: move include files to include/qom/ 12 жил өмнө
cpu.c 55e5c28502 cpu: Move cpu_index field to CPUState 12 жил өмнө
cpu.h 022c62cbbc exec: move include files to include/exec/ 12 жил өмнө
helper.c 1de7afc984 misc: move include files to include/qemu/ 12 жил өмнө
helper.h 022c62cbbc exec: move include files to include/exec/ 12 жил өмнө
machine.c 6393c08de2 target-lm32: Don't overuse CPUState 13 жил өмнө
op_helper.c 1de7afc984 misc: move include files to include/qemu/ 12 жил өмнө
translate.c 022c62cbbc exec: move include files to include/exec/ 12 жил өмнө

README

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
-serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Programmatically terminate the emulator
----------------------------------------
Originally neither the LatticeMico32 nor its peripherals support a
mechanism to shut down the machine. Emulation aware programs can write to a
to a special register within the system control block to shut down the
virtual machine. For more details see hw/lm32_sys.c. The lm32-evr is the
first BSP which instantiate this model. A (32 bit) write to 0xfff0000
causes a vm shutdown.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
cpu_lm32_set_phys_msb_ignore(env, 1);