tsc210x.c 34 KB

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  1. /*
  2. * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
  3. * TI TSC2301 (touchscreen/sensors/keypad).
  4. *
  5. * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
  6. * Copyright (C) 2008 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 or
  11. * (at your option) version 3 of the License.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include "hw.h"
  22. #include "audio/audio.h"
  23. #include "qemu/timer.h"
  24. #include "ui/console.h"
  25. #include "omap.h" /* For I2SCodec and uWireSlave */
  26. #include "devices.h"
  27. #define TSC_DATA_REGISTERS_PAGE 0x0
  28. #define TSC_CONTROL_REGISTERS_PAGE 0x1
  29. #define TSC_AUDIO_REGISTERS_PAGE 0x2
  30. #define TSC_VERBOSE
  31. #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
  32. typedef struct {
  33. qemu_irq pint;
  34. qemu_irq kbint;
  35. qemu_irq davint;
  36. QEMUTimer *timer;
  37. QEMUSoundCard card;
  38. uWireSlave chip;
  39. I2SCodec codec;
  40. uint8_t in_fifo[16384];
  41. uint8_t out_fifo[16384];
  42. uint16_t model;
  43. int x, y;
  44. int pressure;
  45. int state, page, offset, irq;
  46. uint16_t command, dav;
  47. int busy;
  48. int enabled;
  49. int host_mode;
  50. int function;
  51. int nextfunction;
  52. int precision;
  53. int nextprecision;
  54. int filter;
  55. int pin_func;
  56. int ref;
  57. int timing;
  58. int noise;
  59. uint16_t audio_ctrl1;
  60. uint16_t audio_ctrl2;
  61. uint16_t audio_ctrl3;
  62. uint16_t pll[3];
  63. uint16_t volume;
  64. int64_t volume_change;
  65. int softstep;
  66. uint16_t dac_power;
  67. int64_t powerdown;
  68. uint16_t filter_data[0x14];
  69. const char *name;
  70. SWVoiceIn *adc_voice[1];
  71. SWVoiceOut *dac_voice[1];
  72. int i2s_rx_rate;
  73. int i2s_tx_rate;
  74. int tr[8];
  75. struct {
  76. uint16_t down;
  77. uint16_t mask;
  78. int scan;
  79. int debounce;
  80. int mode;
  81. int intr;
  82. } kb;
  83. } TSC210xState;
  84. static const int resolution[4] = { 12, 8, 10, 12 };
  85. #define TSC_MODE_NO_SCAN 0x0
  86. #define TSC_MODE_XY_SCAN 0x1
  87. #define TSC_MODE_XYZ_SCAN 0x2
  88. #define TSC_MODE_X 0x3
  89. #define TSC_MODE_Y 0x4
  90. #define TSC_MODE_Z 0x5
  91. #define TSC_MODE_BAT1 0x6
  92. #define TSC_MODE_BAT2 0x7
  93. #define TSC_MODE_AUX 0x8
  94. #define TSC_MODE_AUX_SCAN 0x9
  95. #define TSC_MODE_TEMP1 0xa
  96. #define TSC_MODE_PORT_SCAN 0xb
  97. #define TSC_MODE_TEMP2 0xc
  98. #define TSC_MODE_XX_DRV 0xd
  99. #define TSC_MODE_YY_DRV 0xe
  100. #define TSC_MODE_YX_DRV 0xf
  101. static const uint16_t mode_regs[16] = {
  102. 0x0000, /* No scan */
  103. 0x0600, /* X, Y scan */
  104. 0x0780, /* X, Y, Z scan */
  105. 0x0400, /* X */
  106. 0x0200, /* Y */
  107. 0x0180, /* Z */
  108. 0x0040, /* BAT1 */
  109. 0x0030, /* BAT2 */
  110. 0x0010, /* AUX */
  111. 0x0010, /* AUX scan */
  112. 0x0004, /* TEMP1 */
  113. 0x0070, /* Port scan */
  114. 0x0002, /* TEMP2 */
  115. 0x0000, /* X+, X- drivers */
  116. 0x0000, /* Y+, Y- drivers */
  117. 0x0000, /* Y+, X- drivers */
  118. };
  119. #define X_TRANSFORM(s) \
  120. ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
  121. #define Y_TRANSFORM(s) \
  122. ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
  123. #define Z1_TRANSFORM(s) \
  124. ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
  125. #define Z2_TRANSFORM(s) \
  126. ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
  127. #define BAT1_VAL 0x8660
  128. #define BAT2_VAL 0x0000
  129. #define AUX1_VAL 0x35c0
  130. #define AUX2_VAL 0xffff
  131. #define TEMP1_VAL 0x8c70
  132. #define TEMP2_VAL 0xa5b0
  133. #define TSC_POWEROFF_DELAY 50
  134. #define TSC_SOFTSTEP_DELAY 50
  135. static void tsc210x_reset(TSC210xState *s)
  136. {
  137. s->state = 0;
  138. s->pin_func = 2;
  139. s->enabled = 0;
  140. s->busy = 0;
  141. s->nextfunction = 0;
  142. s->ref = 0;
  143. s->timing = 0;
  144. s->irq = 0;
  145. s->dav = 0;
  146. s->audio_ctrl1 = 0x0000;
  147. s->audio_ctrl2 = 0x4410;
  148. s->audio_ctrl3 = 0x0000;
  149. s->pll[0] = 0x1004;
  150. s->pll[1] = 0x0000;
  151. s->pll[2] = 0x1fff;
  152. s->volume = 0xffff;
  153. s->dac_power = 0x8540;
  154. s->softstep = 1;
  155. s->volume_change = 0;
  156. s->powerdown = 0;
  157. s->filter_data[0x00] = 0x6be3;
  158. s->filter_data[0x01] = 0x9666;
  159. s->filter_data[0x02] = 0x675d;
  160. s->filter_data[0x03] = 0x6be3;
  161. s->filter_data[0x04] = 0x9666;
  162. s->filter_data[0x05] = 0x675d;
  163. s->filter_data[0x06] = 0x7d83;
  164. s->filter_data[0x07] = 0x84ee;
  165. s->filter_data[0x08] = 0x7d83;
  166. s->filter_data[0x09] = 0x84ee;
  167. s->filter_data[0x0a] = 0x6be3;
  168. s->filter_data[0x0b] = 0x9666;
  169. s->filter_data[0x0c] = 0x675d;
  170. s->filter_data[0x0d] = 0x6be3;
  171. s->filter_data[0x0e] = 0x9666;
  172. s->filter_data[0x0f] = 0x675d;
  173. s->filter_data[0x10] = 0x7d83;
  174. s->filter_data[0x11] = 0x84ee;
  175. s->filter_data[0x12] = 0x7d83;
  176. s->filter_data[0x13] = 0x84ee;
  177. s->i2s_tx_rate = 0;
  178. s->i2s_rx_rate = 0;
  179. s->kb.scan = 1;
  180. s->kb.debounce = 0;
  181. s->kb.mask = 0x0000;
  182. s->kb.mode = 3;
  183. s->kb.intr = 0;
  184. qemu_set_irq(s->pint, !s->irq);
  185. qemu_set_irq(s->davint, !s->dav);
  186. qemu_irq_raise(s->kbint);
  187. }
  188. typedef struct {
  189. int rate;
  190. int dsor;
  191. int fsref;
  192. } TSC210xRateInfo;
  193. /* { rate, dsor, fsref } */
  194. static const TSC210xRateInfo tsc2101_rates[] = {
  195. /* Fsref / 6.0 */
  196. { 7350, 7, 1 },
  197. { 8000, 7, 0 },
  198. /* Fsref / 5.5 */
  199. { 8018, 6, 1 },
  200. { 8727, 6, 0 },
  201. /* Fsref / 5.0 */
  202. { 8820, 5, 1 },
  203. { 9600, 5, 0 },
  204. /* Fsref / 4.0 */
  205. { 11025, 4, 1 },
  206. { 12000, 4, 0 },
  207. /* Fsref / 3.0 */
  208. { 14700, 3, 1 },
  209. { 16000, 3, 0 },
  210. /* Fsref / 2.0 */
  211. { 22050, 2, 1 },
  212. { 24000, 2, 0 },
  213. /* Fsref / 1.5 */
  214. { 29400, 1, 1 },
  215. { 32000, 1, 0 },
  216. /* Fsref */
  217. { 44100, 0, 1 },
  218. { 48000, 0, 0 },
  219. { 0, 0, 0 },
  220. };
  221. /* { rate, dsor, fsref } */
  222. static const TSC210xRateInfo tsc2102_rates[] = {
  223. /* Fsref / 6.0 */
  224. { 7350, 63, 1 },
  225. { 8000, 63, 0 },
  226. /* Fsref / 6.0 */
  227. { 7350, 54, 1 },
  228. { 8000, 54, 0 },
  229. /* Fsref / 5.0 */
  230. { 8820, 45, 1 },
  231. { 9600, 45, 0 },
  232. /* Fsref / 4.0 */
  233. { 11025, 36, 1 },
  234. { 12000, 36, 0 },
  235. /* Fsref / 3.0 */
  236. { 14700, 27, 1 },
  237. { 16000, 27, 0 },
  238. /* Fsref / 2.0 */
  239. { 22050, 18, 1 },
  240. { 24000, 18, 0 },
  241. /* Fsref / 1.5 */
  242. { 29400, 9, 1 },
  243. { 32000, 9, 0 },
  244. /* Fsref */
  245. { 44100, 0, 1 },
  246. { 48000, 0, 0 },
  247. { 0, 0, 0 },
  248. };
  249. static inline void tsc210x_out_flush(TSC210xState *s, int len)
  250. {
  251. uint8_t *data = s->codec.out.fifo + s->codec.out.start;
  252. uint8_t *end = data + len;
  253. while (data < end)
  254. data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
  255. s->codec.out.len -= len;
  256. if (s->codec.out.len)
  257. memmove(s->codec.out.fifo, end, s->codec.out.len);
  258. s->codec.out.start = 0;
  259. }
  260. static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
  261. {
  262. if (s->codec.out.len >= free_b) {
  263. tsc210x_out_flush(s, free_b);
  264. return;
  265. }
  266. s->codec.out.size = MIN(free_b, 16384);
  267. qemu_irq_raise(s->codec.tx_start);
  268. }
  269. static void tsc2102_audio_rate_update(TSC210xState *s)
  270. {
  271. const TSC210xRateInfo *rate;
  272. s->codec.tx_rate = 0;
  273. s->codec.rx_rate = 0;
  274. if (s->dac_power & (1 << 15)) /* PWDNC */
  275. return;
  276. for (rate = tsc2102_rates; rate->rate; rate ++)
  277. if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
  278. rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
  279. break;
  280. if (!rate->rate) {
  281. printf("%s: unknown sampling rate configured\n", __FUNCTION__);
  282. return;
  283. }
  284. s->codec.tx_rate = rate->rate;
  285. }
  286. static void tsc2102_audio_output_update(TSC210xState *s)
  287. {
  288. int enable;
  289. struct audsettings fmt;
  290. if (s->dac_voice[0]) {
  291. tsc210x_out_flush(s, s->codec.out.len);
  292. s->codec.out.size = 0;
  293. AUD_set_active_out(s->dac_voice[0], 0);
  294. AUD_close_out(&s->card, s->dac_voice[0]);
  295. s->dac_voice[0] = NULL;
  296. }
  297. s->codec.cts = 0;
  298. enable =
  299. (~s->dac_power & (1 << 15)) && /* PWDNC */
  300. (~s->dac_power & (1 << 10)); /* DAPWDN */
  301. if (!enable || !s->codec.tx_rate)
  302. return;
  303. /* Force our own sampling rate even in slave DAC mode */
  304. fmt.endianness = 0;
  305. fmt.nchannels = 2;
  306. fmt.freq = s->codec.tx_rate;
  307. fmt.fmt = AUD_FMT_S16;
  308. s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
  309. "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
  310. if (s->dac_voice[0]) {
  311. s->codec.cts = 1;
  312. AUD_set_active_out(s->dac_voice[0], 1);
  313. }
  314. }
  315. static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
  316. {
  317. switch (reg) {
  318. case 0x00: /* X */
  319. s->dav &= 0xfbff;
  320. return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
  321. (s->noise & 3);
  322. case 0x01: /* Y */
  323. s->noise ++;
  324. s->dav &= 0xfdff;
  325. return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
  326. (s->noise & 3);
  327. case 0x02: /* Z1 */
  328. s->dav &= 0xfeff;
  329. return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
  330. (s->noise & 3);
  331. case 0x03: /* Z2 */
  332. s->dav &= 0xff7f;
  333. return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
  334. (s->noise & 3);
  335. case 0x04: /* KPData */
  336. if ((s->model & 0xff00) == 0x2300) {
  337. if (s->kb.intr && (s->kb.mode & 2)) {
  338. s->kb.intr = 0;
  339. qemu_irq_raise(s->kbint);
  340. }
  341. return s->kb.down;
  342. }
  343. return 0xffff;
  344. case 0x05: /* BAT1 */
  345. s->dav &= 0xffbf;
  346. return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
  347. (s->noise & 6);
  348. case 0x06: /* BAT2 */
  349. s->dav &= 0xffdf;
  350. return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
  351. case 0x07: /* AUX1 */
  352. s->dav &= 0xffef;
  353. return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
  354. case 0x08: /* AUX2 */
  355. s->dav &= 0xfff7;
  356. return 0xffff;
  357. case 0x09: /* TEMP1 */
  358. s->dav &= 0xfffb;
  359. return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
  360. (s->noise & 5);
  361. case 0x0a: /* TEMP2 */
  362. s->dav &= 0xfffd;
  363. return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
  364. (s->noise & 3);
  365. case 0x0b: /* DAC */
  366. s->dav &= 0xfffe;
  367. return 0xffff;
  368. default:
  369. #ifdef TSC_VERBOSE
  370. fprintf(stderr, "tsc2102_data_register_read: "
  371. "no such register: 0x%02x\n", reg);
  372. #endif
  373. return 0xffff;
  374. }
  375. }
  376. static uint16_t tsc2102_control_register_read(
  377. TSC210xState *s, int reg)
  378. {
  379. switch (reg) {
  380. case 0x00: /* TSC ADC */
  381. return (s->pressure << 15) | ((!s->busy) << 14) |
  382. (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
  383. case 0x01: /* Status / Keypad Control */
  384. if ((s->model & 0xff00) == 0x2100)
  385. return (s->pin_func << 14) | ((!s->enabled) << 13) |
  386. (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
  387. else
  388. return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
  389. (s->kb.debounce << 11);
  390. case 0x02: /* DAC Control */
  391. if ((s->model & 0xff00) == 0x2300)
  392. return s->dac_power & 0x8000;
  393. else
  394. goto bad_reg;
  395. case 0x03: /* Reference */
  396. return s->ref;
  397. case 0x04: /* Reset */
  398. return 0xffff;
  399. case 0x05: /* Configuration */
  400. return s->timing;
  401. case 0x06: /* Secondary configuration */
  402. if ((s->model & 0xff00) == 0x2100)
  403. goto bad_reg;
  404. return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
  405. case 0x10: /* Keypad Mask */
  406. if ((s->model & 0xff00) == 0x2100)
  407. goto bad_reg;
  408. return s->kb.mask;
  409. default:
  410. bad_reg:
  411. #ifdef TSC_VERBOSE
  412. fprintf(stderr, "tsc2102_control_register_read: "
  413. "no such register: 0x%02x\n", reg);
  414. #endif
  415. return 0xffff;
  416. }
  417. }
  418. static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
  419. {
  420. int l_ch, r_ch;
  421. uint16_t val;
  422. switch (reg) {
  423. case 0x00: /* Audio Control 1 */
  424. return s->audio_ctrl1;
  425. case 0x01:
  426. return 0xff00;
  427. case 0x02: /* DAC Volume Control */
  428. return s->volume;
  429. case 0x03:
  430. return 0x8b00;
  431. case 0x04: /* Audio Control 2 */
  432. l_ch = 1;
  433. r_ch = 1;
  434. if (s->softstep && !(s->dac_power & (1 << 10))) {
  435. l_ch = (qemu_get_clock_ns(vm_clock) >
  436. s->volume_change + TSC_SOFTSTEP_DELAY);
  437. r_ch = (qemu_get_clock_ns(vm_clock) >
  438. s->volume_change + TSC_SOFTSTEP_DELAY);
  439. }
  440. return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
  441. case 0x05: /* Stereo DAC Power Control */
  442. return 0x2aa0 | s->dac_power |
  443. (((s->dac_power & (1 << 10)) &&
  444. (qemu_get_clock_ns(vm_clock) >
  445. s->powerdown + TSC_POWEROFF_DELAY)) << 6);
  446. case 0x06: /* Audio Control 3 */
  447. val = s->audio_ctrl3 | 0x0001;
  448. s->audio_ctrl3 &= 0xff3f;
  449. return val;
  450. case 0x07: /* LCH_BASS_BOOST_N0 */
  451. case 0x08: /* LCH_BASS_BOOST_N1 */
  452. case 0x09: /* LCH_BASS_BOOST_N2 */
  453. case 0x0a: /* LCH_BASS_BOOST_N3 */
  454. case 0x0b: /* LCH_BASS_BOOST_N4 */
  455. case 0x0c: /* LCH_BASS_BOOST_N5 */
  456. case 0x0d: /* LCH_BASS_BOOST_D1 */
  457. case 0x0e: /* LCH_BASS_BOOST_D2 */
  458. case 0x0f: /* LCH_BASS_BOOST_D4 */
  459. case 0x10: /* LCH_BASS_BOOST_D5 */
  460. case 0x11: /* RCH_BASS_BOOST_N0 */
  461. case 0x12: /* RCH_BASS_BOOST_N1 */
  462. case 0x13: /* RCH_BASS_BOOST_N2 */
  463. case 0x14: /* RCH_BASS_BOOST_N3 */
  464. case 0x15: /* RCH_BASS_BOOST_N4 */
  465. case 0x16: /* RCH_BASS_BOOST_N5 */
  466. case 0x17: /* RCH_BASS_BOOST_D1 */
  467. case 0x18: /* RCH_BASS_BOOST_D2 */
  468. case 0x19: /* RCH_BASS_BOOST_D4 */
  469. case 0x1a: /* RCH_BASS_BOOST_D5 */
  470. return s->filter_data[reg - 0x07];
  471. case 0x1b: /* PLL Programmability 1 */
  472. return s->pll[0];
  473. case 0x1c: /* PLL Programmability 2 */
  474. return s->pll[1];
  475. case 0x1d: /* Audio Control 4 */
  476. return (!s->softstep) << 14;
  477. default:
  478. #ifdef TSC_VERBOSE
  479. fprintf(stderr, "tsc2102_audio_register_read: "
  480. "no such register: 0x%02x\n", reg);
  481. #endif
  482. return 0xffff;
  483. }
  484. }
  485. static void tsc2102_data_register_write(
  486. TSC210xState *s, int reg, uint16_t value)
  487. {
  488. switch (reg) {
  489. case 0x00: /* X */
  490. case 0x01: /* Y */
  491. case 0x02: /* Z1 */
  492. case 0x03: /* Z2 */
  493. case 0x05: /* BAT1 */
  494. case 0x06: /* BAT2 */
  495. case 0x07: /* AUX1 */
  496. case 0x08: /* AUX2 */
  497. case 0x09: /* TEMP1 */
  498. case 0x0a: /* TEMP2 */
  499. return;
  500. default:
  501. #ifdef TSC_VERBOSE
  502. fprintf(stderr, "tsc2102_data_register_write: "
  503. "no such register: 0x%02x\n", reg);
  504. #endif
  505. }
  506. }
  507. static void tsc2102_control_register_write(
  508. TSC210xState *s, int reg, uint16_t value)
  509. {
  510. switch (reg) {
  511. case 0x00: /* TSC ADC */
  512. s->host_mode = value >> 15;
  513. s->enabled = !(value & 0x4000);
  514. if (s->busy && !s->enabled)
  515. qemu_del_timer(s->timer);
  516. s->busy &= s->enabled;
  517. s->nextfunction = (value >> 10) & 0xf;
  518. s->nextprecision = (value >> 8) & 3;
  519. s->filter = value & 0xff;
  520. return;
  521. case 0x01: /* Status / Keypad Control */
  522. if ((s->model & 0xff00) == 0x2100)
  523. s->pin_func = value >> 14;
  524. else {
  525. s->kb.scan = (value >> 14) & 1;
  526. s->kb.debounce = (value >> 11) & 7;
  527. if (s->kb.intr && s->kb.scan) {
  528. s->kb.intr = 0;
  529. qemu_irq_raise(s->kbint);
  530. }
  531. }
  532. return;
  533. case 0x02: /* DAC Control */
  534. if ((s->model & 0xff00) == 0x2300) {
  535. s->dac_power &= 0x7fff;
  536. s->dac_power |= 0x8000 & value;
  537. } else
  538. goto bad_reg;
  539. break;
  540. case 0x03: /* Reference */
  541. s->ref = value & 0x1f;
  542. return;
  543. case 0x04: /* Reset */
  544. if (value == 0xbb00) {
  545. if (s->busy)
  546. qemu_del_timer(s->timer);
  547. tsc210x_reset(s);
  548. #ifdef TSC_VERBOSE
  549. } else {
  550. fprintf(stderr, "tsc2102_control_register_write: "
  551. "wrong value written into RESET\n");
  552. #endif
  553. }
  554. return;
  555. case 0x05: /* Configuration */
  556. s->timing = value & 0x3f;
  557. #ifdef TSC_VERBOSE
  558. if (value & ~0x3f)
  559. fprintf(stderr, "tsc2102_control_register_write: "
  560. "wrong value written into CONFIG\n");
  561. #endif
  562. return;
  563. case 0x06: /* Secondary configuration */
  564. if ((s->model & 0xff00) == 0x2100)
  565. goto bad_reg;
  566. s->kb.mode = value >> 14;
  567. s->pll[2] = value & 0x3ffff;
  568. return;
  569. case 0x10: /* Keypad Mask */
  570. if ((s->model & 0xff00) == 0x2100)
  571. goto bad_reg;
  572. s->kb.mask = value;
  573. return;
  574. default:
  575. bad_reg:
  576. #ifdef TSC_VERBOSE
  577. fprintf(stderr, "tsc2102_control_register_write: "
  578. "no such register: 0x%02x\n", reg);
  579. #endif
  580. }
  581. }
  582. static void tsc2102_audio_register_write(
  583. TSC210xState *s, int reg, uint16_t value)
  584. {
  585. switch (reg) {
  586. case 0x00: /* Audio Control 1 */
  587. s->audio_ctrl1 = value & 0x0f3f;
  588. #ifdef TSC_VERBOSE
  589. if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
  590. fprintf(stderr, "tsc2102_audio_register_write: "
  591. "wrong value written into Audio 1\n");
  592. #endif
  593. tsc2102_audio_rate_update(s);
  594. tsc2102_audio_output_update(s);
  595. return;
  596. case 0x01:
  597. #ifdef TSC_VERBOSE
  598. if (value != 0xff00)
  599. fprintf(stderr, "tsc2102_audio_register_write: "
  600. "wrong value written into reg 0x01\n");
  601. #endif
  602. return;
  603. case 0x02: /* DAC Volume Control */
  604. s->volume = value;
  605. s->volume_change = qemu_get_clock_ns(vm_clock);
  606. return;
  607. case 0x03:
  608. #ifdef TSC_VERBOSE
  609. if (value != 0x8b00)
  610. fprintf(stderr, "tsc2102_audio_register_write: "
  611. "wrong value written into reg 0x03\n");
  612. #endif
  613. return;
  614. case 0x04: /* Audio Control 2 */
  615. s->audio_ctrl2 = value & 0xf7f2;
  616. #ifdef TSC_VERBOSE
  617. if (value & ~0xf7fd)
  618. fprintf(stderr, "tsc2102_audio_register_write: "
  619. "wrong value written into Audio 2\n");
  620. #endif
  621. return;
  622. case 0x05: /* Stereo DAC Power Control */
  623. if ((value & ~s->dac_power) & (1 << 10))
  624. s->powerdown = qemu_get_clock_ns(vm_clock);
  625. s->dac_power = value & 0x9543;
  626. #ifdef TSC_VERBOSE
  627. if ((value & ~0x9543) != 0x2aa0)
  628. fprintf(stderr, "tsc2102_audio_register_write: "
  629. "wrong value written into Power\n");
  630. #endif
  631. tsc2102_audio_rate_update(s);
  632. tsc2102_audio_output_update(s);
  633. return;
  634. case 0x06: /* Audio Control 3 */
  635. s->audio_ctrl3 &= 0x00c0;
  636. s->audio_ctrl3 |= value & 0xf800;
  637. #ifdef TSC_VERBOSE
  638. if (value & ~0xf8c7)
  639. fprintf(stderr, "tsc2102_audio_register_write: "
  640. "wrong value written into Audio 3\n");
  641. #endif
  642. tsc2102_audio_output_update(s);
  643. return;
  644. case 0x07: /* LCH_BASS_BOOST_N0 */
  645. case 0x08: /* LCH_BASS_BOOST_N1 */
  646. case 0x09: /* LCH_BASS_BOOST_N2 */
  647. case 0x0a: /* LCH_BASS_BOOST_N3 */
  648. case 0x0b: /* LCH_BASS_BOOST_N4 */
  649. case 0x0c: /* LCH_BASS_BOOST_N5 */
  650. case 0x0d: /* LCH_BASS_BOOST_D1 */
  651. case 0x0e: /* LCH_BASS_BOOST_D2 */
  652. case 0x0f: /* LCH_BASS_BOOST_D4 */
  653. case 0x10: /* LCH_BASS_BOOST_D5 */
  654. case 0x11: /* RCH_BASS_BOOST_N0 */
  655. case 0x12: /* RCH_BASS_BOOST_N1 */
  656. case 0x13: /* RCH_BASS_BOOST_N2 */
  657. case 0x14: /* RCH_BASS_BOOST_N3 */
  658. case 0x15: /* RCH_BASS_BOOST_N4 */
  659. case 0x16: /* RCH_BASS_BOOST_N5 */
  660. case 0x17: /* RCH_BASS_BOOST_D1 */
  661. case 0x18: /* RCH_BASS_BOOST_D2 */
  662. case 0x19: /* RCH_BASS_BOOST_D4 */
  663. case 0x1a: /* RCH_BASS_BOOST_D5 */
  664. s->filter_data[reg - 0x07] = value;
  665. return;
  666. case 0x1b: /* PLL Programmability 1 */
  667. s->pll[0] = value & 0xfffc;
  668. #ifdef TSC_VERBOSE
  669. if (value & ~0xfffc)
  670. fprintf(stderr, "tsc2102_audio_register_write: "
  671. "wrong value written into PLL 1\n");
  672. #endif
  673. return;
  674. case 0x1c: /* PLL Programmability 2 */
  675. s->pll[1] = value & 0xfffc;
  676. #ifdef TSC_VERBOSE
  677. if (value & ~0xfffc)
  678. fprintf(stderr, "tsc2102_audio_register_write: "
  679. "wrong value written into PLL 2\n");
  680. #endif
  681. return;
  682. case 0x1d: /* Audio Control 4 */
  683. s->softstep = !(value & 0x4000);
  684. #ifdef TSC_VERBOSE
  685. if (value & ~0x4000)
  686. fprintf(stderr, "tsc2102_audio_register_write: "
  687. "wrong value written into Audio 4\n");
  688. #endif
  689. return;
  690. default:
  691. #ifdef TSC_VERBOSE
  692. fprintf(stderr, "tsc2102_audio_register_write: "
  693. "no such register: 0x%02x\n", reg);
  694. #endif
  695. }
  696. }
  697. /* This handles most of the chip logic. */
  698. static void tsc210x_pin_update(TSC210xState *s)
  699. {
  700. int64_t expires;
  701. int pin_state;
  702. switch (s->pin_func) {
  703. case 0:
  704. pin_state = s->pressure;
  705. break;
  706. case 1:
  707. pin_state = !!s->dav;
  708. break;
  709. case 2:
  710. default:
  711. pin_state = s->pressure && !s->dav;
  712. }
  713. if (!s->enabled)
  714. pin_state = 0;
  715. if (pin_state != s->irq) {
  716. s->irq = pin_state;
  717. qemu_set_irq(s->pint, !s->irq);
  718. }
  719. switch (s->nextfunction) {
  720. case TSC_MODE_XY_SCAN:
  721. case TSC_MODE_XYZ_SCAN:
  722. if (!s->pressure)
  723. return;
  724. break;
  725. case TSC_MODE_X:
  726. case TSC_MODE_Y:
  727. case TSC_MODE_Z:
  728. if (!s->pressure)
  729. return;
  730. /* Fall through */
  731. case TSC_MODE_BAT1:
  732. case TSC_MODE_BAT2:
  733. case TSC_MODE_AUX:
  734. case TSC_MODE_TEMP1:
  735. case TSC_MODE_TEMP2:
  736. if (s->dav)
  737. s->enabled = 0;
  738. break;
  739. case TSC_MODE_AUX_SCAN:
  740. case TSC_MODE_PORT_SCAN:
  741. break;
  742. case TSC_MODE_NO_SCAN:
  743. case TSC_MODE_XX_DRV:
  744. case TSC_MODE_YY_DRV:
  745. case TSC_MODE_YX_DRV:
  746. default:
  747. return;
  748. }
  749. if (!s->enabled || s->busy || s->dav)
  750. return;
  751. s->busy = 1;
  752. s->precision = s->nextprecision;
  753. s->function = s->nextfunction;
  754. expires = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() >> 10);
  755. qemu_mod_timer(s->timer, expires);
  756. }
  757. static uint16_t tsc210x_read(TSC210xState *s)
  758. {
  759. uint16_t ret = 0x0000;
  760. if (!s->command)
  761. fprintf(stderr, "tsc210x_read: SPI underrun!\n");
  762. switch (s->page) {
  763. case TSC_DATA_REGISTERS_PAGE:
  764. ret = tsc2102_data_register_read(s, s->offset);
  765. if (!s->dav)
  766. qemu_irq_raise(s->davint);
  767. break;
  768. case TSC_CONTROL_REGISTERS_PAGE:
  769. ret = tsc2102_control_register_read(s, s->offset);
  770. break;
  771. case TSC_AUDIO_REGISTERS_PAGE:
  772. ret = tsc2102_audio_register_read(s, s->offset);
  773. break;
  774. default:
  775. hw_error("tsc210x_read: wrong memory page\n");
  776. }
  777. tsc210x_pin_update(s);
  778. /* Allow sequential reads. */
  779. s->offset ++;
  780. s->state = 0;
  781. return ret;
  782. }
  783. static void tsc210x_write(TSC210xState *s, uint16_t value)
  784. {
  785. /*
  786. * This is a two-state state machine for reading
  787. * command and data every second time.
  788. */
  789. if (!s->state) {
  790. s->command = value >> 15;
  791. s->page = (value >> 11) & 0x0f;
  792. s->offset = (value >> 5) & 0x3f;
  793. s->state = 1;
  794. } else {
  795. if (s->command)
  796. fprintf(stderr, "tsc210x_write: SPI overrun!\n");
  797. else
  798. switch (s->page) {
  799. case TSC_DATA_REGISTERS_PAGE:
  800. tsc2102_data_register_write(s, s->offset, value);
  801. break;
  802. case TSC_CONTROL_REGISTERS_PAGE:
  803. tsc2102_control_register_write(s, s->offset, value);
  804. break;
  805. case TSC_AUDIO_REGISTERS_PAGE:
  806. tsc2102_audio_register_write(s, s->offset, value);
  807. break;
  808. default:
  809. hw_error("tsc210x_write: wrong memory page\n");
  810. }
  811. tsc210x_pin_update(s);
  812. s->state = 0;
  813. }
  814. }
  815. uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
  816. {
  817. TSC210xState *s = opaque;
  818. uint32_t ret = 0;
  819. if (len != 16)
  820. hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
  821. /* TODO: sequential reads etc - how do we make sure the host doesn't
  822. * unintentionally read out a conversion result from a register while
  823. * transmitting the command word of the next command? */
  824. if (!value || (s->state && s->command))
  825. ret = tsc210x_read(s);
  826. if (value || (s->state && !s->command))
  827. tsc210x_write(s, value);
  828. return ret;
  829. }
  830. static void tsc210x_timer_tick(void *opaque)
  831. {
  832. TSC210xState *s = opaque;
  833. /* Timer ticked -- a set of conversions has been finished. */
  834. if (!s->busy)
  835. return;
  836. s->busy = 0;
  837. s->dav |= mode_regs[s->function];
  838. tsc210x_pin_update(s);
  839. qemu_irq_lower(s->davint);
  840. }
  841. static void tsc210x_touchscreen_event(void *opaque,
  842. int x, int y, int z, int buttons_state)
  843. {
  844. TSC210xState *s = opaque;
  845. int p = s->pressure;
  846. if (buttons_state) {
  847. s->x = x;
  848. s->y = y;
  849. }
  850. s->pressure = !!buttons_state;
  851. /*
  852. * Note: We would get better responsiveness in the guest by
  853. * signaling TS events immediately, but for now we simulate
  854. * the first conversion delay for sake of correctness.
  855. */
  856. if (p != s->pressure)
  857. tsc210x_pin_update(s);
  858. }
  859. static void tsc210x_i2s_swallow(TSC210xState *s)
  860. {
  861. if (s->dac_voice[0])
  862. tsc210x_out_flush(s, s->codec.out.len);
  863. else
  864. s->codec.out.len = 0;
  865. }
  866. static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
  867. {
  868. s->i2s_tx_rate = out;
  869. s->i2s_rx_rate = in;
  870. }
  871. static void tsc210x_save(QEMUFile *f, void *opaque)
  872. {
  873. TSC210xState *s = (TSC210xState *) opaque;
  874. int64_t now = qemu_get_clock_ns(vm_clock);
  875. int i;
  876. qemu_put_be16(f, s->x);
  877. qemu_put_be16(f, s->y);
  878. qemu_put_byte(f, s->pressure);
  879. qemu_put_byte(f, s->state);
  880. qemu_put_byte(f, s->page);
  881. qemu_put_byte(f, s->offset);
  882. qemu_put_byte(f, s->command);
  883. qemu_put_byte(f, s->irq);
  884. qemu_put_be16s(f, &s->dav);
  885. qemu_put_timer(f, s->timer);
  886. qemu_put_byte(f, s->enabled);
  887. qemu_put_byte(f, s->host_mode);
  888. qemu_put_byte(f, s->function);
  889. qemu_put_byte(f, s->nextfunction);
  890. qemu_put_byte(f, s->precision);
  891. qemu_put_byte(f, s->nextprecision);
  892. qemu_put_byte(f, s->filter);
  893. qemu_put_byte(f, s->pin_func);
  894. qemu_put_byte(f, s->ref);
  895. qemu_put_byte(f, s->timing);
  896. qemu_put_be32(f, s->noise);
  897. qemu_put_be16s(f, &s->audio_ctrl1);
  898. qemu_put_be16s(f, &s->audio_ctrl2);
  899. qemu_put_be16s(f, &s->audio_ctrl3);
  900. qemu_put_be16s(f, &s->pll[0]);
  901. qemu_put_be16s(f, &s->pll[1]);
  902. qemu_put_be16s(f, &s->volume);
  903. qemu_put_sbe64(f, (s->volume_change - now));
  904. qemu_put_sbe64(f, (s->powerdown - now));
  905. qemu_put_byte(f, s->softstep);
  906. qemu_put_be16s(f, &s->dac_power);
  907. for (i = 0; i < 0x14; i ++)
  908. qemu_put_be16s(f, &s->filter_data[i]);
  909. }
  910. static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
  911. {
  912. TSC210xState *s = (TSC210xState *) opaque;
  913. int64_t now = qemu_get_clock_ns(vm_clock);
  914. int i;
  915. s->x = qemu_get_be16(f);
  916. s->y = qemu_get_be16(f);
  917. s->pressure = qemu_get_byte(f);
  918. s->state = qemu_get_byte(f);
  919. s->page = qemu_get_byte(f);
  920. s->offset = qemu_get_byte(f);
  921. s->command = qemu_get_byte(f);
  922. s->irq = qemu_get_byte(f);
  923. qemu_get_be16s(f, &s->dav);
  924. qemu_get_timer(f, s->timer);
  925. s->enabled = qemu_get_byte(f);
  926. s->host_mode = qemu_get_byte(f);
  927. s->function = qemu_get_byte(f);
  928. s->nextfunction = qemu_get_byte(f);
  929. s->precision = qemu_get_byte(f);
  930. s->nextprecision = qemu_get_byte(f);
  931. s->filter = qemu_get_byte(f);
  932. s->pin_func = qemu_get_byte(f);
  933. s->ref = qemu_get_byte(f);
  934. s->timing = qemu_get_byte(f);
  935. s->noise = qemu_get_be32(f);
  936. qemu_get_be16s(f, &s->audio_ctrl1);
  937. qemu_get_be16s(f, &s->audio_ctrl2);
  938. qemu_get_be16s(f, &s->audio_ctrl3);
  939. qemu_get_be16s(f, &s->pll[0]);
  940. qemu_get_be16s(f, &s->pll[1]);
  941. qemu_get_be16s(f, &s->volume);
  942. s->volume_change = qemu_get_sbe64(f) + now;
  943. s->powerdown = qemu_get_sbe64(f) + now;
  944. s->softstep = qemu_get_byte(f);
  945. qemu_get_be16s(f, &s->dac_power);
  946. for (i = 0; i < 0x14; i ++)
  947. qemu_get_be16s(f, &s->filter_data[i]);
  948. s->busy = qemu_timer_pending(s->timer);
  949. qemu_set_irq(s->pint, !s->irq);
  950. qemu_set_irq(s->davint, !s->dav);
  951. return 0;
  952. }
  953. uWireSlave *tsc2102_init(qemu_irq pint)
  954. {
  955. TSC210xState *s;
  956. s = (TSC210xState *)
  957. g_malloc0(sizeof(TSC210xState));
  958. memset(s, 0, sizeof(TSC210xState));
  959. s->x = 160;
  960. s->y = 160;
  961. s->pressure = 0;
  962. s->precision = s->nextprecision = 0;
  963. s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s);
  964. s->pint = pint;
  965. s->model = 0x2102;
  966. s->name = "tsc2102";
  967. s->tr[0] = 0;
  968. s->tr[1] = 1;
  969. s->tr[2] = 1;
  970. s->tr[3] = 0;
  971. s->tr[4] = 1;
  972. s->tr[5] = 0;
  973. s->tr[6] = 1;
  974. s->tr[7] = 0;
  975. s->chip.opaque = s;
  976. s->chip.send = (void *) tsc210x_write;
  977. s->chip.receive = (void *) tsc210x_read;
  978. s->codec.opaque = s;
  979. s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
  980. s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
  981. s->codec.in.fifo = s->in_fifo;
  982. s->codec.out.fifo = s->out_fifo;
  983. tsc210x_reset(s);
  984. qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
  985. "QEMU TSC2102-driven Touchscreen");
  986. AUD_register_card(s->name, &s->card);
  987. qemu_register_reset((void *) tsc210x_reset, s);
  988. register_savevm(NULL, s->name, -1, 0,
  989. tsc210x_save, tsc210x_load, s);
  990. return &s->chip;
  991. }
  992. uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
  993. {
  994. TSC210xState *s;
  995. s = (TSC210xState *)
  996. g_malloc0(sizeof(TSC210xState));
  997. memset(s, 0, sizeof(TSC210xState));
  998. s->x = 400;
  999. s->y = 240;
  1000. s->pressure = 0;
  1001. s->precision = s->nextprecision = 0;
  1002. s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s);
  1003. s->pint = penirq;
  1004. s->kbint = kbirq;
  1005. s->davint = dav;
  1006. s->model = 0x2301;
  1007. s->name = "tsc2301";
  1008. s->tr[0] = 0;
  1009. s->tr[1] = 1;
  1010. s->tr[2] = 1;
  1011. s->tr[3] = 0;
  1012. s->tr[4] = 1;
  1013. s->tr[5] = 0;
  1014. s->tr[6] = 1;
  1015. s->tr[7] = 0;
  1016. s->chip.opaque = s;
  1017. s->chip.send = (void *) tsc210x_write;
  1018. s->chip.receive = (void *) tsc210x_read;
  1019. s->codec.opaque = s;
  1020. s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
  1021. s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
  1022. s->codec.in.fifo = s->in_fifo;
  1023. s->codec.out.fifo = s->out_fifo;
  1024. tsc210x_reset(s);
  1025. qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
  1026. "QEMU TSC2301-driven Touchscreen");
  1027. AUD_register_card(s->name, &s->card);
  1028. qemu_register_reset((void *) tsc210x_reset, s);
  1029. register_savevm(NULL, s->name, -1, 0, tsc210x_save, tsc210x_load, s);
  1030. return &s->chip;
  1031. }
  1032. I2SCodec *tsc210x_codec(uWireSlave *chip)
  1033. {
  1034. TSC210xState *s = (TSC210xState *) chip->opaque;
  1035. return &s->codec;
  1036. }
  1037. /*
  1038. * Use tslib generated calibration data to generate ADC input values
  1039. * from the touchscreen. Assuming 12-bit precision was used during
  1040. * tslib calibration.
  1041. */
  1042. void tsc210x_set_transform(uWireSlave *chip,
  1043. MouseTransformInfo *info)
  1044. {
  1045. TSC210xState *s = (TSC210xState *) chip->opaque;
  1046. #if 0
  1047. int64_t ltr[8];
  1048. ltr[0] = (int64_t) info->a[1] * info->y;
  1049. ltr[1] = (int64_t) info->a[4] * info->x;
  1050. ltr[2] = (int64_t) info->a[1] * info->a[3] -
  1051. (int64_t) info->a[4] * info->a[0];
  1052. ltr[3] = (int64_t) info->a[2] * info->a[4] -
  1053. (int64_t) info->a[5] * info->a[1];
  1054. ltr[4] = (int64_t) info->a[0] * info->y;
  1055. ltr[5] = (int64_t) info->a[3] * info->x;
  1056. ltr[6] = (int64_t) info->a[4] * info->a[0] -
  1057. (int64_t) info->a[1] * info->a[3];
  1058. ltr[7] = (int64_t) info->a[2] * info->a[3] -
  1059. (int64_t) info->a[5] * info->a[0];
  1060. /* Avoid integer overflow */
  1061. s->tr[0] = ltr[0] >> 11;
  1062. s->tr[1] = ltr[1] >> 11;
  1063. s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
  1064. s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
  1065. s->tr[4] = ltr[4] >> 11;
  1066. s->tr[5] = ltr[5] >> 11;
  1067. s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
  1068. s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
  1069. #else
  1070. /* This version assumes touchscreen X & Y axis are parallel or
  1071. * perpendicular to LCD's X & Y axis in some way. */
  1072. if (abs(info->a[0]) > abs(info->a[1])) {
  1073. s->tr[0] = 0;
  1074. s->tr[1] = -info->a[6] * info->x;
  1075. s->tr[2] = info->a[0];
  1076. s->tr[3] = -info->a[2] / info->a[0];
  1077. s->tr[4] = info->a[6] * info->y;
  1078. s->tr[5] = 0;
  1079. s->tr[6] = info->a[4];
  1080. s->tr[7] = -info->a[5] / info->a[4];
  1081. } else {
  1082. s->tr[0] = info->a[6] * info->y;
  1083. s->tr[1] = 0;
  1084. s->tr[2] = info->a[1];
  1085. s->tr[3] = -info->a[2] / info->a[1];
  1086. s->tr[4] = 0;
  1087. s->tr[5] = -info->a[6] * info->x;
  1088. s->tr[6] = info->a[3];
  1089. s->tr[7] = -info->a[5] / info->a[3];
  1090. }
  1091. s->tr[0] >>= 11;
  1092. s->tr[1] >>= 11;
  1093. s->tr[3] <<= 4;
  1094. s->tr[4] >>= 11;
  1095. s->tr[5] >>= 11;
  1096. s->tr[7] <<= 4;
  1097. #endif
  1098. }
  1099. void tsc210x_key_event(uWireSlave *chip, int key, int down)
  1100. {
  1101. TSC210xState *s = (TSC210xState *) chip->opaque;
  1102. if (down)
  1103. s->kb.down |= 1 << key;
  1104. else
  1105. s->kb.down &= ~(1 << key);
  1106. if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
  1107. s->kb.intr = 1;
  1108. qemu_irq_lower(s->kbint);
  1109. } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
  1110. !(s->kb.mode & 1)) {
  1111. s->kb.intr = 0;
  1112. qemu_irq_raise(s->kbint);
  1113. }
  1114. }