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pl110.c 13 KB

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  1. /*
  2. * Arm PrimeCell PL110 Color LCD Controller
  3. *
  4. * Copyright (c) 2005-2009 CodeSourcery.
  5. * Written by Paul Brook
  6. *
  7. * This code is licensed under the GNU LGPL
  8. */
  9. #include "sysbus.h"
  10. #include "ui/console.h"
  11. #include "framebuffer.h"
  12. #include "ui/pixel_ops.h"
  13. #define PL110_CR_EN 0x001
  14. #define PL110_CR_BGR 0x100
  15. #define PL110_CR_BEBO 0x200
  16. #define PL110_CR_BEPO 0x400
  17. #define PL110_CR_PWR 0x800
  18. enum pl110_bppmode
  19. {
  20. BPP_1,
  21. BPP_2,
  22. BPP_4,
  23. BPP_8,
  24. BPP_16,
  25. BPP_32,
  26. BPP_16_565, /* PL111 only */
  27. BPP_12 /* PL111 only */
  28. };
  29. /* The Versatile/PB uses a slightly modified PL110 controller. */
  30. enum pl110_version
  31. {
  32. PL110,
  33. PL110_VERSATILE,
  34. PL111
  35. };
  36. typedef struct {
  37. SysBusDevice busdev;
  38. MemoryRegion iomem;
  39. DisplayState *ds;
  40. int version;
  41. uint32_t timing[4];
  42. uint32_t cr;
  43. uint32_t upbase;
  44. uint32_t lpbase;
  45. uint32_t int_status;
  46. uint32_t int_mask;
  47. int cols;
  48. int rows;
  49. enum pl110_bppmode bpp;
  50. int invalidate;
  51. uint32_t mux_ctrl;
  52. uint32_t palette[256];
  53. uint32_t raw_palette[128];
  54. qemu_irq irq;
  55. } pl110_state;
  56. static int vmstate_pl110_post_load(void *opaque, int version_id);
  57. static const VMStateDescription vmstate_pl110 = {
  58. .name = "pl110",
  59. .version_id = 2,
  60. .minimum_version_id = 1,
  61. .post_load = vmstate_pl110_post_load,
  62. .fields = (VMStateField[]) {
  63. VMSTATE_INT32(version, pl110_state),
  64. VMSTATE_UINT32_ARRAY(timing, pl110_state, 4),
  65. VMSTATE_UINT32(cr, pl110_state),
  66. VMSTATE_UINT32(upbase, pl110_state),
  67. VMSTATE_UINT32(lpbase, pl110_state),
  68. VMSTATE_UINT32(int_status, pl110_state),
  69. VMSTATE_UINT32(int_mask, pl110_state),
  70. VMSTATE_INT32(cols, pl110_state),
  71. VMSTATE_INT32(rows, pl110_state),
  72. VMSTATE_UINT32(bpp, pl110_state),
  73. VMSTATE_INT32(invalidate, pl110_state),
  74. VMSTATE_UINT32_ARRAY(palette, pl110_state, 256),
  75. VMSTATE_UINT32_ARRAY(raw_palette, pl110_state, 128),
  76. VMSTATE_UINT32_V(mux_ctrl, pl110_state, 2),
  77. VMSTATE_END_OF_LIST()
  78. }
  79. };
  80. static const unsigned char pl110_id[] =
  81. { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  82. /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
  83. has a different ID. However Linux only looks for the normal ID. */
  84. #if 0
  85. static const unsigned char pl110_versatile_id[] =
  86. { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  87. #else
  88. #define pl110_versatile_id pl110_id
  89. #endif
  90. static const unsigned char pl111_id[] = {
  91. 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
  92. };
  93. /* Indexed by pl110_version */
  94. static const unsigned char *idregs[] = {
  95. pl110_id,
  96. pl110_versatile_id,
  97. pl111_id
  98. };
  99. #define BITS 8
  100. #include "pl110_template.h"
  101. #define BITS 15
  102. #include "pl110_template.h"
  103. #define BITS 16
  104. #include "pl110_template.h"
  105. #define BITS 24
  106. #include "pl110_template.h"
  107. #define BITS 32
  108. #include "pl110_template.h"
  109. static int pl110_enabled(pl110_state *s)
  110. {
  111. return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
  112. }
  113. static void pl110_update_display(void *opaque)
  114. {
  115. pl110_state *s = (pl110_state *)opaque;
  116. drawfn* fntable;
  117. drawfn fn;
  118. int dest_width;
  119. int src_width;
  120. int bpp_offset;
  121. int first;
  122. int last;
  123. if (!pl110_enabled(s))
  124. return;
  125. switch (ds_get_bits_per_pixel(s->ds)) {
  126. case 0:
  127. return;
  128. case 8:
  129. fntable = pl110_draw_fn_8;
  130. dest_width = 1;
  131. break;
  132. case 15:
  133. fntable = pl110_draw_fn_15;
  134. dest_width = 2;
  135. break;
  136. case 16:
  137. fntable = pl110_draw_fn_16;
  138. dest_width = 2;
  139. break;
  140. case 24:
  141. fntable = pl110_draw_fn_24;
  142. dest_width = 3;
  143. break;
  144. case 32:
  145. fntable = pl110_draw_fn_32;
  146. dest_width = 4;
  147. break;
  148. default:
  149. fprintf(stderr, "pl110: Bad color depth\n");
  150. exit(1);
  151. }
  152. if (s->cr & PL110_CR_BGR)
  153. bpp_offset = 0;
  154. else
  155. bpp_offset = 24;
  156. if ((s->version != PL111) && (s->bpp == BPP_16)) {
  157. /* The PL110's native 16 bit mode is 5551; however
  158. * most boards with a PL110 implement an external
  159. * mux which allows bits to be reshuffled to give
  160. * 565 format. The mux is typically controlled by
  161. * an external system register.
  162. * This is controlled by a GPIO input pin
  163. * so boards can wire it up to their register.
  164. *
  165. * The PL111 straightforwardly implements both
  166. * 5551 and 565 under control of the bpp field
  167. * in the LCDControl register.
  168. */
  169. switch (s->mux_ctrl) {
  170. case 3: /* 565 BGR */
  171. bpp_offset = (BPP_16_565 - BPP_16);
  172. break;
  173. case 1: /* 5551 */
  174. break;
  175. case 0: /* 888; also if we have loaded vmstate from an old version */
  176. case 2: /* 565 RGB */
  177. default:
  178. /* treat as 565 but honour BGR bit */
  179. bpp_offset += (BPP_16_565 - BPP_16);
  180. break;
  181. }
  182. }
  183. if (s->cr & PL110_CR_BEBO)
  184. fn = fntable[s->bpp + 8 + bpp_offset];
  185. else if (s->cr & PL110_CR_BEPO)
  186. fn = fntable[s->bpp + 16 + bpp_offset];
  187. else
  188. fn = fntable[s->bpp + bpp_offset];
  189. src_width = s->cols;
  190. switch (s->bpp) {
  191. case BPP_1:
  192. src_width >>= 3;
  193. break;
  194. case BPP_2:
  195. src_width >>= 2;
  196. break;
  197. case BPP_4:
  198. src_width >>= 1;
  199. break;
  200. case BPP_8:
  201. break;
  202. case BPP_16:
  203. case BPP_16_565:
  204. case BPP_12:
  205. src_width <<= 1;
  206. break;
  207. case BPP_32:
  208. src_width <<= 2;
  209. break;
  210. }
  211. dest_width *= s->cols;
  212. first = 0;
  213. framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
  214. s->upbase, s->cols, s->rows,
  215. src_width, dest_width, 0,
  216. s->invalidate,
  217. fn, s->palette,
  218. &first, &last);
  219. if (first >= 0) {
  220. dpy_gfx_update(s->ds, 0, first, s->cols, last - first + 1);
  221. }
  222. s->invalidate = 0;
  223. }
  224. static void pl110_invalidate_display(void * opaque)
  225. {
  226. pl110_state *s = (pl110_state *)opaque;
  227. s->invalidate = 1;
  228. if (pl110_enabled(s)) {
  229. qemu_console_resize(s->ds, s->cols, s->rows);
  230. }
  231. }
  232. static void pl110_update_palette(pl110_state *s, int n)
  233. {
  234. int i;
  235. uint32_t raw;
  236. unsigned int r, g, b;
  237. raw = s->raw_palette[n];
  238. n <<= 1;
  239. for (i = 0; i < 2; i++) {
  240. r = (raw & 0x1f) << 3;
  241. raw >>= 5;
  242. g = (raw & 0x1f) << 3;
  243. raw >>= 5;
  244. b = (raw & 0x1f) << 3;
  245. /* The I bit is ignored. */
  246. raw >>= 6;
  247. switch (ds_get_bits_per_pixel(s->ds)) {
  248. case 8:
  249. s->palette[n] = rgb_to_pixel8(r, g, b);
  250. break;
  251. case 15:
  252. s->palette[n] = rgb_to_pixel15(r, g, b);
  253. break;
  254. case 16:
  255. s->palette[n] = rgb_to_pixel16(r, g, b);
  256. break;
  257. case 24:
  258. case 32:
  259. s->palette[n] = rgb_to_pixel32(r, g, b);
  260. break;
  261. }
  262. n++;
  263. }
  264. }
  265. static void pl110_resize(pl110_state *s, int width, int height)
  266. {
  267. if (width != s->cols || height != s->rows) {
  268. if (pl110_enabled(s)) {
  269. qemu_console_resize(s->ds, width, height);
  270. }
  271. }
  272. s->cols = width;
  273. s->rows = height;
  274. }
  275. /* Update interrupts. */
  276. static void pl110_update(pl110_state *s)
  277. {
  278. /* TODO: Implement interrupts. */
  279. }
  280. static uint64_t pl110_read(void *opaque, hwaddr offset,
  281. unsigned size)
  282. {
  283. pl110_state *s = (pl110_state *)opaque;
  284. if (offset >= 0xfe0 && offset < 0x1000) {
  285. return idregs[s->version][(offset - 0xfe0) >> 2];
  286. }
  287. if (offset >= 0x200 && offset < 0x400) {
  288. return s->raw_palette[(offset - 0x200) >> 2];
  289. }
  290. switch (offset >> 2) {
  291. case 0: /* LCDTiming0 */
  292. return s->timing[0];
  293. case 1: /* LCDTiming1 */
  294. return s->timing[1];
  295. case 2: /* LCDTiming2 */
  296. return s->timing[2];
  297. case 3: /* LCDTiming3 */
  298. return s->timing[3];
  299. case 4: /* LCDUPBASE */
  300. return s->upbase;
  301. case 5: /* LCDLPBASE */
  302. return s->lpbase;
  303. case 6: /* LCDIMSC */
  304. if (s->version != PL110) {
  305. return s->cr;
  306. }
  307. return s->int_mask;
  308. case 7: /* LCDControl */
  309. if (s->version != PL110) {
  310. return s->int_mask;
  311. }
  312. return s->cr;
  313. case 8: /* LCDRIS */
  314. return s->int_status;
  315. case 9: /* LCDMIS */
  316. return s->int_status & s->int_mask;
  317. case 11: /* LCDUPCURR */
  318. /* TODO: Implement vertical refresh. */
  319. return s->upbase;
  320. case 12: /* LCDLPCURR */
  321. return s->lpbase;
  322. default:
  323. qemu_log_mask(LOG_GUEST_ERROR,
  324. "pl110_read: Bad offset %x\n", (int)offset);
  325. return 0;
  326. }
  327. }
  328. static void pl110_write(void *opaque, hwaddr offset,
  329. uint64_t val, unsigned size)
  330. {
  331. pl110_state *s = (pl110_state *)opaque;
  332. int n;
  333. /* For simplicity invalidate the display whenever a control register
  334. is written to. */
  335. s->invalidate = 1;
  336. if (offset >= 0x200 && offset < 0x400) {
  337. /* Palette. */
  338. n = (offset - 0x200) >> 2;
  339. s->raw_palette[(offset - 0x200) >> 2] = val;
  340. pl110_update_palette(s, n);
  341. return;
  342. }
  343. switch (offset >> 2) {
  344. case 0: /* LCDTiming0 */
  345. s->timing[0] = val;
  346. n = ((val & 0xfc) + 4) * 4;
  347. pl110_resize(s, n, s->rows);
  348. break;
  349. case 1: /* LCDTiming1 */
  350. s->timing[1] = val;
  351. n = (val & 0x3ff) + 1;
  352. pl110_resize(s, s->cols, n);
  353. break;
  354. case 2: /* LCDTiming2 */
  355. s->timing[2] = val;
  356. break;
  357. case 3: /* LCDTiming3 */
  358. s->timing[3] = val;
  359. break;
  360. case 4: /* LCDUPBASE */
  361. s->upbase = val;
  362. break;
  363. case 5: /* LCDLPBASE */
  364. s->lpbase = val;
  365. break;
  366. case 6: /* LCDIMSC */
  367. if (s->version != PL110) {
  368. goto control;
  369. }
  370. imsc:
  371. s->int_mask = val;
  372. pl110_update(s);
  373. break;
  374. case 7: /* LCDControl */
  375. if (s->version != PL110) {
  376. goto imsc;
  377. }
  378. control:
  379. s->cr = val;
  380. s->bpp = (val >> 1) & 7;
  381. if (pl110_enabled(s)) {
  382. qemu_console_resize(s->ds, s->cols, s->rows);
  383. }
  384. break;
  385. case 10: /* LCDICR */
  386. s->int_status &= ~val;
  387. pl110_update(s);
  388. break;
  389. default:
  390. qemu_log_mask(LOG_GUEST_ERROR,
  391. "pl110_write: Bad offset %x\n", (int)offset);
  392. }
  393. }
  394. static const MemoryRegionOps pl110_ops = {
  395. .read = pl110_read,
  396. .write = pl110_write,
  397. .endianness = DEVICE_NATIVE_ENDIAN,
  398. };
  399. static void pl110_mux_ctrl_set(void *opaque, int line, int level)
  400. {
  401. pl110_state *s = (pl110_state *)opaque;
  402. s->mux_ctrl = level;
  403. }
  404. static int vmstate_pl110_post_load(void *opaque, int version_id)
  405. {
  406. pl110_state *s = opaque;
  407. /* Make sure we redraw, and at the right size */
  408. pl110_invalidate_display(s);
  409. return 0;
  410. }
  411. static int pl110_init(SysBusDevice *dev)
  412. {
  413. pl110_state *s = FROM_SYSBUS(pl110_state, dev);
  414. memory_region_init_io(&s->iomem, &pl110_ops, s, "pl110", 0x1000);
  415. sysbus_init_mmio(dev, &s->iomem);
  416. sysbus_init_irq(dev, &s->irq);
  417. qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
  418. s->ds = graphic_console_init(pl110_update_display,
  419. pl110_invalidate_display,
  420. NULL, NULL, s);
  421. return 0;
  422. }
  423. static int pl110_versatile_init(SysBusDevice *dev)
  424. {
  425. pl110_state *s = FROM_SYSBUS(pl110_state, dev);
  426. s->version = PL110_VERSATILE;
  427. return pl110_init(dev);
  428. }
  429. static int pl111_init(SysBusDevice *dev)
  430. {
  431. pl110_state *s = FROM_SYSBUS(pl110_state, dev);
  432. s->version = PL111;
  433. return pl110_init(dev);
  434. }
  435. static void pl110_class_init(ObjectClass *klass, void *data)
  436. {
  437. DeviceClass *dc = DEVICE_CLASS(klass);
  438. SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  439. k->init = pl110_init;
  440. dc->no_user = 1;
  441. dc->vmsd = &vmstate_pl110;
  442. }
  443. static const TypeInfo pl110_info = {
  444. .name = "pl110",
  445. .parent = TYPE_SYS_BUS_DEVICE,
  446. .instance_size = sizeof(pl110_state),
  447. .class_init = pl110_class_init,
  448. };
  449. static void pl110_versatile_class_init(ObjectClass *klass, void *data)
  450. {
  451. DeviceClass *dc = DEVICE_CLASS(klass);
  452. SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  453. k->init = pl110_versatile_init;
  454. dc->no_user = 1;
  455. dc->vmsd = &vmstate_pl110;
  456. }
  457. static const TypeInfo pl110_versatile_info = {
  458. .name = "pl110_versatile",
  459. .parent = TYPE_SYS_BUS_DEVICE,
  460. .instance_size = sizeof(pl110_state),
  461. .class_init = pl110_versatile_class_init,
  462. };
  463. static void pl111_class_init(ObjectClass *klass, void *data)
  464. {
  465. DeviceClass *dc = DEVICE_CLASS(klass);
  466. SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  467. k->init = pl111_init;
  468. dc->no_user = 1;
  469. dc->vmsd = &vmstate_pl110;
  470. }
  471. static const TypeInfo pl111_info = {
  472. .name = "pl111",
  473. .parent = TYPE_SYS_BUS_DEVICE,
  474. .instance_size = sizeof(pl110_state),
  475. .class_init = pl111_class_init,
  476. };
  477. static void pl110_register_types(void)
  478. {
  479. type_register_static(&pl110_info);
  480. type_register_static(&pl110_versatile_info);
  481. type_register_static(&pl111_info);
  482. }
  483. type_init(pl110_register_types)