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omap_synctimer.c 2.8 KB

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  1. /*
  2. * TI OMAP2 32kHz sync timer emulation.
  3. *
  4. * Copyright (C) 2007-2008 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) any later version of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "hw.h"
  21. #include "qemu/timer.h"
  22. #include "omap.h"
  23. struct omap_synctimer_s {
  24. MemoryRegion iomem;
  25. uint32_t val;
  26. uint16_t readh;
  27. };
  28. /* 32-kHz Sync Timer of the OMAP2 */
  29. static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
  30. return muldiv64(qemu_get_clock_ns(vm_clock), 0x8000, get_ticks_per_sec());
  31. }
  32. void omap_synctimer_reset(struct omap_synctimer_s *s)
  33. {
  34. s->val = omap_synctimer_read(s);
  35. }
  36. static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
  37. {
  38. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  39. switch (addr) {
  40. case 0x00: /* 32KSYNCNT_REV */
  41. return 0x21;
  42. case 0x10: /* CR */
  43. return omap_synctimer_read(s) - s->val;
  44. }
  45. OMAP_BAD_REG(addr);
  46. return 0;
  47. }
  48. static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
  49. {
  50. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  51. uint32_t ret;
  52. if (addr & 2)
  53. return s->readh;
  54. else {
  55. ret = omap_synctimer_readw(opaque, addr);
  56. s->readh = ret >> 16;
  57. return ret & 0xffff;
  58. }
  59. }
  60. static void omap_synctimer_write(void *opaque, hwaddr addr,
  61. uint32_t value)
  62. {
  63. OMAP_BAD_REG(addr);
  64. }
  65. static const MemoryRegionOps omap_synctimer_ops = {
  66. .old_mmio = {
  67. .read = {
  68. omap_badwidth_read32,
  69. omap_synctimer_readh,
  70. omap_synctimer_readw,
  71. },
  72. .write = {
  73. omap_badwidth_write32,
  74. omap_synctimer_write,
  75. omap_synctimer_write,
  76. },
  77. },
  78. .endianness = DEVICE_NATIVE_ENDIAN,
  79. };
  80. struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
  81. struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
  82. {
  83. struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
  84. omap_synctimer_reset(s);
  85. memory_region_init_io(&s->iomem, &omap_synctimer_ops, s, "omap.synctimer",
  86. omap_l4_region_size(ta, 0));
  87. omap_l4_attach(ta, 0, &s->iomem);
  88. return s;
  89. }