bt.h 56 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190
  1. /*
  2. * QEMU Bluetooth HCI helpers.
  3. *
  4. * Copyright (C) 2007 OpenMoko, Inc.
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * Useful definitions taken from BlueZ project's headers.
  8. * Copyright (C) 2000-2001 Qualcomm Incorporated
  9. * Copyright (C) 2002-2003 Maxim Krasnyansky <maxk@qualcomm.com>
  10. * Copyright (C) 2002-2006 Marcel Holtmann <marcel@holtmann.org>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  24. */
  25. #ifndef HW_BT_H
  26. #define HW_BT_H 1
  27. #include "hw/irq.h"
  28. /* BD Address */
  29. typedef struct {
  30. uint8_t b[6];
  31. } QEMU_PACKED bdaddr_t;
  32. #define BDADDR_ANY (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}})
  33. #define BDADDR_ALL (&(bdaddr_t) {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}})
  34. #define BDADDR_LOCAL (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}})
  35. /* Copy, swap, convert BD Address */
  36. static inline int bacmp(const bdaddr_t *ba1, const bdaddr_t *ba2)
  37. {
  38. return memcmp(ba1, ba2, sizeof(bdaddr_t));
  39. }
  40. static inline void bacpy(bdaddr_t *dst, const bdaddr_t *src)
  41. {
  42. memcpy(dst, src, sizeof(bdaddr_t));
  43. }
  44. #define BAINIT(orig) { .b = { \
  45. (orig)->b[0], (orig)->b[1], (orig)->b[2], \
  46. (orig)->b[3], (orig)->b[4], (orig)->b[5], \
  47. }, }
  48. /* The twisted structures of a bluetooth environment */
  49. struct bt_device_s;
  50. struct bt_scatternet_s;
  51. struct bt_piconet_s;
  52. struct bt_link_s;
  53. struct bt_scatternet_s {
  54. struct bt_device_s *slave;
  55. };
  56. struct bt_link_s {
  57. struct bt_device_s *slave, *host;
  58. uint16_t handle; /* Master (host) side handle */
  59. uint16_t acl_interval;
  60. enum {
  61. acl_active,
  62. acl_hold,
  63. acl_sniff,
  64. acl_parked,
  65. } acl_mode;
  66. };
  67. struct bt_device_s {
  68. int lt_addr;
  69. bdaddr_t bd_addr;
  70. int mtu;
  71. int setup;
  72. struct bt_scatternet_s *net;
  73. uint8_t key[16];
  74. int key_present;
  75. uint8_t class[3];
  76. uint8_t reject_reason;
  77. uint64_t lmp_caps;
  78. const char *lmp_name;
  79. void (*lmp_connection_request)(struct bt_link_s *link);
  80. void (*lmp_connection_complete)(struct bt_link_s *link);
  81. void (*lmp_disconnect_master)(struct bt_link_s *link);
  82. void (*lmp_disconnect_slave)(struct bt_link_s *link);
  83. void (*lmp_acl_data)(struct bt_link_s *link, const uint8_t *data,
  84. int start, int len);
  85. void (*lmp_acl_resp)(struct bt_link_s *link, const uint8_t *data,
  86. int start, int len);
  87. void (*lmp_mode_change)(struct bt_link_s *link);
  88. void (*handle_destroy)(struct bt_device_s *device);
  89. struct bt_device_s *next; /* Next in the piconet/scatternet */
  90. int inquiry_scan;
  91. int page_scan;
  92. uint16_t clkoff; /* Note: Always little-endian */
  93. };
  94. /* bt.c */
  95. void bt_device_init(struct bt_device_s *dev, struct bt_scatternet_s *net);
  96. void bt_device_done(struct bt_device_s *dev);
  97. /* bt-hci.c */
  98. struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net);
  99. /* bt-vhci.c */
  100. void bt_vhci_init(struct HCIInfo *info);
  101. /* bt-hci-csr.c */
  102. enum {
  103. csrhci_pin_reset,
  104. csrhci_pin_wakeup,
  105. __csrhci_pins,
  106. };
  107. qemu_irq *csrhci_pins_get(CharDriverState *chr);
  108. CharDriverState *uart_hci_init(qemu_irq wakeup);
  109. /* bt-l2cap.c */
  110. struct bt_l2cap_device_s;
  111. struct bt_l2cap_conn_params_s;
  112. struct bt_l2cap_psm_s;
  113. void bt_l2cap_device_init(struct bt_l2cap_device_s *dev,
  114. struct bt_scatternet_s *net);
  115. void bt_l2cap_device_done(struct bt_l2cap_device_s *dev);
  116. void bt_l2cap_psm_register(struct bt_l2cap_device_s *dev, int psm,
  117. int min_mtu, int (*new_channel)(struct bt_l2cap_device_s *dev,
  118. struct bt_l2cap_conn_params_s *params));
  119. struct bt_l2cap_device_s {
  120. struct bt_device_s device;
  121. struct bt_l2cap_psm_s *first_psm;
  122. };
  123. struct bt_l2cap_conn_params_s {
  124. /* Input */
  125. uint8_t *(*sdu_out)(struct bt_l2cap_conn_params_s *chan, int len);
  126. void (*sdu_submit)(struct bt_l2cap_conn_params_s *chan);
  127. int remote_mtu;
  128. /* Output */
  129. void *opaque;
  130. void (*sdu_in)(void *opaque, const uint8_t *data, int len);
  131. void (*close)(void *opaque);
  132. };
  133. enum bt_l2cap_psm_predef {
  134. BT_PSM_SDP = 0x0001,
  135. BT_PSM_RFCOMM = 0x0003,
  136. BT_PSM_TELEPHONY = 0x0005,
  137. BT_PSM_TCS = 0x0007,
  138. BT_PSM_BNEP = 0x000f,
  139. BT_PSM_HID_CTRL = 0x0011,
  140. BT_PSM_HID_INTR = 0x0013,
  141. BT_PSM_UPNP = 0x0015,
  142. BT_PSM_AVCTP = 0x0017,
  143. BT_PSM_AVDTP = 0x0019,
  144. };
  145. /* bt-sdp.c */
  146. void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev);
  147. /* bt-hid.c */
  148. struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net);
  149. struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net);
  150. struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net);
  151. /* Link Management Protocol layer defines */
  152. #define LLID_ACLU_CONT 0x1
  153. #define LLID_ACLU_START 0x2
  154. #define LLID_ACLC 0x3
  155. enum lmp_pdu_type {
  156. LMP_NAME_REQ = 0x0001,
  157. LMP_NAME_RES = 0x0002,
  158. LMP_ACCEPTED = 0x0003,
  159. LMP_NOT_ACCEPTED = 0x0004,
  160. LMP_CLKOFFSET_REQ = 0x0005,
  161. LMP_CLKOFFSET_RES = 0x0006,
  162. LMP_DETACH = 0x0007,
  163. LMP_IN_RAND = 0x0008,
  164. LMP_COMB_KEY = 0x0009,
  165. LMP_UNIT_KEY = 0x000a,
  166. LMP_AU_RAND = 0x000b,
  167. LMP_SRES = 0x000c,
  168. LMP_TEMP_RAND = 0x000d,
  169. LMP_TEMP_KEY = 0x000e,
  170. LMP_CRYPT_MODE_REQ = 0x000f,
  171. LMP_CRYPT_KEY_SIZE_REQ = 0x0010,
  172. LMP_START_ENCRYPT_REQ = 0x0011,
  173. LMP_STOP_ENCRYPT_REQ = 0x0012,
  174. LMP_SWITCH_REQ = 0x0013,
  175. LMP_HOLD = 0x0014,
  176. LMP_HOLD_REQ = 0x0015,
  177. LMP_SNIFF_REQ = 0x0017,
  178. LMP_UNSNIFF_REQ = 0x0018,
  179. LMP_LMP_PARK_REQ = 0x0019,
  180. LMP_SET_BCAST_SCAN_WND = 0x001b,
  181. LMP_MODIFY_BEACON = 0x001c,
  182. LMP_UNPARK_BD_ADDR_REQ = 0x001d,
  183. LMP_UNPARK_PM_ADDR_REQ = 0x001e,
  184. LMP_INCR_POWER_REQ = 0x001f,
  185. LMP_DECR_POWER_REQ = 0x0020,
  186. LMP_MAX_POWER = 0x0021,
  187. LMP_MIN_POWER = 0x0022,
  188. LMP_AUTO_RATE = 0x0023,
  189. LMP_PREFERRED_RATE = 0x0024,
  190. LMP_VERSION_REQ = 0x0025,
  191. LMP_VERSION_RES = 0x0026,
  192. LMP_FEATURES_REQ = 0x0027,
  193. LMP_FEATURES_RES = 0x0028,
  194. LMP_QUALITY_OF_SERVICE = 0x0029,
  195. LMP_QOS_REQ = 0x002a,
  196. LMP_RM_SCO_LINK_REQ = 0x002b,
  197. LMP_SCO_LINK_REQ = 0x002c,
  198. LMP_MAX_SLOT = 0x002d,
  199. LMP_MAX_SLOT_REQ = 0x002e,
  200. LMP_TIMING_ACCURACY_REQ = 0x002f,
  201. LMP_TIMING_ACCURACY_RES = 0x0030,
  202. LMP_SETUP_COMPLETE = 0x0031,
  203. LMP_USE_SEMIPERM_KEY = 0x0032,
  204. LMP_HOST_CONNECTION_REQ = 0x0033,
  205. LMP_SLOT_OFFSET = 0x0034,
  206. LMP_PAGE_MODE_REQ = 0x0035,
  207. LMP_PAGE_SCAN_MODE_REQ = 0x0036,
  208. LMP_SUPERVISION_TIMEOUT = 0x0037,
  209. LMP_TEST_ACTIVATE = 0x0038,
  210. LMP_TEST_CONTROL = 0x0039,
  211. LMP_CRYPT_KEY_MASK_REQ = 0x003a,
  212. LMP_CRYPT_KEY_MASK_RES = 0x003b,
  213. LMP_SET_AFH = 0x003c,
  214. LMP_ACCEPTED_EXT = 0x7f01,
  215. LMP_NOT_ACCEPTED_EXT = 0x7f02,
  216. LMP_FEATURES_REQ_EXT = 0x7f03,
  217. LMP_FEATURES_RES_EXT = 0x7f04,
  218. LMP_PACKET_TYPE_TBL_REQ = 0x7f0b,
  219. LMP_ESCO_LINK_REQ = 0x7f0c,
  220. LMP_RM_ESCO_LINK_REQ = 0x7f0d,
  221. LMP_CHANNEL_CLASS_REQ = 0x7f10,
  222. LMP_CHANNEL_CLASS = 0x7f11,
  223. };
  224. /* Host Controller Interface layer defines */
  225. enum hci_packet_type {
  226. HCI_COMMAND_PKT = 0x01,
  227. HCI_ACLDATA_PKT = 0x02,
  228. HCI_SCODATA_PKT = 0x03,
  229. HCI_EVENT_PKT = 0x04,
  230. HCI_VENDOR_PKT = 0xff,
  231. };
  232. enum bt_packet_type {
  233. HCI_2DH1 = 1 << 1,
  234. HCI_3DH1 = 1 << 2,
  235. HCI_DM1 = 1 << 3,
  236. HCI_DH1 = 1 << 4,
  237. HCI_2DH3 = 1 << 8,
  238. HCI_3DH3 = 1 << 9,
  239. HCI_DM3 = 1 << 10,
  240. HCI_DH3 = 1 << 11,
  241. HCI_2DH5 = 1 << 12,
  242. HCI_3DH5 = 1 << 13,
  243. HCI_DM5 = 1 << 14,
  244. HCI_DH5 = 1 << 15,
  245. };
  246. enum sco_packet_type {
  247. HCI_HV1 = 1 << 5,
  248. HCI_HV2 = 1 << 6,
  249. HCI_HV3 = 1 << 7,
  250. };
  251. enum ev_packet_type {
  252. HCI_EV3 = 1 << 3,
  253. HCI_EV4 = 1 << 4,
  254. HCI_EV5 = 1 << 5,
  255. HCI_2EV3 = 1 << 6,
  256. HCI_3EV3 = 1 << 7,
  257. HCI_2EV5 = 1 << 8,
  258. HCI_3EV5 = 1 << 9,
  259. };
  260. enum hci_error_code {
  261. HCI_SUCCESS = 0x00,
  262. HCI_UNKNOWN_COMMAND = 0x01,
  263. HCI_NO_CONNECTION = 0x02,
  264. HCI_HARDWARE_FAILURE = 0x03,
  265. HCI_PAGE_TIMEOUT = 0x04,
  266. HCI_AUTHENTICATION_FAILURE = 0x05,
  267. HCI_PIN_OR_KEY_MISSING = 0x06,
  268. HCI_MEMORY_FULL = 0x07,
  269. HCI_CONNECTION_TIMEOUT = 0x08,
  270. HCI_MAX_NUMBER_OF_CONNECTIONS = 0x09,
  271. HCI_MAX_NUMBER_OF_SCO_CONNECTIONS = 0x0a,
  272. HCI_ACL_CONNECTION_EXISTS = 0x0b,
  273. HCI_COMMAND_DISALLOWED = 0x0c,
  274. HCI_REJECTED_LIMITED_RESOURCES = 0x0d,
  275. HCI_REJECTED_SECURITY = 0x0e,
  276. HCI_REJECTED_PERSONAL = 0x0f,
  277. HCI_HOST_TIMEOUT = 0x10,
  278. HCI_UNSUPPORTED_FEATURE = 0x11,
  279. HCI_INVALID_PARAMETERS = 0x12,
  280. HCI_OE_USER_ENDED_CONNECTION = 0x13,
  281. HCI_OE_LOW_RESOURCES = 0x14,
  282. HCI_OE_POWER_OFF = 0x15,
  283. HCI_CONNECTION_TERMINATED = 0x16,
  284. HCI_REPEATED_ATTEMPTS = 0x17,
  285. HCI_PAIRING_NOT_ALLOWED = 0x18,
  286. HCI_UNKNOWN_LMP_PDU = 0x19,
  287. HCI_UNSUPPORTED_REMOTE_FEATURE = 0x1a,
  288. HCI_SCO_OFFSET_REJECTED = 0x1b,
  289. HCI_SCO_INTERVAL_REJECTED = 0x1c,
  290. HCI_AIR_MODE_REJECTED = 0x1d,
  291. HCI_INVALID_LMP_PARAMETERS = 0x1e,
  292. HCI_UNSPECIFIED_ERROR = 0x1f,
  293. HCI_UNSUPPORTED_LMP_PARAMETER_VALUE = 0x20,
  294. HCI_ROLE_CHANGE_NOT_ALLOWED = 0x21,
  295. HCI_LMP_RESPONSE_TIMEOUT = 0x22,
  296. HCI_LMP_ERROR_TRANSACTION_COLLISION = 0x23,
  297. HCI_LMP_PDU_NOT_ALLOWED = 0x24,
  298. HCI_ENCRYPTION_MODE_NOT_ACCEPTED = 0x25,
  299. HCI_UNIT_LINK_KEY_USED = 0x26,
  300. HCI_QOS_NOT_SUPPORTED = 0x27,
  301. HCI_INSTANT_PASSED = 0x28,
  302. HCI_PAIRING_NOT_SUPPORTED = 0x29,
  303. HCI_TRANSACTION_COLLISION = 0x2a,
  304. HCI_QOS_UNACCEPTABLE_PARAMETER = 0x2c,
  305. HCI_QOS_REJECTED = 0x2d,
  306. HCI_CLASSIFICATION_NOT_SUPPORTED = 0x2e,
  307. HCI_INSUFFICIENT_SECURITY = 0x2f,
  308. HCI_PARAMETER_OUT_OF_RANGE = 0x30,
  309. HCI_ROLE_SWITCH_PENDING = 0x32,
  310. HCI_SLOT_VIOLATION = 0x34,
  311. HCI_ROLE_SWITCH_FAILED = 0x35,
  312. };
  313. enum acl_flag_bits {
  314. ACL_CONT = 1 << 0,
  315. ACL_START = 1 << 1,
  316. ACL_ACTIVE_BCAST = 1 << 2,
  317. ACL_PICO_BCAST = 1 << 3,
  318. };
  319. enum baseband_link_type {
  320. SCO_LINK = 0x00,
  321. ACL_LINK = 0x01,
  322. };
  323. enum lmp_feature_bits0 {
  324. LMP_3SLOT = 1 << 0,
  325. LMP_5SLOT = 1 << 1,
  326. LMP_ENCRYPT = 1 << 2,
  327. LMP_SOFFSET = 1 << 3,
  328. LMP_TACCURACY = 1 << 4,
  329. LMP_RSWITCH = 1 << 5,
  330. LMP_HOLD_MODE = 1 << 6,
  331. LMP_SNIFF_MODE = 1 << 7,
  332. };
  333. enum lmp_feature_bits1 {
  334. LMP_PARK = 1 << 0,
  335. LMP_RSSI = 1 << 1,
  336. LMP_QUALITY = 1 << 2,
  337. LMP_SCO = 1 << 3,
  338. LMP_HV2 = 1 << 4,
  339. LMP_HV3 = 1 << 5,
  340. LMP_ULAW = 1 << 6,
  341. LMP_ALAW = 1 << 7,
  342. };
  343. enum lmp_feature_bits2 {
  344. LMP_CVSD = 1 << 0,
  345. LMP_PSCHEME = 1 << 1,
  346. LMP_PCONTROL = 1 << 2,
  347. LMP_TRSP_SCO = 1 << 3,
  348. LMP_BCAST_ENC = 1 << 7,
  349. };
  350. enum lmp_feature_bits3 {
  351. LMP_EDR_ACL_2M = 1 << 1,
  352. LMP_EDR_ACL_3M = 1 << 2,
  353. LMP_ENH_ISCAN = 1 << 3,
  354. LMP_ILACE_ISCAN = 1 << 4,
  355. LMP_ILACE_PSCAN = 1 << 5,
  356. LMP_RSSI_INQ = 1 << 6,
  357. LMP_ESCO = 1 << 7,
  358. };
  359. enum lmp_feature_bits4 {
  360. LMP_EV4 = 1 << 0,
  361. LMP_EV5 = 1 << 1,
  362. LMP_AFH_CAP_SLV = 1 << 3,
  363. LMP_AFH_CLS_SLV = 1 << 4,
  364. LMP_EDR_3SLOT = 1 << 7,
  365. };
  366. enum lmp_feature_bits5 {
  367. LMP_EDR_5SLOT = 1 << 0,
  368. LMP_SNIFF_SUBR = 1 << 1,
  369. LMP_AFH_CAP_MST = 1 << 3,
  370. LMP_AFH_CLS_MST = 1 << 4,
  371. LMP_EDR_ESCO_2M = 1 << 5,
  372. LMP_EDR_ESCO_3M = 1 << 6,
  373. LMP_EDR_3S_ESCO = 1 << 7,
  374. };
  375. enum lmp_feature_bits6 {
  376. LMP_EXT_INQ = 1 << 0,
  377. };
  378. enum lmp_feature_bits7 {
  379. LMP_EXT_FEAT = 1 << 7,
  380. };
  381. enum hci_link_policy {
  382. HCI_LP_RSWITCH = 1 << 0,
  383. HCI_LP_HOLD = 1 << 1,
  384. HCI_LP_SNIFF = 1 << 2,
  385. HCI_LP_PARK = 1 << 3,
  386. };
  387. enum hci_link_mode {
  388. HCI_LM_ACCEPT = 1 << 15,
  389. HCI_LM_MASTER = 1 << 0,
  390. HCI_LM_AUTH = 1 << 1,
  391. HCI_LM_ENCRYPT = 1 << 2,
  392. HCI_LM_TRUSTED = 1 << 3,
  393. HCI_LM_RELIABLE = 1 << 4,
  394. HCI_LM_SECURE = 1 << 5,
  395. };
  396. /* HCI Commands */
  397. /* Link Control */
  398. #define OGF_LINK_CTL 0x01
  399. #define OCF_INQUIRY 0x0001
  400. typedef struct {
  401. uint8_t lap[3];
  402. uint8_t length; /* 1.28s units */
  403. uint8_t num_rsp;
  404. } QEMU_PACKED inquiry_cp;
  405. #define INQUIRY_CP_SIZE 5
  406. typedef struct {
  407. uint8_t status;
  408. bdaddr_t bdaddr;
  409. } QEMU_PACKED status_bdaddr_rp;
  410. #define STATUS_BDADDR_RP_SIZE 7
  411. #define OCF_INQUIRY_CANCEL 0x0002
  412. #define OCF_PERIODIC_INQUIRY 0x0003
  413. typedef struct {
  414. uint16_t max_period; /* 1.28s units */
  415. uint16_t min_period; /* 1.28s units */
  416. uint8_t lap[3];
  417. uint8_t length; /* 1.28s units */
  418. uint8_t num_rsp;
  419. } QEMU_PACKED periodic_inquiry_cp;
  420. #define PERIODIC_INQUIRY_CP_SIZE 9
  421. #define OCF_EXIT_PERIODIC_INQUIRY 0x0004
  422. #define OCF_CREATE_CONN 0x0005
  423. typedef struct {
  424. bdaddr_t bdaddr;
  425. uint16_t pkt_type;
  426. uint8_t pscan_rep_mode;
  427. uint8_t pscan_mode;
  428. uint16_t clock_offset;
  429. uint8_t role_switch;
  430. } QEMU_PACKED create_conn_cp;
  431. #define CREATE_CONN_CP_SIZE 13
  432. #define OCF_DISCONNECT 0x0006
  433. typedef struct {
  434. uint16_t handle;
  435. uint8_t reason;
  436. } QEMU_PACKED disconnect_cp;
  437. #define DISCONNECT_CP_SIZE 3
  438. #define OCF_ADD_SCO 0x0007
  439. typedef struct {
  440. uint16_t handle;
  441. uint16_t pkt_type;
  442. } QEMU_PACKED add_sco_cp;
  443. #define ADD_SCO_CP_SIZE 4
  444. #define OCF_CREATE_CONN_CANCEL 0x0008
  445. typedef struct {
  446. uint8_t status;
  447. bdaddr_t bdaddr;
  448. } QEMU_PACKED create_conn_cancel_cp;
  449. #define CREATE_CONN_CANCEL_CP_SIZE 6
  450. typedef struct {
  451. uint8_t status;
  452. bdaddr_t bdaddr;
  453. } QEMU_PACKED create_conn_cancel_rp;
  454. #define CREATE_CONN_CANCEL_RP_SIZE 7
  455. #define OCF_ACCEPT_CONN_REQ 0x0009
  456. typedef struct {
  457. bdaddr_t bdaddr;
  458. uint8_t role;
  459. } QEMU_PACKED accept_conn_req_cp;
  460. #define ACCEPT_CONN_REQ_CP_SIZE 7
  461. #define OCF_REJECT_CONN_REQ 0x000A
  462. typedef struct {
  463. bdaddr_t bdaddr;
  464. uint8_t reason;
  465. } QEMU_PACKED reject_conn_req_cp;
  466. #define REJECT_CONN_REQ_CP_SIZE 7
  467. #define OCF_LINK_KEY_REPLY 0x000B
  468. typedef struct {
  469. bdaddr_t bdaddr;
  470. uint8_t link_key[16];
  471. } QEMU_PACKED link_key_reply_cp;
  472. #define LINK_KEY_REPLY_CP_SIZE 22
  473. #define OCF_LINK_KEY_NEG_REPLY 0x000C
  474. #define OCF_PIN_CODE_REPLY 0x000D
  475. typedef struct {
  476. bdaddr_t bdaddr;
  477. uint8_t pin_len;
  478. uint8_t pin_code[16];
  479. } QEMU_PACKED pin_code_reply_cp;
  480. #define PIN_CODE_REPLY_CP_SIZE 23
  481. #define OCF_PIN_CODE_NEG_REPLY 0x000E
  482. #define OCF_SET_CONN_PTYPE 0x000F
  483. typedef struct {
  484. uint16_t handle;
  485. uint16_t pkt_type;
  486. } QEMU_PACKED set_conn_ptype_cp;
  487. #define SET_CONN_PTYPE_CP_SIZE 4
  488. #define OCF_AUTH_REQUESTED 0x0011
  489. typedef struct {
  490. uint16_t handle;
  491. } QEMU_PACKED auth_requested_cp;
  492. #define AUTH_REQUESTED_CP_SIZE 2
  493. #define OCF_SET_CONN_ENCRYPT 0x0013
  494. typedef struct {
  495. uint16_t handle;
  496. uint8_t encrypt;
  497. } QEMU_PACKED set_conn_encrypt_cp;
  498. #define SET_CONN_ENCRYPT_CP_SIZE 3
  499. #define OCF_CHANGE_CONN_LINK_KEY 0x0015
  500. typedef struct {
  501. uint16_t handle;
  502. } QEMU_PACKED change_conn_link_key_cp;
  503. #define CHANGE_CONN_LINK_KEY_CP_SIZE 2
  504. #define OCF_MASTER_LINK_KEY 0x0017
  505. typedef struct {
  506. uint8_t key_flag;
  507. } QEMU_PACKED master_link_key_cp;
  508. #define MASTER_LINK_KEY_CP_SIZE 1
  509. #define OCF_REMOTE_NAME_REQ 0x0019
  510. typedef struct {
  511. bdaddr_t bdaddr;
  512. uint8_t pscan_rep_mode;
  513. uint8_t pscan_mode;
  514. uint16_t clock_offset;
  515. } QEMU_PACKED remote_name_req_cp;
  516. #define REMOTE_NAME_REQ_CP_SIZE 10
  517. #define OCF_REMOTE_NAME_REQ_CANCEL 0x001A
  518. typedef struct {
  519. bdaddr_t bdaddr;
  520. } QEMU_PACKED remote_name_req_cancel_cp;
  521. #define REMOTE_NAME_REQ_CANCEL_CP_SIZE 6
  522. typedef struct {
  523. uint8_t status;
  524. bdaddr_t bdaddr;
  525. } QEMU_PACKED remote_name_req_cancel_rp;
  526. #define REMOTE_NAME_REQ_CANCEL_RP_SIZE 7
  527. #define OCF_READ_REMOTE_FEATURES 0x001B
  528. typedef struct {
  529. uint16_t handle;
  530. } QEMU_PACKED read_remote_features_cp;
  531. #define READ_REMOTE_FEATURES_CP_SIZE 2
  532. #define OCF_READ_REMOTE_EXT_FEATURES 0x001C
  533. typedef struct {
  534. uint16_t handle;
  535. uint8_t page_num;
  536. } QEMU_PACKED read_remote_ext_features_cp;
  537. #define READ_REMOTE_EXT_FEATURES_CP_SIZE 3
  538. #define OCF_READ_REMOTE_VERSION 0x001D
  539. typedef struct {
  540. uint16_t handle;
  541. } QEMU_PACKED read_remote_version_cp;
  542. #define READ_REMOTE_VERSION_CP_SIZE 2
  543. #define OCF_READ_CLOCK_OFFSET 0x001F
  544. typedef struct {
  545. uint16_t handle;
  546. } QEMU_PACKED read_clock_offset_cp;
  547. #define READ_CLOCK_OFFSET_CP_SIZE 2
  548. #define OCF_READ_LMP_HANDLE 0x0020
  549. typedef struct {
  550. uint16_t handle;
  551. } QEMU_PACKED read_lmp_handle_cp;
  552. #define READ_LMP_HANDLE_CP_SIZE 2
  553. typedef struct {
  554. uint8_t status;
  555. uint16_t handle;
  556. uint8_t lmp_handle;
  557. uint32_t reserved;
  558. } QEMU_PACKED read_lmp_handle_rp;
  559. #define READ_LMP_HANDLE_RP_SIZE 8
  560. #define OCF_SETUP_SYNC_CONN 0x0028
  561. typedef struct {
  562. uint16_t handle;
  563. uint32_t tx_bandwith;
  564. uint32_t rx_bandwith;
  565. uint16_t max_latency;
  566. uint16_t voice_setting;
  567. uint8_t retrans_effort;
  568. uint16_t pkt_type;
  569. } QEMU_PACKED setup_sync_conn_cp;
  570. #define SETUP_SYNC_CONN_CP_SIZE 17
  571. #define OCF_ACCEPT_SYNC_CONN_REQ 0x0029
  572. typedef struct {
  573. bdaddr_t bdaddr;
  574. uint32_t tx_bandwith;
  575. uint32_t rx_bandwith;
  576. uint16_t max_latency;
  577. uint16_t voice_setting;
  578. uint8_t retrans_effort;
  579. uint16_t pkt_type;
  580. } QEMU_PACKED accept_sync_conn_req_cp;
  581. #define ACCEPT_SYNC_CONN_REQ_CP_SIZE 21
  582. #define OCF_REJECT_SYNC_CONN_REQ 0x002A
  583. typedef struct {
  584. bdaddr_t bdaddr;
  585. uint8_t reason;
  586. } QEMU_PACKED reject_sync_conn_req_cp;
  587. #define REJECT_SYNC_CONN_REQ_CP_SIZE 7
  588. /* Link Policy */
  589. #define OGF_LINK_POLICY 0x02
  590. #define OCF_HOLD_MODE 0x0001
  591. typedef struct {
  592. uint16_t handle;
  593. uint16_t max_interval;
  594. uint16_t min_interval;
  595. } QEMU_PACKED hold_mode_cp;
  596. #define HOLD_MODE_CP_SIZE 6
  597. #define OCF_SNIFF_MODE 0x0003
  598. typedef struct {
  599. uint16_t handle;
  600. uint16_t max_interval;
  601. uint16_t min_interval;
  602. uint16_t attempt;
  603. uint16_t timeout;
  604. } QEMU_PACKED sniff_mode_cp;
  605. #define SNIFF_MODE_CP_SIZE 10
  606. #define OCF_EXIT_SNIFF_MODE 0x0004
  607. typedef struct {
  608. uint16_t handle;
  609. } QEMU_PACKED exit_sniff_mode_cp;
  610. #define EXIT_SNIFF_MODE_CP_SIZE 2
  611. #define OCF_PARK_MODE 0x0005
  612. typedef struct {
  613. uint16_t handle;
  614. uint16_t max_interval;
  615. uint16_t min_interval;
  616. } QEMU_PACKED park_mode_cp;
  617. #define PARK_MODE_CP_SIZE 6
  618. #define OCF_EXIT_PARK_MODE 0x0006
  619. typedef struct {
  620. uint16_t handle;
  621. } QEMU_PACKED exit_park_mode_cp;
  622. #define EXIT_PARK_MODE_CP_SIZE 2
  623. #define OCF_QOS_SETUP 0x0007
  624. typedef struct {
  625. uint8_t service_type; /* 1 = best effort */
  626. uint32_t token_rate; /* Byte per seconds */
  627. uint32_t peak_bandwidth; /* Byte per seconds */
  628. uint32_t latency; /* Microseconds */
  629. uint32_t delay_variation; /* Microseconds */
  630. } QEMU_PACKED hci_qos;
  631. #define HCI_QOS_CP_SIZE 17
  632. typedef struct {
  633. uint16_t handle;
  634. uint8_t flags; /* Reserved */
  635. hci_qos qos;
  636. } QEMU_PACKED qos_setup_cp;
  637. #define QOS_SETUP_CP_SIZE (3 + HCI_QOS_CP_SIZE)
  638. #define OCF_ROLE_DISCOVERY 0x0009
  639. typedef struct {
  640. uint16_t handle;
  641. } QEMU_PACKED role_discovery_cp;
  642. #define ROLE_DISCOVERY_CP_SIZE 2
  643. typedef struct {
  644. uint8_t status;
  645. uint16_t handle;
  646. uint8_t role;
  647. } QEMU_PACKED role_discovery_rp;
  648. #define ROLE_DISCOVERY_RP_SIZE 4
  649. #define OCF_SWITCH_ROLE 0x000B
  650. typedef struct {
  651. bdaddr_t bdaddr;
  652. uint8_t role;
  653. } QEMU_PACKED switch_role_cp;
  654. #define SWITCH_ROLE_CP_SIZE 7
  655. #define OCF_READ_LINK_POLICY 0x000C
  656. typedef struct {
  657. uint16_t handle;
  658. } QEMU_PACKED read_link_policy_cp;
  659. #define READ_LINK_POLICY_CP_SIZE 2
  660. typedef struct {
  661. uint8_t status;
  662. uint16_t handle;
  663. uint16_t policy;
  664. } QEMU_PACKED read_link_policy_rp;
  665. #define READ_LINK_POLICY_RP_SIZE 5
  666. #define OCF_WRITE_LINK_POLICY 0x000D
  667. typedef struct {
  668. uint16_t handle;
  669. uint16_t policy;
  670. } QEMU_PACKED write_link_policy_cp;
  671. #define WRITE_LINK_POLICY_CP_SIZE 4
  672. typedef struct {
  673. uint8_t status;
  674. uint16_t handle;
  675. } QEMU_PACKED write_link_policy_rp;
  676. #define WRITE_LINK_POLICY_RP_SIZE 3
  677. #define OCF_READ_DEFAULT_LINK_POLICY 0x000E
  678. #define OCF_WRITE_DEFAULT_LINK_POLICY 0x000F
  679. #define OCF_FLOW_SPECIFICATION 0x0010
  680. #define OCF_SNIFF_SUBRATE 0x0011
  681. typedef struct {
  682. uint16_t handle;
  683. uint16_t max_remote_latency;
  684. uint16_t max_local_latency;
  685. uint16_t min_remote_timeout;
  686. uint16_t min_local_timeout;
  687. } QEMU_PACKED sniff_subrate_cp;
  688. #define SNIFF_SUBRATE_CP_SIZE 10
  689. /* Host Controller and Baseband */
  690. #define OGF_HOST_CTL 0x03
  691. #define OCF_SET_EVENT_MASK 0x0001
  692. typedef struct {
  693. uint8_t mask[8];
  694. } QEMU_PACKED set_event_mask_cp;
  695. #define SET_EVENT_MASK_CP_SIZE 8
  696. #define OCF_RESET 0x0003
  697. #define OCF_SET_EVENT_FLT 0x0005
  698. typedef struct {
  699. uint8_t flt_type;
  700. uint8_t cond_type;
  701. uint8_t condition[0];
  702. } QEMU_PACKED set_event_flt_cp;
  703. #define SET_EVENT_FLT_CP_SIZE 2
  704. enum bt_filter_type {
  705. FLT_CLEAR_ALL = 0x00,
  706. FLT_INQ_RESULT = 0x01,
  707. FLT_CONN_SETUP = 0x02,
  708. };
  709. enum inq_result_cond_type {
  710. INQ_RESULT_RETURN_ALL = 0x00,
  711. INQ_RESULT_RETURN_CLASS = 0x01,
  712. INQ_RESULT_RETURN_BDADDR = 0x02,
  713. };
  714. enum conn_setup_cond_type {
  715. CONN_SETUP_ALLOW_ALL = 0x00,
  716. CONN_SETUP_ALLOW_CLASS = 0x01,
  717. CONN_SETUP_ALLOW_BDADDR = 0x02,
  718. };
  719. enum conn_setup_cond {
  720. CONN_SETUP_AUTO_OFF = 0x01,
  721. CONN_SETUP_AUTO_ON = 0x02,
  722. };
  723. #define OCF_FLUSH 0x0008
  724. typedef struct {
  725. uint16_t handle;
  726. } QEMU_PACKED flush_cp;
  727. #define FLUSH_CP_SIZE 2
  728. typedef struct {
  729. uint8_t status;
  730. uint16_t handle;
  731. } QEMU_PACKED flush_rp;
  732. #define FLUSH_RP_SIZE 3
  733. #define OCF_READ_PIN_TYPE 0x0009
  734. typedef struct {
  735. uint8_t status;
  736. uint8_t pin_type;
  737. } QEMU_PACKED read_pin_type_rp;
  738. #define READ_PIN_TYPE_RP_SIZE 2
  739. #define OCF_WRITE_PIN_TYPE 0x000A
  740. typedef struct {
  741. uint8_t pin_type;
  742. } QEMU_PACKED write_pin_type_cp;
  743. #define WRITE_PIN_TYPE_CP_SIZE 1
  744. #define OCF_CREATE_NEW_UNIT_KEY 0x000B
  745. #define OCF_READ_STORED_LINK_KEY 0x000D
  746. typedef struct {
  747. bdaddr_t bdaddr;
  748. uint8_t read_all;
  749. } QEMU_PACKED read_stored_link_key_cp;
  750. #define READ_STORED_LINK_KEY_CP_SIZE 7
  751. typedef struct {
  752. uint8_t status;
  753. uint16_t max_keys;
  754. uint16_t num_keys;
  755. } QEMU_PACKED read_stored_link_key_rp;
  756. #define READ_STORED_LINK_KEY_RP_SIZE 5
  757. #define OCF_WRITE_STORED_LINK_KEY 0x0011
  758. typedef struct {
  759. uint8_t num_keys;
  760. /* variable length part */
  761. } QEMU_PACKED write_stored_link_key_cp;
  762. #define WRITE_STORED_LINK_KEY_CP_SIZE 1
  763. typedef struct {
  764. uint8_t status;
  765. uint8_t num_keys;
  766. } QEMU_PACKED write_stored_link_key_rp;
  767. #define READ_WRITE_LINK_KEY_RP_SIZE 2
  768. #define OCF_DELETE_STORED_LINK_KEY 0x0012
  769. typedef struct {
  770. bdaddr_t bdaddr;
  771. uint8_t delete_all;
  772. } QEMU_PACKED delete_stored_link_key_cp;
  773. #define DELETE_STORED_LINK_KEY_CP_SIZE 7
  774. typedef struct {
  775. uint8_t status;
  776. uint16_t num_keys;
  777. } QEMU_PACKED delete_stored_link_key_rp;
  778. #define DELETE_STORED_LINK_KEY_RP_SIZE 3
  779. #define OCF_CHANGE_LOCAL_NAME 0x0013
  780. typedef struct {
  781. char name[248];
  782. } QEMU_PACKED change_local_name_cp;
  783. #define CHANGE_LOCAL_NAME_CP_SIZE 248
  784. #define OCF_READ_LOCAL_NAME 0x0014
  785. typedef struct {
  786. uint8_t status;
  787. char name[248];
  788. } QEMU_PACKED read_local_name_rp;
  789. #define READ_LOCAL_NAME_RP_SIZE 249
  790. #define OCF_READ_CONN_ACCEPT_TIMEOUT 0x0015
  791. typedef struct {
  792. uint8_t status;
  793. uint16_t timeout;
  794. } QEMU_PACKED read_conn_accept_timeout_rp;
  795. #define READ_CONN_ACCEPT_TIMEOUT_RP_SIZE 3
  796. #define OCF_WRITE_CONN_ACCEPT_TIMEOUT 0x0016
  797. typedef struct {
  798. uint16_t timeout;
  799. } QEMU_PACKED write_conn_accept_timeout_cp;
  800. #define WRITE_CONN_ACCEPT_TIMEOUT_CP_SIZE 2
  801. #define OCF_READ_PAGE_TIMEOUT 0x0017
  802. typedef struct {
  803. uint8_t status;
  804. uint16_t timeout;
  805. } QEMU_PACKED read_page_timeout_rp;
  806. #define READ_PAGE_TIMEOUT_RP_SIZE 3
  807. #define OCF_WRITE_PAGE_TIMEOUT 0x0018
  808. typedef struct {
  809. uint16_t timeout;
  810. } QEMU_PACKED write_page_timeout_cp;
  811. #define WRITE_PAGE_TIMEOUT_CP_SIZE 2
  812. #define OCF_READ_SCAN_ENABLE 0x0019
  813. typedef struct {
  814. uint8_t status;
  815. uint8_t enable;
  816. } QEMU_PACKED read_scan_enable_rp;
  817. #define READ_SCAN_ENABLE_RP_SIZE 2
  818. #define OCF_WRITE_SCAN_ENABLE 0x001A
  819. typedef struct {
  820. uint8_t scan_enable;
  821. } QEMU_PACKED write_scan_enable_cp;
  822. #define WRITE_SCAN_ENABLE_CP_SIZE 1
  823. enum scan_enable_bits {
  824. SCAN_DISABLED = 0,
  825. SCAN_INQUIRY = 1 << 0,
  826. SCAN_PAGE = 1 << 1,
  827. };
  828. #define OCF_READ_PAGE_ACTIVITY 0x001B
  829. typedef struct {
  830. uint8_t status;
  831. uint16_t interval;
  832. uint16_t window;
  833. } QEMU_PACKED read_page_activity_rp;
  834. #define READ_PAGE_ACTIVITY_RP_SIZE 5
  835. #define OCF_WRITE_PAGE_ACTIVITY 0x001C
  836. typedef struct {
  837. uint16_t interval;
  838. uint16_t window;
  839. } QEMU_PACKED write_page_activity_cp;
  840. #define WRITE_PAGE_ACTIVITY_CP_SIZE 4
  841. #define OCF_READ_INQ_ACTIVITY 0x001D
  842. typedef struct {
  843. uint8_t status;
  844. uint16_t interval;
  845. uint16_t window;
  846. } QEMU_PACKED read_inq_activity_rp;
  847. #define READ_INQ_ACTIVITY_RP_SIZE 5
  848. #define OCF_WRITE_INQ_ACTIVITY 0x001E
  849. typedef struct {
  850. uint16_t interval;
  851. uint16_t window;
  852. } QEMU_PACKED write_inq_activity_cp;
  853. #define WRITE_INQ_ACTIVITY_CP_SIZE 4
  854. #define OCF_READ_AUTH_ENABLE 0x001F
  855. #define OCF_WRITE_AUTH_ENABLE 0x0020
  856. #define AUTH_DISABLED 0x00
  857. #define AUTH_ENABLED 0x01
  858. #define OCF_READ_ENCRYPT_MODE 0x0021
  859. #define OCF_WRITE_ENCRYPT_MODE 0x0022
  860. #define ENCRYPT_DISABLED 0x00
  861. #define ENCRYPT_P2P 0x01
  862. #define ENCRYPT_BOTH 0x02
  863. #define OCF_READ_CLASS_OF_DEV 0x0023
  864. typedef struct {
  865. uint8_t status;
  866. uint8_t dev_class[3];
  867. } QEMU_PACKED read_class_of_dev_rp;
  868. #define READ_CLASS_OF_DEV_RP_SIZE 4
  869. #define OCF_WRITE_CLASS_OF_DEV 0x0024
  870. typedef struct {
  871. uint8_t dev_class[3];
  872. } QEMU_PACKED write_class_of_dev_cp;
  873. #define WRITE_CLASS_OF_DEV_CP_SIZE 3
  874. #define OCF_READ_VOICE_SETTING 0x0025
  875. typedef struct {
  876. uint8_t status;
  877. uint16_t voice_setting;
  878. } QEMU_PACKED read_voice_setting_rp;
  879. #define READ_VOICE_SETTING_RP_SIZE 3
  880. #define OCF_WRITE_VOICE_SETTING 0x0026
  881. typedef struct {
  882. uint16_t voice_setting;
  883. } QEMU_PACKED write_voice_setting_cp;
  884. #define WRITE_VOICE_SETTING_CP_SIZE 2
  885. #define OCF_READ_AUTOMATIC_FLUSH_TIMEOUT 0x0027
  886. #define OCF_WRITE_AUTOMATIC_FLUSH_TIMEOUT 0x0028
  887. #define OCF_READ_NUM_BROADCAST_RETRANS 0x0029
  888. #define OCF_WRITE_NUM_BROADCAST_RETRANS 0x002A
  889. #define OCF_READ_HOLD_MODE_ACTIVITY 0x002B
  890. #define OCF_WRITE_HOLD_MODE_ACTIVITY 0x002C
  891. #define OCF_READ_TRANSMIT_POWER_LEVEL 0x002D
  892. typedef struct {
  893. uint16_t handle;
  894. uint8_t type;
  895. } QEMU_PACKED read_transmit_power_level_cp;
  896. #define READ_TRANSMIT_POWER_LEVEL_CP_SIZE 3
  897. typedef struct {
  898. uint8_t status;
  899. uint16_t handle;
  900. int8_t level;
  901. } QEMU_PACKED read_transmit_power_level_rp;
  902. #define READ_TRANSMIT_POWER_LEVEL_RP_SIZE 4
  903. #define OCF_HOST_BUFFER_SIZE 0x0033
  904. typedef struct {
  905. uint16_t acl_mtu;
  906. uint8_t sco_mtu;
  907. uint16_t acl_max_pkt;
  908. uint16_t sco_max_pkt;
  909. } QEMU_PACKED host_buffer_size_cp;
  910. #define HOST_BUFFER_SIZE_CP_SIZE 7
  911. #define OCF_HOST_NUMBER_OF_COMPLETED_PACKETS 0x0035
  912. #define OCF_READ_LINK_SUPERVISION_TIMEOUT 0x0036
  913. typedef struct {
  914. uint8_t status;
  915. uint16_t handle;
  916. uint16_t link_sup_to;
  917. } QEMU_PACKED read_link_supervision_timeout_rp;
  918. #define READ_LINK_SUPERVISION_TIMEOUT_RP_SIZE 5
  919. #define OCF_WRITE_LINK_SUPERVISION_TIMEOUT 0x0037
  920. typedef struct {
  921. uint16_t handle;
  922. uint16_t link_sup_to;
  923. } QEMU_PACKED write_link_supervision_timeout_cp;
  924. #define WRITE_LINK_SUPERVISION_TIMEOUT_CP_SIZE 4
  925. typedef struct {
  926. uint8_t status;
  927. uint16_t handle;
  928. } QEMU_PACKED write_link_supervision_timeout_rp;
  929. #define WRITE_LINK_SUPERVISION_TIMEOUT_RP_SIZE 3
  930. #define OCF_READ_NUM_SUPPORTED_IAC 0x0038
  931. #define MAX_IAC_LAP 0x40
  932. #define OCF_READ_CURRENT_IAC_LAP 0x0039
  933. typedef struct {
  934. uint8_t status;
  935. uint8_t num_current_iac;
  936. uint8_t lap[MAX_IAC_LAP][3];
  937. } QEMU_PACKED read_current_iac_lap_rp;
  938. #define READ_CURRENT_IAC_LAP_RP_SIZE 2+3*MAX_IAC_LAP
  939. #define OCF_WRITE_CURRENT_IAC_LAP 0x003A
  940. typedef struct {
  941. uint8_t num_current_iac;
  942. uint8_t lap[MAX_IAC_LAP][3];
  943. } QEMU_PACKED write_current_iac_lap_cp;
  944. #define WRITE_CURRENT_IAC_LAP_CP_SIZE 1+3*MAX_IAC_LAP
  945. #define OCF_READ_PAGE_SCAN_PERIOD_MODE 0x003B
  946. #define OCF_WRITE_PAGE_SCAN_PERIOD_MODE 0x003C
  947. #define OCF_READ_PAGE_SCAN_MODE 0x003D
  948. #define OCF_WRITE_PAGE_SCAN_MODE 0x003E
  949. #define OCF_SET_AFH_CLASSIFICATION 0x003F
  950. typedef struct {
  951. uint8_t map[10];
  952. } QEMU_PACKED set_afh_classification_cp;
  953. #define SET_AFH_CLASSIFICATION_CP_SIZE 10
  954. typedef struct {
  955. uint8_t status;
  956. } QEMU_PACKED set_afh_classification_rp;
  957. #define SET_AFH_CLASSIFICATION_RP_SIZE 1
  958. #define OCF_READ_INQUIRY_SCAN_TYPE 0x0042
  959. typedef struct {
  960. uint8_t status;
  961. uint8_t type;
  962. } QEMU_PACKED read_inquiry_scan_type_rp;
  963. #define READ_INQUIRY_SCAN_TYPE_RP_SIZE 2
  964. #define OCF_WRITE_INQUIRY_SCAN_TYPE 0x0043
  965. typedef struct {
  966. uint8_t type;
  967. } QEMU_PACKED write_inquiry_scan_type_cp;
  968. #define WRITE_INQUIRY_SCAN_TYPE_CP_SIZE 1
  969. typedef struct {
  970. uint8_t status;
  971. } QEMU_PACKED write_inquiry_scan_type_rp;
  972. #define WRITE_INQUIRY_SCAN_TYPE_RP_SIZE 1
  973. #define OCF_READ_INQUIRY_MODE 0x0044
  974. typedef struct {
  975. uint8_t status;
  976. uint8_t mode;
  977. } QEMU_PACKED read_inquiry_mode_rp;
  978. #define READ_INQUIRY_MODE_RP_SIZE 2
  979. #define OCF_WRITE_INQUIRY_MODE 0x0045
  980. typedef struct {
  981. uint8_t mode;
  982. } QEMU_PACKED write_inquiry_mode_cp;
  983. #define WRITE_INQUIRY_MODE_CP_SIZE 1
  984. typedef struct {
  985. uint8_t status;
  986. } QEMU_PACKED write_inquiry_mode_rp;
  987. #define WRITE_INQUIRY_MODE_RP_SIZE 1
  988. #define OCF_READ_PAGE_SCAN_TYPE 0x0046
  989. #define OCF_WRITE_PAGE_SCAN_TYPE 0x0047
  990. #define OCF_READ_AFH_MODE 0x0048
  991. typedef struct {
  992. uint8_t status;
  993. uint8_t mode;
  994. } QEMU_PACKED read_afh_mode_rp;
  995. #define READ_AFH_MODE_RP_SIZE 2
  996. #define OCF_WRITE_AFH_MODE 0x0049
  997. typedef struct {
  998. uint8_t mode;
  999. } QEMU_PACKED write_afh_mode_cp;
  1000. #define WRITE_AFH_MODE_CP_SIZE 1
  1001. typedef struct {
  1002. uint8_t status;
  1003. } QEMU_PACKED write_afh_mode_rp;
  1004. #define WRITE_AFH_MODE_RP_SIZE 1
  1005. #define OCF_READ_EXT_INQUIRY_RESPONSE 0x0051
  1006. typedef struct {
  1007. uint8_t status;
  1008. uint8_t fec;
  1009. uint8_t data[240];
  1010. } QEMU_PACKED read_ext_inquiry_response_rp;
  1011. #define READ_EXT_INQUIRY_RESPONSE_RP_SIZE 242
  1012. #define OCF_WRITE_EXT_INQUIRY_RESPONSE 0x0052
  1013. typedef struct {
  1014. uint8_t fec;
  1015. uint8_t data[240];
  1016. } QEMU_PACKED write_ext_inquiry_response_cp;
  1017. #define WRITE_EXT_INQUIRY_RESPONSE_CP_SIZE 241
  1018. typedef struct {
  1019. uint8_t status;
  1020. } QEMU_PACKED write_ext_inquiry_response_rp;
  1021. #define WRITE_EXT_INQUIRY_RESPONSE_RP_SIZE 1
  1022. /* Informational Parameters */
  1023. #define OGF_INFO_PARAM 0x04
  1024. #define OCF_READ_LOCAL_VERSION 0x0001
  1025. typedef struct {
  1026. uint8_t status;
  1027. uint8_t hci_ver;
  1028. uint16_t hci_rev;
  1029. uint8_t lmp_ver;
  1030. uint16_t manufacturer;
  1031. uint16_t lmp_subver;
  1032. } QEMU_PACKED read_local_version_rp;
  1033. #define READ_LOCAL_VERSION_RP_SIZE 9
  1034. #define OCF_READ_LOCAL_COMMANDS 0x0002
  1035. typedef struct {
  1036. uint8_t status;
  1037. uint8_t commands[64];
  1038. } QEMU_PACKED read_local_commands_rp;
  1039. #define READ_LOCAL_COMMANDS_RP_SIZE 65
  1040. #define OCF_READ_LOCAL_FEATURES 0x0003
  1041. typedef struct {
  1042. uint8_t status;
  1043. uint8_t features[8];
  1044. } QEMU_PACKED read_local_features_rp;
  1045. #define READ_LOCAL_FEATURES_RP_SIZE 9
  1046. #define OCF_READ_LOCAL_EXT_FEATURES 0x0004
  1047. typedef struct {
  1048. uint8_t page_num;
  1049. } QEMU_PACKED read_local_ext_features_cp;
  1050. #define READ_LOCAL_EXT_FEATURES_CP_SIZE 1
  1051. typedef struct {
  1052. uint8_t status;
  1053. uint8_t page_num;
  1054. uint8_t max_page_num;
  1055. uint8_t features[8];
  1056. } QEMU_PACKED read_local_ext_features_rp;
  1057. #define READ_LOCAL_EXT_FEATURES_RP_SIZE 11
  1058. #define OCF_READ_BUFFER_SIZE 0x0005
  1059. typedef struct {
  1060. uint8_t status;
  1061. uint16_t acl_mtu;
  1062. uint8_t sco_mtu;
  1063. uint16_t acl_max_pkt;
  1064. uint16_t sco_max_pkt;
  1065. } QEMU_PACKED read_buffer_size_rp;
  1066. #define READ_BUFFER_SIZE_RP_SIZE 8
  1067. #define OCF_READ_COUNTRY_CODE 0x0007
  1068. typedef struct {
  1069. uint8_t status;
  1070. uint8_t country_code;
  1071. } QEMU_PACKED read_country_code_rp;
  1072. #define READ_COUNTRY_CODE_RP_SIZE 2
  1073. #define OCF_READ_BD_ADDR 0x0009
  1074. typedef struct {
  1075. uint8_t status;
  1076. bdaddr_t bdaddr;
  1077. } QEMU_PACKED read_bd_addr_rp;
  1078. #define READ_BD_ADDR_RP_SIZE 7
  1079. /* Status params */
  1080. #define OGF_STATUS_PARAM 0x05
  1081. #define OCF_READ_FAILED_CONTACT_COUNTER 0x0001
  1082. typedef struct {
  1083. uint8_t status;
  1084. uint16_t handle;
  1085. uint8_t counter;
  1086. } QEMU_PACKED read_failed_contact_counter_rp;
  1087. #define READ_FAILED_CONTACT_COUNTER_RP_SIZE 4
  1088. #define OCF_RESET_FAILED_CONTACT_COUNTER 0x0002
  1089. typedef struct {
  1090. uint8_t status;
  1091. uint16_t handle;
  1092. } QEMU_PACKED reset_failed_contact_counter_rp;
  1093. #define RESET_FAILED_CONTACT_COUNTER_RP_SIZE 4
  1094. #define OCF_READ_LINK_QUALITY 0x0003
  1095. typedef struct {
  1096. uint16_t handle;
  1097. } QEMU_PACKED read_link_quality_cp;
  1098. #define READ_LINK_QUALITY_CP_SIZE 4
  1099. typedef struct {
  1100. uint8_t status;
  1101. uint16_t handle;
  1102. uint8_t link_quality;
  1103. } QEMU_PACKED read_link_quality_rp;
  1104. #define READ_LINK_QUALITY_RP_SIZE 4
  1105. #define OCF_READ_RSSI 0x0005
  1106. typedef struct {
  1107. uint8_t status;
  1108. uint16_t handle;
  1109. int8_t rssi;
  1110. } QEMU_PACKED read_rssi_rp;
  1111. #define READ_RSSI_RP_SIZE 4
  1112. #define OCF_READ_AFH_MAP 0x0006
  1113. typedef struct {
  1114. uint8_t status;
  1115. uint16_t handle;
  1116. uint8_t mode;
  1117. uint8_t map[10];
  1118. } QEMU_PACKED read_afh_map_rp;
  1119. #define READ_AFH_MAP_RP_SIZE 14
  1120. #define OCF_READ_CLOCK 0x0007
  1121. typedef struct {
  1122. uint16_t handle;
  1123. uint8_t which_clock;
  1124. } QEMU_PACKED read_clock_cp;
  1125. #define READ_CLOCK_CP_SIZE 3
  1126. typedef struct {
  1127. uint8_t status;
  1128. uint16_t handle;
  1129. uint32_t clock;
  1130. uint16_t accuracy;
  1131. } QEMU_PACKED read_clock_rp;
  1132. #define READ_CLOCK_RP_SIZE 9
  1133. /* Testing commands */
  1134. #define OGF_TESTING_CMD 0x3e
  1135. /* Vendor specific commands */
  1136. #define OGF_VENDOR_CMD 0x3f
  1137. /* HCI Events */
  1138. #define EVT_INQUIRY_COMPLETE 0x01
  1139. #define EVT_INQUIRY_RESULT 0x02
  1140. typedef struct {
  1141. uint8_t num_responses;
  1142. bdaddr_t bdaddr;
  1143. uint8_t pscan_rep_mode;
  1144. uint8_t pscan_period_mode;
  1145. uint8_t pscan_mode;
  1146. uint8_t dev_class[3];
  1147. uint16_t clock_offset;
  1148. } QEMU_PACKED inquiry_info;
  1149. #define INQUIRY_INFO_SIZE 14
  1150. #define EVT_CONN_COMPLETE 0x03
  1151. typedef struct {
  1152. uint8_t status;
  1153. uint16_t handle;
  1154. bdaddr_t bdaddr;
  1155. uint8_t link_type;
  1156. uint8_t encr_mode;
  1157. } QEMU_PACKED evt_conn_complete;
  1158. #define EVT_CONN_COMPLETE_SIZE 11
  1159. #define EVT_CONN_REQUEST 0x04
  1160. typedef struct {
  1161. bdaddr_t bdaddr;
  1162. uint8_t dev_class[3];
  1163. uint8_t link_type;
  1164. } QEMU_PACKED evt_conn_request;
  1165. #define EVT_CONN_REQUEST_SIZE 10
  1166. #define EVT_DISCONN_COMPLETE 0x05
  1167. typedef struct {
  1168. uint8_t status;
  1169. uint16_t handle;
  1170. uint8_t reason;
  1171. } QEMU_PACKED evt_disconn_complete;
  1172. #define EVT_DISCONN_COMPLETE_SIZE 4
  1173. #define EVT_AUTH_COMPLETE 0x06
  1174. typedef struct {
  1175. uint8_t status;
  1176. uint16_t handle;
  1177. } QEMU_PACKED evt_auth_complete;
  1178. #define EVT_AUTH_COMPLETE_SIZE 3
  1179. #define EVT_REMOTE_NAME_REQ_COMPLETE 0x07
  1180. typedef struct {
  1181. uint8_t status;
  1182. bdaddr_t bdaddr;
  1183. char name[248];
  1184. } QEMU_PACKED evt_remote_name_req_complete;
  1185. #define EVT_REMOTE_NAME_REQ_COMPLETE_SIZE 255
  1186. #define EVT_ENCRYPT_CHANGE 0x08
  1187. typedef struct {
  1188. uint8_t status;
  1189. uint16_t handle;
  1190. uint8_t encrypt;
  1191. } QEMU_PACKED evt_encrypt_change;
  1192. #define EVT_ENCRYPT_CHANGE_SIZE 5
  1193. #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE 0x09
  1194. typedef struct {
  1195. uint8_t status;
  1196. uint16_t handle;
  1197. } QEMU_PACKED evt_change_conn_link_key_complete;
  1198. #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE_SIZE 3
  1199. #define EVT_MASTER_LINK_KEY_COMPLETE 0x0A
  1200. typedef struct {
  1201. uint8_t status;
  1202. uint16_t handle;
  1203. uint8_t key_flag;
  1204. } QEMU_PACKED evt_master_link_key_complete;
  1205. #define EVT_MASTER_LINK_KEY_COMPLETE_SIZE 4
  1206. #define EVT_READ_REMOTE_FEATURES_COMPLETE 0x0B
  1207. typedef struct {
  1208. uint8_t status;
  1209. uint16_t handle;
  1210. uint8_t features[8];
  1211. } QEMU_PACKED evt_read_remote_features_complete;
  1212. #define EVT_READ_REMOTE_FEATURES_COMPLETE_SIZE 11
  1213. #define EVT_READ_REMOTE_VERSION_COMPLETE 0x0C
  1214. typedef struct {
  1215. uint8_t status;
  1216. uint16_t handle;
  1217. uint8_t lmp_ver;
  1218. uint16_t manufacturer;
  1219. uint16_t lmp_subver;
  1220. } QEMU_PACKED evt_read_remote_version_complete;
  1221. #define EVT_READ_REMOTE_VERSION_COMPLETE_SIZE 8
  1222. #define EVT_QOS_SETUP_COMPLETE 0x0D
  1223. typedef struct {
  1224. uint8_t status;
  1225. uint16_t handle;
  1226. uint8_t flags; /* Reserved */
  1227. hci_qos qos;
  1228. } QEMU_PACKED evt_qos_setup_complete;
  1229. #define EVT_QOS_SETUP_COMPLETE_SIZE (4 + HCI_QOS_CP_SIZE)
  1230. #define EVT_CMD_COMPLETE 0x0E
  1231. typedef struct {
  1232. uint8_t ncmd;
  1233. uint16_t opcode;
  1234. } QEMU_PACKED evt_cmd_complete;
  1235. #define EVT_CMD_COMPLETE_SIZE 3
  1236. #define EVT_CMD_STATUS 0x0F
  1237. typedef struct {
  1238. uint8_t status;
  1239. uint8_t ncmd;
  1240. uint16_t opcode;
  1241. } QEMU_PACKED evt_cmd_status;
  1242. #define EVT_CMD_STATUS_SIZE 4
  1243. #define EVT_HARDWARE_ERROR 0x10
  1244. typedef struct {
  1245. uint8_t code;
  1246. } QEMU_PACKED evt_hardware_error;
  1247. #define EVT_HARDWARE_ERROR_SIZE 1
  1248. #define EVT_FLUSH_OCCURRED 0x11
  1249. typedef struct {
  1250. uint16_t handle;
  1251. } QEMU_PACKED evt_flush_occurred;
  1252. #define EVT_FLUSH_OCCURRED_SIZE 2
  1253. #define EVT_ROLE_CHANGE 0x12
  1254. typedef struct {
  1255. uint8_t status;
  1256. bdaddr_t bdaddr;
  1257. uint8_t role;
  1258. } QEMU_PACKED evt_role_change;
  1259. #define EVT_ROLE_CHANGE_SIZE 8
  1260. #define EVT_NUM_COMP_PKTS 0x13
  1261. typedef struct {
  1262. uint8_t num_hndl;
  1263. struct {
  1264. uint16_t handle;
  1265. uint16_t num_packets;
  1266. } connection[0];
  1267. } QEMU_PACKED evt_num_comp_pkts;
  1268. #define EVT_NUM_COMP_PKTS_SIZE(num_hndl) (1 + 4 * (num_hndl))
  1269. #define EVT_MODE_CHANGE 0x14
  1270. typedef struct {
  1271. uint8_t status;
  1272. uint16_t handle;
  1273. uint8_t mode;
  1274. uint16_t interval;
  1275. } QEMU_PACKED evt_mode_change;
  1276. #define EVT_MODE_CHANGE_SIZE 6
  1277. #define EVT_RETURN_LINK_KEYS 0x15
  1278. typedef struct {
  1279. uint8_t num_keys;
  1280. /* variable length part */
  1281. } QEMU_PACKED evt_return_link_keys;
  1282. #define EVT_RETURN_LINK_KEYS_SIZE 1
  1283. #define EVT_PIN_CODE_REQ 0x16
  1284. typedef struct {
  1285. bdaddr_t bdaddr;
  1286. } QEMU_PACKED evt_pin_code_req;
  1287. #define EVT_PIN_CODE_REQ_SIZE 6
  1288. #define EVT_LINK_KEY_REQ 0x17
  1289. typedef struct {
  1290. bdaddr_t bdaddr;
  1291. } QEMU_PACKED evt_link_key_req;
  1292. #define EVT_LINK_KEY_REQ_SIZE 6
  1293. #define EVT_LINK_KEY_NOTIFY 0x18
  1294. typedef struct {
  1295. bdaddr_t bdaddr;
  1296. uint8_t link_key[16];
  1297. uint8_t key_type;
  1298. } QEMU_PACKED evt_link_key_notify;
  1299. #define EVT_LINK_KEY_NOTIFY_SIZE 23
  1300. #define EVT_LOOPBACK_COMMAND 0x19
  1301. #define EVT_DATA_BUFFER_OVERFLOW 0x1A
  1302. typedef struct {
  1303. uint8_t link_type;
  1304. } QEMU_PACKED evt_data_buffer_overflow;
  1305. #define EVT_DATA_BUFFER_OVERFLOW_SIZE 1
  1306. #define EVT_MAX_SLOTS_CHANGE 0x1B
  1307. typedef struct {
  1308. uint16_t handle;
  1309. uint8_t max_slots;
  1310. } QEMU_PACKED evt_max_slots_change;
  1311. #define EVT_MAX_SLOTS_CHANGE_SIZE 3
  1312. #define EVT_READ_CLOCK_OFFSET_COMPLETE 0x1C
  1313. typedef struct {
  1314. uint8_t status;
  1315. uint16_t handle;
  1316. uint16_t clock_offset;
  1317. } QEMU_PACKED evt_read_clock_offset_complete;
  1318. #define EVT_READ_CLOCK_OFFSET_COMPLETE_SIZE 5
  1319. #define EVT_CONN_PTYPE_CHANGED 0x1D
  1320. typedef struct {
  1321. uint8_t status;
  1322. uint16_t handle;
  1323. uint16_t ptype;
  1324. } QEMU_PACKED evt_conn_ptype_changed;
  1325. #define EVT_CONN_PTYPE_CHANGED_SIZE 5
  1326. #define EVT_QOS_VIOLATION 0x1E
  1327. typedef struct {
  1328. uint16_t handle;
  1329. } QEMU_PACKED evt_qos_violation;
  1330. #define EVT_QOS_VIOLATION_SIZE 2
  1331. #define EVT_PSCAN_REP_MODE_CHANGE 0x20
  1332. typedef struct {
  1333. bdaddr_t bdaddr;
  1334. uint8_t pscan_rep_mode;
  1335. } QEMU_PACKED evt_pscan_rep_mode_change;
  1336. #define EVT_PSCAN_REP_MODE_CHANGE_SIZE 7
  1337. #define EVT_FLOW_SPEC_COMPLETE 0x21
  1338. typedef struct {
  1339. uint8_t status;
  1340. uint16_t handle;
  1341. uint8_t flags;
  1342. uint8_t direction;
  1343. hci_qos qos;
  1344. } QEMU_PACKED evt_flow_spec_complete;
  1345. #define EVT_FLOW_SPEC_COMPLETE_SIZE (5 + HCI_QOS_CP_SIZE)
  1346. #define EVT_INQUIRY_RESULT_WITH_RSSI 0x22
  1347. typedef struct {
  1348. uint8_t num_responses;
  1349. bdaddr_t bdaddr;
  1350. uint8_t pscan_rep_mode;
  1351. uint8_t pscan_period_mode;
  1352. uint8_t dev_class[3];
  1353. uint16_t clock_offset;
  1354. int8_t rssi;
  1355. } QEMU_PACKED inquiry_info_with_rssi;
  1356. #define INQUIRY_INFO_WITH_RSSI_SIZE 15
  1357. typedef struct {
  1358. uint8_t num_responses;
  1359. bdaddr_t bdaddr;
  1360. uint8_t pscan_rep_mode;
  1361. uint8_t pscan_period_mode;
  1362. uint8_t pscan_mode;
  1363. uint8_t dev_class[3];
  1364. uint16_t clock_offset;
  1365. int8_t rssi;
  1366. } QEMU_PACKED inquiry_info_with_rssi_and_pscan_mode;
  1367. #define INQUIRY_INFO_WITH_RSSI_AND_PSCAN_MODE_SIZE 16
  1368. #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE 0x23
  1369. typedef struct {
  1370. uint8_t status;
  1371. uint16_t handle;
  1372. uint8_t page_num;
  1373. uint8_t max_page_num;
  1374. uint8_t features[8];
  1375. } QEMU_PACKED evt_read_remote_ext_features_complete;
  1376. #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE_SIZE 13
  1377. #define EVT_SYNC_CONN_COMPLETE 0x2C
  1378. typedef struct {
  1379. uint8_t status;
  1380. uint16_t handle;
  1381. bdaddr_t bdaddr;
  1382. uint8_t link_type;
  1383. uint8_t trans_interval;
  1384. uint8_t retrans_window;
  1385. uint16_t rx_pkt_len;
  1386. uint16_t tx_pkt_len;
  1387. uint8_t air_mode;
  1388. } QEMU_PACKED evt_sync_conn_complete;
  1389. #define EVT_SYNC_CONN_COMPLETE_SIZE 17
  1390. #define EVT_SYNC_CONN_CHANGED 0x2D
  1391. typedef struct {
  1392. uint8_t status;
  1393. uint16_t handle;
  1394. uint8_t trans_interval;
  1395. uint8_t retrans_window;
  1396. uint16_t rx_pkt_len;
  1397. uint16_t tx_pkt_len;
  1398. } QEMU_PACKED evt_sync_conn_changed;
  1399. #define EVT_SYNC_CONN_CHANGED_SIZE 9
  1400. #define EVT_SNIFF_SUBRATE 0x2E
  1401. typedef struct {
  1402. uint8_t status;
  1403. uint16_t handle;
  1404. uint16_t max_remote_latency;
  1405. uint16_t max_local_latency;
  1406. uint16_t min_remote_timeout;
  1407. uint16_t min_local_timeout;
  1408. } QEMU_PACKED evt_sniff_subrate;
  1409. #define EVT_SNIFF_SUBRATE_SIZE 11
  1410. #define EVT_EXTENDED_INQUIRY_RESULT 0x2F
  1411. typedef struct {
  1412. bdaddr_t bdaddr;
  1413. uint8_t pscan_rep_mode;
  1414. uint8_t pscan_period_mode;
  1415. uint8_t dev_class[3];
  1416. uint16_t clock_offset;
  1417. int8_t rssi;
  1418. uint8_t data[240];
  1419. } QEMU_PACKED extended_inquiry_info;
  1420. #define EXTENDED_INQUIRY_INFO_SIZE 254
  1421. #define EVT_TESTING 0xFE
  1422. #define EVT_VENDOR 0xFF
  1423. /* Command opcode pack/unpack */
  1424. #define cmd_opcode_pack(ogf, ocf) (uint16_t)((ocf & 0x03ff)|(ogf << 10))
  1425. #define cmd_opcode_ogf(op) (op >> 10)
  1426. #define cmd_opcode_ocf(op) (op & 0x03ff)
  1427. /* ACL handle and flags pack/unpack */
  1428. #define acl_handle_pack(h, f) (uint16_t)(((h) & 0x0fff)|((f) << 12))
  1429. #define acl_handle(h) ((h) & 0x0fff)
  1430. #define acl_flags(h) ((h) >> 12)
  1431. /* HCI Packet structures */
  1432. #define HCI_COMMAND_HDR_SIZE 3
  1433. #define HCI_EVENT_HDR_SIZE 2
  1434. #define HCI_ACL_HDR_SIZE 4
  1435. #define HCI_SCO_HDR_SIZE 3
  1436. struct hci_command_hdr {
  1437. uint16_t opcode; /* OCF & OGF */
  1438. uint8_t plen;
  1439. } QEMU_PACKED;
  1440. struct hci_event_hdr {
  1441. uint8_t evt;
  1442. uint8_t plen;
  1443. } QEMU_PACKED;
  1444. struct hci_acl_hdr {
  1445. uint16_t handle; /* Handle & Flags(PB, BC) */
  1446. uint16_t dlen;
  1447. } QEMU_PACKED;
  1448. struct hci_sco_hdr {
  1449. uint16_t handle;
  1450. uint8_t dlen;
  1451. } QEMU_PACKED;
  1452. /* L2CAP layer defines */
  1453. enum bt_l2cap_lm_bits {
  1454. L2CAP_LM_MASTER = 1 << 0,
  1455. L2CAP_LM_AUTH = 1 << 1,
  1456. L2CAP_LM_ENCRYPT = 1 << 2,
  1457. L2CAP_LM_TRUSTED = 1 << 3,
  1458. L2CAP_LM_RELIABLE = 1 << 4,
  1459. L2CAP_LM_SECURE = 1 << 5,
  1460. };
  1461. enum bt_l2cap_cid_predef {
  1462. L2CAP_CID_INVALID = 0x0000,
  1463. L2CAP_CID_SIGNALLING= 0x0001,
  1464. L2CAP_CID_GROUP = 0x0002,
  1465. L2CAP_CID_ALLOC = 0x0040,
  1466. };
  1467. /* L2CAP command codes */
  1468. enum bt_l2cap_cmd {
  1469. L2CAP_COMMAND_REJ = 1,
  1470. L2CAP_CONN_REQ,
  1471. L2CAP_CONN_RSP,
  1472. L2CAP_CONF_REQ,
  1473. L2CAP_CONF_RSP,
  1474. L2CAP_DISCONN_REQ,
  1475. L2CAP_DISCONN_RSP,
  1476. L2CAP_ECHO_REQ,
  1477. L2CAP_ECHO_RSP,
  1478. L2CAP_INFO_REQ,
  1479. L2CAP_INFO_RSP,
  1480. };
  1481. enum bt_l2cap_sar_bits {
  1482. L2CAP_SAR_NO_SEG = 0,
  1483. L2CAP_SAR_START,
  1484. L2CAP_SAR_END,
  1485. L2CAP_SAR_CONT,
  1486. };
  1487. /* L2CAP structures */
  1488. typedef struct {
  1489. uint16_t len;
  1490. uint16_t cid;
  1491. uint8_t data[0];
  1492. } QEMU_PACKED l2cap_hdr;
  1493. #define L2CAP_HDR_SIZE 4
  1494. typedef struct {
  1495. uint8_t code;
  1496. uint8_t ident;
  1497. uint16_t len;
  1498. } QEMU_PACKED l2cap_cmd_hdr;
  1499. #define L2CAP_CMD_HDR_SIZE 4
  1500. typedef struct {
  1501. uint16_t reason;
  1502. } QEMU_PACKED l2cap_cmd_rej;
  1503. #define L2CAP_CMD_REJ_SIZE 2
  1504. typedef struct {
  1505. uint16_t dcid;
  1506. uint16_t scid;
  1507. } QEMU_PACKED l2cap_cmd_rej_cid;
  1508. #define L2CAP_CMD_REJ_CID_SIZE 4
  1509. /* reject reason */
  1510. enum bt_l2cap_rej_reason {
  1511. L2CAP_REJ_CMD_NOT_UNDERSTOOD = 0,
  1512. L2CAP_REJ_SIG_TOOBIG,
  1513. L2CAP_REJ_CID_INVAL,
  1514. };
  1515. typedef struct {
  1516. uint16_t psm;
  1517. uint16_t scid;
  1518. } QEMU_PACKED l2cap_conn_req;
  1519. #define L2CAP_CONN_REQ_SIZE 4
  1520. typedef struct {
  1521. uint16_t dcid;
  1522. uint16_t scid;
  1523. uint16_t result;
  1524. uint16_t status;
  1525. } QEMU_PACKED l2cap_conn_rsp;
  1526. #define L2CAP_CONN_RSP_SIZE 8
  1527. /* connect result */
  1528. enum bt_l2cap_conn_res {
  1529. L2CAP_CR_SUCCESS = 0,
  1530. L2CAP_CR_PEND,
  1531. L2CAP_CR_BAD_PSM,
  1532. L2CAP_CR_SEC_BLOCK,
  1533. L2CAP_CR_NO_MEM,
  1534. };
  1535. /* connect status */
  1536. enum bt_l2cap_conn_stat {
  1537. L2CAP_CS_NO_INFO = 0,
  1538. L2CAP_CS_AUTHEN_PEND,
  1539. L2CAP_CS_AUTHOR_PEND,
  1540. };
  1541. typedef struct {
  1542. uint16_t dcid;
  1543. uint16_t flags;
  1544. uint8_t data[0];
  1545. } QEMU_PACKED l2cap_conf_req;
  1546. #define L2CAP_CONF_REQ_SIZE(datalen) (4 + (datalen))
  1547. typedef struct {
  1548. uint16_t scid;
  1549. uint16_t flags;
  1550. uint16_t result;
  1551. uint8_t data[0];
  1552. } QEMU_PACKED l2cap_conf_rsp;
  1553. #define L2CAP_CONF_RSP_SIZE(datalen) (6 + datalen)
  1554. enum bt_l2cap_conf_res {
  1555. L2CAP_CONF_SUCCESS = 0,
  1556. L2CAP_CONF_UNACCEPT,
  1557. L2CAP_CONF_REJECT,
  1558. L2CAP_CONF_UNKNOWN,
  1559. };
  1560. typedef struct {
  1561. uint8_t type;
  1562. uint8_t len;
  1563. uint8_t val[0];
  1564. } QEMU_PACKED l2cap_conf_opt;
  1565. #define L2CAP_CONF_OPT_SIZE 2
  1566. enum bt_l2cap_conf_val {
  1567. L2CAP_CONF_MTU = 1,
  1568. L2CAP_CONF_FLUSH_TO,
  1569. L2CAP_CONF_QOS,
  1570. L2CAP_CONF_RFC,
  1571. L2CAP_CONF_RFC_MODE = L2CAP_CONF_RFC,
  1572. };
  1573. typedef struct {
  1574. uint8_t flags;
  1575. uint8_t service_type;
  1576. uint32_t token_rate;
  1577. uint32_t token_bucket_size;
  1578. uint32_t peak_bandwidth;
  1579. uint32_t latency;
  1580. uint32_t delay_variation;
  1581. } QEMU_PACKED l2cap_conf_opt_qos;
  1582. #define L2CAP_CONF_OPT_QOS_SIZE 22
  1583. enum bt_l2cap_conf_opt_qos_st {
  1584. L2CAP_CONF_QOS_NO_TRAFFIC = 0x00,
  1585. L2CAP_CONF_QOS_BEST_EFFORT,
  1586. L2CAP_CONF_QOS_GUARANTEED,
  1587. };
  1588. #define L2CAP_CONF_QOS_WILDCARD 0xffffffff
  1589. enum bt_l2cap_mode {
  1590. L2CAP_MODE_BASIC = 0,
  1591. L2CAP_MODE_RETRANS = 1,
  1592. L2CAP_MODE_FLOWCTL = 2,
  1593. };
  1594. typedef struct {
  1595. uint16_t dcid;
  1596. uint16_t scid;
  1597. } QEMU_PACKED l2cap_disconn_req;
  1598. #define L2CAP_DISCONN_REQ_SIZE 4
  1599. typedef struct {
  1600. uint16_t dcid;
  1601. uint16_t scid;
  1602. } QEMU_PACKED l2cap_disconn_rsp;
  1603. #define L2CAP_DISCONN_RSP_SIZE 4
  1604. typedef struct {
  1605. uint16_t type;
  1606. } QEMU_PACKED l2cap_info_req;
  1607. #define L2CAP_INFO_REQ_SIZE 2
  1608. typedef struct {
  1609. uint16_t type;
  1610. uint16_t result;
  1611. uint8_t data[0];
  1612. } QEMU_PACKED l2cap_info_rsp;
  1613. #define L2CAP_INFO_RSP_SIZE 4
  1614. /* info type */
  1615. enum bt_l2cap_info_type {
  1616. L2CAP_IT_CL_MTU = 1,
  1617. L2CAP_IT_FEAT_MASK,
  1618. };
  1619. /* info result */
  1620. enum bt_l2cap_info_result {
  1621. L2CAP_IR_SUCCESS = 0,
  1622. L2CAP_IR_NOTSUPP,
  1623. };
  1624. /* Service Discovery Protocol defines */
  1625. /* Note that all multibyte values in lower layer protocols (above in this file)
  1626. * are little-endian while SDP is big-endian. */
  1627. /* Protocol UUIDs */
  1628. enum sdp_proto_uuid {
  1629. SDP_UUID = 0x0001,
  1630. UDP_UUID = 0x0002,
  1631. RFCOMM_UUID = 0x0003,
  1632. TCP_UUID = 0x0004,
  1633. TCS_BIN_UUID = 0x0005,
  1634. TCS_AT_UUID = 0x0006,
  1635. OBEX_UUID = 0x0008,
  1636. IP_UUID = 0x0009,
  1637. FTP_UUID = 0x000a,
  1638. HTTP_UUID = 0x000c,
  1639. WSP_UUID = 0x000e,
  1640. BNEP_UUID = 0x000f,
  1641. UPNP_UUID = 0x0010,
  1642. HIDP_UUID = 0x0011,
  1643. HCRP_CTRL_UUID = 0x0012,
  1644. HCRP_DATA_UUID = 0x0014,
  1645. HCRP_NOTE_UUID = 0x0016,
  1646. AVCTP_UUID = 0x0017,
  1647. AVDTP_UUID = 0x0019,
  1648. CMTP_UUID = 0x001b,
  1649. UDI_UUID = 0x001d,
  1650. MCAP_CTRL_UUID = 0x001e,
  1651. MCAP_DATA_UUID = 0x001f,
  1652. L2CAP_UUID = 0x0100,
  1653. };
  1654. /*
  1655. * Service class identifiers of standard services and service groups
  1656. */
  1657. enum service_class_id {
  1658. SDP_SERVER_SVCLASS_ID = 0x1000,
  1659. BROWSE_GRP_DESC_SVCLASS_ID = 0x1001,
  1660. PUBLIC_BROWSE_GROUP = 0x1002,
  1661. SERIAL_PORT_SVCLASS_ID = 0x1101,
  1662. LAN_ACCESS_SVCLASS_ID = 0x1102,
  1663. DIALUP_NET_SVCLASS_ID = 0x1103,
  1664. IRMC_SYNC_SVCLASS_ID = 0x1104,
  1665. OBEX_OBJPUSH_SVCLASS_ID = 0x1105,
  1666. OBEX_FILETRANS_SVCLASS_ID = 0x1106,
  1667. IRMC_SYNC_CMD_SVCLASS_ID = 0x1107,
  1668. HEADSET_SVCLASS_ID = 0x1108,
  1669. CORDLESS_TELEPHONY_SVCLASS_ID = 0x1109,
  1670. AUDIO_SOURCE_SVCLASS_ID = 0x110a,
  1671. AUDIO_SINK_SVCLASS_ID = 0x110b,
  1672. AV_REMOTE_TARGET_SVCLASS_ID = 0x110c,
  1673. ADVANCED_AUDIO_SVCLASS_ID = 0x110d,
  1674. AV_REMOTE_SVCLASS_ID = 0x110e,
  1675. VIDEO_CONF_SVCLASS_ID = 0x110f,
  1676. INTERCOM_SVCLASS_ID = 0x1110,
  1677. FAX_SVCLASS_ID = 0x1111,
  1678. HEADSET_AGW_SVCLASS_ID = 0x1112,
  1679. WAP_SVCLASS_ID = 0x1113,
  1680. WAP_CLIENT_SVCLASS_ID = 0x1114,
  1681. PANU_SVCLASS_ID = 0x1115,
  1682. NAP_SVCLASS_ID = 0x1116,
  1683. GN_SVCLASS_ID = 0x1117,
  1684. DIRECT_PRINTING_SVCLASS_ID = 0x1118,
  1685. REFERENCE_PRINTING_SVCLASS_ID = 0x1119,
  1686. IMAGING_SVCLASS_ID = 0x111a,
  1687. IMAGING_RESPONDER_SVCLASS_ID = 0x111b,
  1688. IMAGING_ARCHIVE_SVCLASS_ID = 0x111c,
  1689. IMAGING_REFOBJS_SVCLASS_ID = 0x111d,
  1690. HANDSFREE_SVCLASS_ID = 0x111e,
  1691. HANDSFREE_AGW_SVCLASS_ID = 0x111f,
  1692. DIRECT_PRT_REFOBJS_SVCLASS_ID = 0x1120,
  1693. REFLECTED_UI_SVCLASS_ID = 0x1121,
  1694. BASIC_PRINTING_SVCLASS_ID = 0x1122,
  1695. PRINTING_STATUS_SVCLASS_ID = 0x1123,
  1696. HID_SVCLASS_ID = 0x1124,
  1697. HCR_SVCLASS_ID = 0x1125,
  1698. HCR_PRINT_SVCLASS_ID = 0x1126,
  1699. HCR_SCAN_SVCLASS_ID = 0x1127,
  1700. CIP_SVCLASS_ID = 0x1128,
  1701. VIDEO_CONF_GW_SVCLASS_ID = 0x1129,
  1702. UDI_MT_SVCLASS_ID = 0x112a,
  1703. UDI_TA_SVCLASS_ID = 0x112b,
  1704. AV_SVCLASS_ID = 0x112c,
  1705. SAP_SVCLASS_ID = 0x112d,
  1706. PBAP_PCE_SVCLASS_ID = 0x112e,
  1707. PBAP_PSE_SVCLASS_ID = 0x112f,
  1708. PBAP_SVCLASS_ID = 0x1130,
  1709. PNP_INFO_SVCLASS_ID = 0x1200,
  1710. GENERIC_NETWORKING_SVCLASS_ID = 0x1201,
  1711. GENERIC_FILETRANS_SVCLASS_ID = 0x1202,
  1712. GENERIC_AUDIO_SVCLASS_ID = 0x1203,
  1713. GENERIC_TELEPHONY_SVCLASS_ID = 0x1204,
  1714. UPNP_SVCLASS_ID = 0x1205,
  1715. UPNP_IP_SVCLASS_ID = 0x1206,
  1716. UPNP_PAN_SVCLASS_ID = 0x1300,
  1717. UPNP_LAP_SVCLASS_ID = 0x1301,
  1718. UPNP_L2CAP_SVCLASS_ID = 0x1302,
  1719. VIDEO_SOURCE_SVCLASS_ID = 0x1303,
  1720. VIDEO_SINK_SVCLASS_ID = 0x1304,
  1721. VIDEO_DISTRIBUTION_SVCLASS_ID = 0x1305,
  1722. MDP_SVCLASS_ID = 0x1400,
  1723. MDP_SOURCE_SVCLASS_ID = 0x1401,
  1724. MDP_SINK_SVCLASS_ID = 0x1402,
  1725. APPLE_AGENT_SVCLASS_ID = 0x2112,
  1726. };
  1727. /*
  1728. * Standard profile descriptor identifiers; note these
  1729. * may be identical to some of the service classes defined above
  1730. */
  1731. #define SDP_SERVER_PROFILE_ID SDP_SERVER_SVCLASS_ID
  1732. #define BROWSE_GRP_DESC_PROFILE_ID BROWSE_GRP_DESC_SVCLASS_ID
  1733. #define SERIAL_PORT_PROFILE_ID SERIAL_PORT_SVCLASS_ID
  1734. #define LAN_ACCESS_PROFILE_ID LAN_ACCESS_SVCLASS_ID
  1735. #define DIALUP_NET_PROFILE_ID DIALUP_NET_SVCLASS_ID
  1736. #define IRMC_SYNC_PROFILE_ID IRMC_SYNC_SVCLASS_ID
  1737. #define OBEX_OBJPUSH_PROFILE_ID OBEX_OBJPUSH_SVCLASS_ID
  1738. #define OBEX_FILETRANS_PROFILE_ID OBEX_FILETRANS_SVCLASS_ID
  1739. #define IRMC_SYNC_CMD_PROFILE_ID IRMC_SYNC_CMD_SVCLASS_ID
  1740. #define HEADSET_PROFILE_ID HEADSET_SVCLASS_ID
  1741. #define CORDLESS_TELEPHONY_PROFILE_ID CORDLESS_TELEPHONY_SVCLASS_ID
  1742. #define AUDIO_SOURCE_PROFILE_ID AUDIO_SOURCE_SVCLASS_ID
  1743. #define AUDIO_SINK_PROFILE_ID AUDIO_SINK_SVCLASS_ID
  1744. #define AV_REMOTE_TARGET_PROFILE_ID AV_REMOTE_TARGET_SVCLASS_ID
  1745. #define ADVANCED_AUDIO_PROFILE_ID ADVANCED_AUDIO_SVCLASS_ID
  1746. #define AV_REMOTE_PROFILE_ID AV_REMOTE_SVCLASS_ID
  1747. #define VIDEO_CONF_PROFILE_ID VIDEO_CONF_SVCLASS_ID
  1748. #define INTERCOM_PROFILE_ID INTERCOM_SVCLASS_ID
  1749. #define FAX_PROFILE_ID FAX_SVCLASS_ID
  1750. #define HEADSET_AGW_PROFILE_ID HEADSET_AGW_SVCLASS_ID
  1751. #define WAP_PROFILE_ID WAP_SVCLASS_ID
  1752. #define WAP_CLIENT_PROFILE_ID WAP_CLIENT_SVCLASS_ID
  1753. #define PANU_PROFILE_ID PANU_SVCLASS_ID
  1754. #define NAP_PROFILE_ID NAP_SVCLASS_ID
  1755. #define GN_PROFILE_ID GN_SVCLASS_ID
  1756. #define DIRECT_PRINTING_PROFILE_ID DIRECT_PRINTING_SVCLASS_ID
  1757. #define REFERENCE_PRINTING_PROFILE_ID REFERENCE_PRINTING_SVCLASS_ID
  1758. #define IMAGING_PROFILE_ID IMAGING_SVCLASS_ID
  1759. #define IMAGING_RESPONDER_PROFILE_ID IMAGING_RESPONDER_SVCLASS_ID
  1760. #define IMAGING_ARCHIVE_PROFILE_ID IMAGING_ARCHIVE_SVCLASS_ID
  1761. #define IMAGING_REFOBJS_PROFILE_ID IMAGING_REFOBJS_SVCLASS_ID
  1762. #define HANDSFREE_PROFILE_ID HANDSFREE_SVCLASS_ID
  1763. #define HANDSFREE_AGW_PROFILE_ID HANDSFREE_AGW_SVCLASS_ID
  1764. #define DIRECT_PRT_REFOBJS_PROFILE_ID DIRECT_PRT_REFOBJS_SVCLASS_ID
  1765. #define REFLECTED_UI_PROFILE_ID REFLECTED_UI_SVCLASS_ID
  1766. #define BASIC_PRINTING_PROFILE_ID BASIC_PRINTING_SVCLASS_ID
  1767. #define PRINTING_STATUS_PROFILE_ID PRINTING_STATUS_SVCLASS_ID
  1768. #define HID_PROFILE_ID HID_SVCLASS_ID
  1769. #define HCR_PROFILE_ID HCR_SCAN_SVCLASS_ID
  1770. #define HCR_PRINT_PROFILE_ID HCR_PRINT_SVCLASS_ID
  1771. #define HCR_SCAN_PROFILE_ID HCR_SCAN_SVCLASS_ID
  1772. #define CIP_PROFILE_ID CIP_SVCLASS_ID
  1773. #define VIDEO_CONF_GW_PROFILE_ID VIDEO_CONF_GW_SVCLASS_ID
  1774. #define UDI_MT_PROFILE_ID UDI_MT_SVCLASS_ID
  1775. #define UDI_TA_PROFILE_ID UDI_TA_SVCLASS_ID
  1776. #define AV_PROFILE_ID AV_SVCLASS_ID
  1777. #define SAP_PROFILE_ID SAP_SVCLASS_ID
  1778. #define PBAP_PCE_PROFILE_ID PBAP_PCE_SVCLASS_ID
  1779. #define PBAP_PSE_PROFILE_ID PBAP_PSE_SVCLASS_ID
  1780. #define PBAP_PROFILE_ID PBAP_SVCLASS_ID
  1781. #define PNP_INFO_PROFILE_ID PNP_INFO_SVCLASS_ID
  1782. #define GENERIC_NETWORKING_PROFILE_ID GENERIC_NETWORKING_SVCLASS_ID
  1783. #define GENERIC_FILETRANS_PROFILE_ID GENERIC_FILETRANS_SVCLASS_ID
  1784. #define GENERIC_AUDIO_PROFILE_ID GENERIC_AUDIO_SVCLASS_ID
  1785. #define GENERIC_TELEPHONY_PROFILE_ID GENERIC_TELEPHONY_SVCLASS_ID
  1786. #define UPNP_PROFILE_ID UPNP_SVCLASS_ID
  1787. #define UPNP_IP_PROFILE_ID UPNP_IP_SVCLASS_ID
  1788. #define UPNP_PAN_PROFILE_ID UPNP_PAN_SVCLASS_ID
  1789. #define UPNP_LAP_PROFILE_ID UPNP_LAP_SVCLASS_ID
  1790. #define UPNP_L2CAP_PROFILE_ID UPNP_L2CAP_SVCLASS_ID
  1791. #define VIDEO_SOURCE_PROFILE_ID VIDEO_SOURCE_SVCLASS_ID
  1792. #define VIDEO_SINK_PROFILE_ID VIDEO_SINK_SVCLASS_ID
  1793. #define VIDEO_DISTRIBUTION_PROFILE_ID VIDEO_DISTRIBUTION_SVCLASS_ID
  1794. #define MDP_PROFILE_ID MDP_SVCLASS_ID
  1795. #define MDP_SOURCE_PROFILE_ID MDP_SROUCE_SVCLASS_ID
  1796. #define MDP_SINK_PROFILE_ID MDP_SINK_SVCLASS_ID
  1797. #define APPLE_AGENT_PROFILE_ID APPLE_AGENT_SVCLASS_ID
  1798. /* Data Representation */
  1799. enum bt_sdp_data_type {
  1800. SDP_DTYPE_NIL = 0 << 3,
  1801. SDP_DTYPE_UINT = 1 << 3,
  1802. SDP_DTYPE_SINT = 2 << 3,
  1803. SDP_DTYPE_UUID = 3 << 3,
  1804. SDP_DTYPE_STRING = 4 << 3,
  1805. SDP_DTYPE_BOOL = 5 << 3,
  1806. SDP_DTYPE_SEQ = 6 << 3,
  1807. SDP_DTYPE_ALT = 7 << 3,
  1808. SDP_DTYPE_URL = 8 << 3,
  1809. };
  1810. enum bt_sdp_data_size {
  1811. SDP_DSIZE_1 = 0,
  1812. SDP_DSIZE_2,
  1813. SDP_DSIZE_4,
  1814. SDP_DSIZE_8,
  1815. SDP_DSIZE_16,
  1816. SDP_DSIZE_NEXT1,
  1817. SDP_DSIZE_NEXT2,
  1818. SDP_DSIZE_NEXT4,
  1819. SDP_DSIZE_MASK = SDP_DSIZE_NEXT4,
  1820. };
  1821. enum bt_sdp_cmd {
  1822. SDP_ERROR_RSP = 0x01,
  1823. SDP_SVC_SEARCH_REQ = 0x02,
  1824. SDP_SVC_SEARCH_RSP = 0x03,
  1825. SDP_SVC_ATTR_REQ = 0x04,
  1826. SDP_SVC_ATTR_RSP = 0x05,
  1827. SDP_SVC_SEARCH_ATTR_REQ = 0x06,
  1828. SDP_SVC_SEARCH_ATTR_RSP = 0x07,
  1829. };
  1830. enum bt_sdp_errorcode {
  1831. SDP_INVALID_VERSION = 0x0001,
  1832. SDP_INVALID_RECORD_HANDLE = 0x0002,
  1833. SDP_INVALID_SYNTAX = 0x0003,
  1834. SDP_INVALID_PDU_SIZE = 0x0004,
  1835. SDP_INVALID_CSTATE = 0x0005,
  1836. };
  1837. /*
  1838. * String identifiers are based on the SDP spec stating that
  1839. * "base attribute id of the primary (universal) language must be 0x0100"
  1840. *
  1841. * Other languages should have their own offset; e.g.:
  1842. * #define XXXLangBase yyyy
  1843. * #define AttrServiceName_XXX 0x0000+XXXLangBase
  1844. */
  1845. #define SDP_PRIMARY_LANG_BASE 0x0100
  1846. enum bt_sdp_attribute_id {
  1847. SDP_ATTR_RECORD_HANDLE = 0x0000,
  1848. SDP_ATTR_SVCLASS_ID_LIST = 0x0001,
  1849. SDP_ATTR_RECORD_STATE = 0x0002,
  1850. SDP_ATTR_SERVICE_ID = 0x0003,
  1851. SDP_ATTR_PROTO_DESC_LIST = 0x0004,
  1852. SDP_ATTR_BROWSE_GRP_LIST = 0x0005,
  1853. SDP_ATTR_LANG_BASE_ATTR_ID_LIST = 0x0006,
  1854. SDP_ATTR_SVCINFO_TTL = 0x0007,
  1855. SDP_ATTR_SERVICE_AVAILABILITY = 0x0008,
  1856. SDP_ATTR_PFILE_DESC_LIST = 0x0009,
  1857. SDP_ATTR_DOC_URL = 0x000a,
  1858. SDP_ATTR_CLNT_EXEC_URL = 0x000b,
  1859. SDP_ATTR_ICON_URL = 0x000c,
  1860. SDP_ATTR_ADD_PROTO_DESC_LIST = 0x000d,
  1861. SDP_ATTR_SVCNAME_PRIMARY = SDP_PRIMARY_LANG_BASE + 0,
  1862. SDP_ATTR_SVCDESC_PRIMARY = SDP_PRIMARY_LANG_BASE + 1,
  1863. SDP_ATTR_SVCPROV_PRIMARY = SDP_PRIMARY_LANG_BASE + 2,
  1864. SDP_ATTR_GROUP_ID = 0x0200,
  1865. SDP_ATTR_IP_SUBNET = 0x0200,
  1866. /* SDP */
  1867. SDP_ATTR_VERSION_NUM_LIST = 0x0200,
  1868. SDP_ATTR_SVCDB_STATE = 0x0201,
  1869. SDP_ATTR_SERVICE_VERSION = 0x0300,
  1870. SDP_ATTR_EXTERNAL_NETWORK = 0x0301,
  1871. SDP_ATTR_SUPPORTED_DATA_STORES_LIST = 0x0301,
  1872. SDP_ATTR_FAX_CLASS1_SUPPORT = 0x0302,
  1873. SDP_ATTR_REMOTE_AUDIO_VOLUME_CONTROL = 0x0302,
  1874. SDP_ATTR_FAX_CLASS20_SUPPORT = 0x0303,
  1875. SDP_ATTR_SUPPORTED_FORMATS_LIST = 0x0303,
  1876. SDP_ATTR_FAX_CLASS2_SUPPORT = 0x0304,
  1877. SDP_ATTR_AUDIO_FEEDBACK_SUPPORT = 0x0305,
  1878. SDP_ATTR_NETWORK_ADDRESS = 0x0306,
  1879. SDP_ATTR_WAP_GATEWAY = 0x0307,
  1880. SDP_ATTR_HOMEPAGE_URL = 0x0308,
  1881. SDP_ATTR_WAP_STACK_TYPE = 0x0309,
  1882. SDP_ATTR_SECURITY_DESC = 0x030a,
  1883. SDP_ATTR_NET_ACCESS_TYPE = 0x030b,
  1884. SDP_ATTR_MAX_NET_ACCESSRATE = 0x030c,
  1885. SDP_ATTR_IP4_SUBNET = 0x030d,
  1886. SDP_ATTR_IP6_SUBNET = 0x030e,
  1887. SDP_ATTR_SUPPORTED_CAPABILITIES = 0x0310,
  1888. SDP_ATTR_SUPPORTED_FEATURES = 0x0311,
  1889. SDP_ATTR_SUPPORTED_FUNCTIONS = 0x0312,
  1890. SDP_ATTR_TOTAL_IMAGING_DATA_CAPACITY = 0x0313,
  1891. SDP_ATTR_SUPPORTED_REPOSITORIES = 0x0314,
  1892. /* PnP Information */
  1893. SDP_ATTR_SPECIFICATION_ID = 0x0200,
  1894. SDP_ATTR_VENDOR_ID = 0x0201,
  1895. SDP_ATTR_PRODUCT_ID = 0x0202,
  1896. SDP_ATTR_VERSION = 0x0203,
  1897. SDP_ATTR_PRIMARY_RECORD = 0x0204,
  1898. SDP_ATTR_VENDOR_ID_SOURCE = 0x0205,
  1899. /* BT HID */
  1900. SDP_ATTR_DEVICE_RELEASE_NUMBER = 0x0200,
  1901. SDP_ATTR_PARSER_VERSION = 0x0201,
  1902. SDP_ATTR_DEVICE_SUBCLASS = 0x0202,
  1903. SDP_ATTR_COUNTRY_CODE = 0x0203,
  1904. SDP_ATTR_VIRTUAL_CABLE = 0x0204,
  1905. SDP_ATTR_RECONNECT_INITIATE = 0x0205,
  1906. SDP_ATTR_DESCRIPTOR_LIST = 0x0206,
  1907. SDP_ATTR_LANG_ID_BASE_LIST = 0x0207,
  1908. SDP_ATTR_SDP_DISABLE = 0x0208,
  1909. SDP_ATTR_BATTERY_POWER = 0x0209,
  1910. SDP_ATTR_REMOTE_WAKEUP = 0x020a,
  1911. SDP_ATTR_PROFILE_VERSION = 0x020b,
  1912. SDP_ATTR_SUPERVISION_TIMEOUT = 0x020c,
  1913. SDP_ATTR_NORMALLY_CONNECTABLE = 0x020d,
  1914. SDP_ATTR_BOOT_DEVICE = 0x020e,
  1915. };
  1916. #endif