spapr_pci.h 2.5 KB

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  1. /*
  2. * QEMU SPAPR PCI BUS definitions
  3. *
  4. * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com>
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License as published by the Free Software Foundation; either
  9. * version 2 of the License, or (at your option) any later version.
  10. *
  11. * This library is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * Lesser General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Lesser General Public
  17. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #if !defined(__HW_SPAPR_H__)
  20. #error Please include spapr.h before this file!
  21. #endif
  22. #if !defined(__HW_SPAPR_PCI_H__)
  23. #define __HW_SPAPR_PCI_H__
  24. #include "hw/pci.h"
  25. #include "hw/pci_host.h"
  26. #include "hw/xics.h"
  27. #define SPAPR_MSIX_MAX_DEVS 32
  28. #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
  29. #define SPAPR_PCI_HOST_BRIDGE(obj) \
  30. OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE)
  31. typedef struct sPAPRPHBState {
  32. PCIHostState parent_obj;
  33. uint64_t buid;
  34. char *busname;
  35. char *dtbusname;
  36. MemoryRegion memspace, iospace;
  37. target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
  38. target_phys_addr_t msi_win_addr;
  39. MemoryRegion memwindow, iowindow, msiwindow;
  40. uint32_t dma_liobn;
  41. uint64_t dma_window_start;
  42. uint64_t dma_window_size;
  43. DMAContext *dma;
  44. struct {
  45. uint32_t irq;
  46. } lsi_table[PCI_NUM_PINS];
  47. struct {
  48. uint32_t config_addr;
  49. uint32_t irq;
  50. int nvec;
  51. } msi_table[SPAPR_MSIX_MAX_DEVS];
  52. QLIST_ENTRY(sPAPRPHBState) list;
  53. } sPAPRPHBState;
  54. static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
  55. {
  56. return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq);
  57. }
  58. #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
  59. #define SPAPR_PCI_IO_WIN_SIZE 0x10000
  60. void spapr_create_phb(sPAPREnvironment *spapr,
  61. const char *busname, uint64_t buid,
  62. uint64_t mem_win_addr, uint64_t mem_win_size,
  63. uint64_t io_win_addr, uint64_t msi_win_addr);
  64. int spapr_populate_pci_dt(sPAPRPHBState *phb,
  65. uint32_t xics_phandle,
  66. void *fdt);
  67. void spapr_pci_rtas_init(void);
  68. #endif /* __HW_SPAPR_PCI_H__ */