pci_host.h 2.4 KB

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  1. /*
  2. * QEMU Common PCI Host bridge configuration data space access routines.
  3. *
  4. * Copyright (c) 2006 Fabrice Bellard
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. /* Worker routines for a PCI host controller that uses an {address,data}
  25. register pair to access PCI configuration space. */
  26. #ifndef PCI_HOST_H
  27. #define PCI_HOST_H
  28. #include "sysbus.h"
  29. #define TYPE_PCI_HOST_BRIDGE "pci-host-bridge"
  30. #define PCI_HOST_BRIDGE(obj) \
  31. OBJECT_CHECK(PCIHostState, (obj), TYPE_PCI_HOST_BRIDGE)
  32. struct PCIHostState {
  33. SysBusDevice busdev;
  34. MemoryRegion conf_mem;
  35. MemoryRegion data_mem;
  36. MemoryRegion mmcfg;
  37. MemoryRegion *address_space;
  38. uint32_t config_reg;
  39. PCIBus *bus;
  40. };
  41. /* common internal helpers for PCI/PCIe hosts, cut off overflows */
  42. void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr,
  43. uint32_t limit, uint32_t val, uint32_t len);
  44. uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr,
  45. uint32_t limit, uint32_t len);
  46. void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len);
  47. uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len);
  48. extern const MemoryRegionOps pci_host_conf_le_ops;
  49. extern const MemoryRegionOps pci_host_conf_be_ops;
  50. extern const MemoryRegionOps pci_host_data_le_ops;
  51. extern const MemoryRegionOps pci_host_data_be_ops;
  52. #endif /* PCI_HOST_H */